Patents Examined by Hamdy S. Ahmed
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Patent number: 8832386Abstract: A management server and a data migration method enabling a storage apparatus to be replaced while retaining data consistency and without halting access by a host apparatus are proposed.Type: GrantFiled: September 27, 2011Date of Patent: September 9, 2014Assignee: Hitachi, Ltd.Inventors: Kenichi Sawa, Keishi Tamura, Satoru Ozaki
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Patent number: 8812786Abstract: A system and method of providing directory cache coherence are disclosed. The system and method may include tracking the coherence state of at least one cache block contained within a region using a global directory, providing at least one region level sharing information about the least one cache block in the global directory, and providing at least one block level sharing information about the at least one cache block in the global directory. The tracking of the provided at least one region level sharing information and the provided at least one block level sharing information may organize the coherence state of the at least one cache block and the region.Type: GrantFiled: October 18, 2011Date of Patent: August 19, 2014Assignee: Advanced Micro Devices, Inc.Inventors: Bradfod M. Beckmann, Arkaprava Basu, Steven K. Reinhardt
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Patent number: 8812768Abstract: A system having serially connected memory devices in a ring topology organization to realize high speed performance. The memory devices have dynamically configurable data widths such that the system can operate with up to a maximum common number of active data pads to maximize performance, or to operate with a single active data pad to minimize power consumption. Therefore the system can include a mix of memory devices having different data widths. The memory devices are dynamically configurable through the issuance of a single command propagated serially through all the memory devices from the memory controller in a broadcast operation. Robust operation of the system is ensured by implementing a data output inhibit algorithm, which prevents valid data from being provided to the memory controller when read output control signal is received out of its proper sequence.Type: GrantFiled: February 19, 2008Date of Patent: August 19, 2014Assignee: Conversant Intellectual Property Management Inc.Inventors: Steven Przybylski, Roland Schuetz, HakJune Oh, Hong Beom Pyeon
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Patent number: 8806163Abstract: A storage system includes a first storage unit, a second storage unit and a controller to receive a write request for updated data to a first storage unit from the host and write the updated data into the first storage area, when the controller determines that there is not a free area in a storage area to be processed in the second storage unit, the controller changes the storage area to be processed to another storage area to be processed and instructs change of a storage area to be processed to another storage system to be connected to the host, and the controller reads the updated data from the first storage unit and transmits the updated data and writing destination information relating to the updated data to another storage system for backup.Type: GrantFiled: August 27, 2012Date of Patent: August 12, 2014Assignee: Fujitsu LimitedInventors: Takashi Kawada, Yoshinari Shinozaki, Hidenori Yamada
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Patent number: 8799563Abstract: A method for programming data into a first plurality of rows within a second plurality of erase sectors of a flash memory device using a programming process having at least one selectable parameter, the method includes characterizing each of at least one row subsets, each row subset comprising at least one row from among said first plurality of rows, thereby to generate at least one row subset characteristic value; and programming data into at least a portion of at least one individual row belonging to at least one row subset, using a programming process having at least one selectable parameter, said at least one selectable parameter being set at least partly in accordance with the row subset characteristic value characterizing a row subset to which said individual row belongs; wherein at least two row subsets of an array of flash memory cells differ from each other by their row subset characteristic values.Type: GrantFiled: July 31, 2013Date of Patent: August 5, 2014Assignee: Densbits Technologies Ltd.Inventors: Hanan Weingarten, Erez Sabbag, Michael Katz
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Patent number: 8793455Abstract: A storage apparatus includes a memory that stores data groups, a rearranging unit that rearranges a transmission group order of the data groups based on each of storage positions in a storage device provided in a copy destination storage apparatus in which the each of data groups is to be stored, and a transmitting unit that transmits the data groups rearranged by the rearranging unit to the copy destination storage apparatus.Type: GrantFiled: August 6, 2012Date of Patent: July 29, 2014Assignee: Fujitsu LimitedInventors: Hidenori Yamada, Takashi Kawada, Naruhiro Oogai, Yoshinari Shinozaki, Shinichi Nishizono
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Patent number: 8793427Abstract: Remote memory can be used for a number idle pages located on a virtual machine. A number of idle pages can be sent to the remote memory according to a placement policy, where the placement policy can include a number of weighting factors. A hypervisor on a computing device can record a local size and a remote page fault frequency of the number of virtual machines. The hypervisor can scan local memory to determine the number of idle pages and a number of idle virtual machines. The number of idle pages, including a page map and a remote address destination for each idle page, can be sent to the remote memory by the hypervisor. The number of virtual machines can be analyzed to determine a per-virtual machine local memory allocation.Type: GrantFiled: February 10, 2011Date of Patent: July 29, 2014Assignee: Hewlett-Packard Development Company, L.P.Inventors: Kevin T. Lim, Jichuan Chang, Jose Renato G. Santos, Yoshio Turner, Parthasarathy Ranganathan
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Patent number: 8788506Abstract: According to one general aspect, a method is provided for managing memory when counting unique items, the method using a pattern of bits in a unique estimator mask. The method may create a unique estimator mask based on fingerprints calculated for previously encountered items, and determine a number with the highest probability for creating the pattern of bits in the mask. When the number with the highest probability is determined, it may be returned as the estimated count of unique items.Type: GrantFiled: May 21, 2012Date of Patent: July 22, 2014Assignee: Google Inc.Inventor: Peter Dornbach
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Patent number: 8788747Abstract: Various embodiments of the present invention are directed a multi-core memory modules. In one embodiment, a memory module (500) includes at least one virtual memory device and a demultiplexer register (502) disposed between the at least one virtual memory device and a memory controller. The demultiplexer register receives a command identifying one of the at least one virtual memory devices from the memory controller and sends the command to the identified virtual memory device. In addition, the at least one virtual memory devices include at least one memory chip.Type: GrantFiled: August 8, 2008Date of Patent: July 22, 2014Assignee: Hewlett-Packard Development Company, L.P.Inventors: Jung Ho Ahn, Norman P. Jouppi, Jacob B. Leverich
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Patent number: 8788537Abstract: A computer readable medium stores a program causing a computer to execute a process including receiving an instruction for deleting an information group from a first memory; extracting, from the first memory, information regarding information groups having a parent-child relationship with a target information group to be deleted in accordance with the received instruction; extracting a user identification code associated with the target information group from a second memory; storing an identification code of the target information group, the information regarding the information groups, and the extracted user identification code in association with one another in a third memory; deleting the target information group from the first memory; and changing the structure information stored in the first memory to structure information obtained after the target information group has been deleted from the first memory, by changing the child information group as a child of the parent information group.Type: GrantFiled: February 9, 2011Date of Patent: July 22, 2014Assignee: Fuji Xerox Co., Ltd.Inventor: Haruki Matsui
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Patent number: 8769208Abstract: The present disclosure discloses a method, a system and a server of removing a distributed caching object. In one embodiment, the method receives a removal request, where the removal request includes an identifier of an object. The method may further apply consistent Hashing to the identifier of the object to obtain a Hash result value of the identifier, locates a corresponding cache server based on the Hash result value and renders the corresponding cache server to be a present cache server. In some embodiments, the method determines whether the present cache server is in an active status and has an active period greater than an expiration period associated with the object. Additionally, in response to determining that the present cache server is in an active status and has an active period greater than the expiration period associated with the object, the method removes the object from the present cache server.Type: GrantFiled: August 23, 2011Date of Patent: July 1, 2014Assignee: Alibaba Group Holding LimitedInventors: Gang Liu, Qing Ren, Wensong Zhang
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Patent number: 8762652Abstract: A data processing system includes a first master having a cache, a second master, a memory operably coupled to the first master and the second master via a system interconnect. The cache includes a cache controller which implements a set of cache coherency states for data units of the cache. The cache coherency states include an invalid state; an unmodified non-coherent state indicating that data in a data unit of the cache has not been modified and is not guaranteed to be coherent with data in at least one other storage device of the data processing system, and an unmodified coherent state indicating that the data of the data unit has not been modified and is coherent with data in the at least one other storage device of the data processing system.Type: GrantFiled: April 30, 2008Date of Patent: June 24, 2014Assignee: Freescale Semiconductor, Inc.Inventor: William C. Moyer
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Patent number: 8751735Abstract: A system including a controller in communication with a memory. The memory includes memory cells arranged in memory blocks. Each memory cell is capable of storing a plurality of bits. Each memory block defines a plurality of pages. A page in a memory block includes one of the plurality of bits of a plurality of memory cells in the memory block. The controller is configured to write data to selected pages in one or more memory blocks. The system includes circuitry configured to write data from a predetermined number of pages of the selected pages to a memory block other than the one or more memory blocks in response to the predetermined number of pages being full of data. The predetermined number is based on one or more of a number of pages in each memory block and a number of bits in the plurality of bits.Type: GrantFiled: September 27, 2013Date of Patent: June 10, 2014Assignee: Marvell World Trade Ltd.Inventors: Qun Zhao, Xinhai Kang
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Patent number: 8738850Abstract: Reliable storage for database management systems (DBMS) running on memory devices such as NAND type flash memory utilizes minimum I/O overhead and provides maximum data durability. A virtual page map is utilized between the flash memory and a page access component to record changes to the DBMS pages and prevent overwriting or data loss. There is no need for journaling and logging, and performance is increased by reducing the write and erase counts on the flash memory. The logical page numbers of the DBMS are mapped to physical page numbers in the page map, such that the virtual page map allocates an available page from the physical pages when changes to a page occur, and the updated information is stored in the allocated page. The allocated page number is mapped to the logical page number of the original page, thus maintaining a modified page representation while preventing physical in-place updates.Type: GrantFiled: April 30, 2013Date of Patent: May 27, 2014Assignee: Oracle International CorporationInventors: SangCheol Lee, BongSoo Ko, HyungGook Yoo, SongHee Kang
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Patent number: 8732420Abstract: A remote copy system includes a first storage device performing data transmission/reception with a host computer, a second storage device receiving data from the first storage device, and a third storage device receiving data from the second storage device. The first storage device includes a logical volume, the second storage device includes a logical volume being a virtual volume, and the third storage device includes a logical volume. The first storage system changes the state of a first pair of the logical volumes based on the state of a second pair of the logical volumes. With such a remote copy system and a method for use therein, any data backup failure can be prevented.Type: GrantFiled: January 3, 2013Date of Patent: May 20, 2014Assignee: Hitachi, Ltd.Inventors: Kazuhide Sano, Katsuhiro Okumoto, Shuji Kondo
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Patent number: 8707010Abstract: A switch connects and disconnects an input and output control device to and from an input and output device. The switch includes a storage unit that stores therein a translation table for use in translating a physical address used on a virtual machine that a guest operating system specifies as a direct memory access transfer destination to the input and output device, into a physical address used on a real machine; and an address translating unit that translates an address contained in a direct memory access request issued by the input and output device into a physical address used on the real machine by referring to the translation table.Type: GrantFiled: September 8, 2009Date of Patent: April 22, 2014Assignee: Fujitsu LimitedInventor: Tsunehisa Doi
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Patent number: 8706961Abstract: Data is managed efficiently by switching between block level hierarchical control and file level hierarchical control according to file characteristics. A storage apparatus which is connected via a network to a host computer which requests data writing comprises storage media of a plurality of types of varying performance, a volume management unit which manages storage areas provided by the storage media of the plurality of types as different storage tiers and manages storage tiers of the same type or different types as a pool and provides predetermined areas of the pool to the host computer as volumes, and a file management unit which constructs file systems, for managing data in file units configured from a plurality of blocks, in the volumes, and receives file unit data write requests from the host computer.Type: GrantFiled: October 31, 2011Date of Patent: April 22, 2014Assignee: Hitachi, Ltd.Inventors: Katsumi Hirezaki, Nobuyuki Saika
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Patent number: 8706974Abstract: In a data processing system, a method includes a first master initiating a transaction via a system interconnect to a target device. After initiating the transaction, a snoop request corresponding to the transaction is provided to a cache of a second master. The transaction is completed. After completing the transaction, a snoop lookup operation corresponding to the snoop request in the cache of the second master is performed. The transaction may be completed prior to or after providing the snoop request. In response to performing the snoop lookup operation, a snoop response may be provided, where the snoop response is provided after completing the transaction. When the snoop response indicates an error, a snoop error may be provided to the first master.Type: GrantFiled: April 30, 2008Date of Patent: April 22, 2014Assignee: Freescale Semiconductor, Inc.Inventor: William C. Moyer
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Patent number: 8700853Abstract: A storage apparatus which is connected via a network to a host which issues data I/O requests comprises storage devices of a plurality of types of varying performance, and a control unit which manages each storage area provided by each of the storage devices of a plurality of types by means of storage tiers of a plurality of different types, and which assigns storage areas in pre-determined units to virtual volumes from any storage tier among the storage tiers of a plurality of types in accordance with a data write request from the host, wherein, if there is an I/O request from the host, the control unit stores data corresponding to the I/O request in predetermined units in the cache memory and determines the storage tier of the storage area assigned to the virtual volume storing the data according to the mode of writing to the cache memory.Type: GrantFiled: April 13, 2012Date of Patent: April 15, 2014Assignee: Hitachi, Ltd.Inventor: Naoko Ikegaya
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Patent number: 8694729Abstract: A storage system, according to one embodiment, includes a processor and logic integrated with and/or executable by the processor. The logic is configured to: search for an instance of a file or portion thereof on a second storage tier; at least one of: associate the instance of the file or portion thereof on the second storage tier with a first user when the instance of the file or portion thereof is not associated with any user, and replicate the instance of the file or portion thereof on the second storage tier and associate the replicated instance of the file or portion thereof on the second storage tier with the first user; and disassociate an instance of the file on a first storage tier from the first user.Type: GrantFiled: August 5, 2013Date of Patent: April 8, 2014Assignee: International Business Machines CorporationInventor: Glen A. Jaquette