Abstract: Envelope tracking power supply circuitry includes a look up table (LUT) configured to provide a target supply voltage based on a power envelope measurement. The target supply voltage is dynamically adjusted based on a delay between the power envelope of an RF signal and a provided envelope tracking supply voltage. The envelope tracking supply voltage is generated from the adjusted target supply voltage in order to synchronize the envelope tracking supply voltage with the power envelope of the RF signal.

Abstract: Multi-level envelope trackers with an analog interface are provided herein. In certain embodiments, an envelope tracking system for generating a power amplifier supply voltage for a power amplifier is provided. The envelope tracking system includes a multi-level supply (MLS) DC-to-DC converter that outputs multiple regulated voltages, and an MLS modulator that controls selection of the regulated voltages over time based on an analog envelope signal corresponding to an envelope of the RF signal amplified by the power amplifier.

Abstract: Apparatus and methods for true power detection are provided herein. In certain embodiments, a power amplifier system includes an antenna, a directional coupler, and a power amplifier electrically connected to the antenna by way of a through line of the directional coupler. The power amplifier system further includes a first switch, a second switch, and a combiner that combines a first coupled signal received from a first end of the directional coupler's coupled line through the first switch and a second coupled signal received from a second end of the directional coupler's coupled line through the second switch.

Abstract: Method of operating a power combiner network (1), the power combiner network (1) comprising a power combiner device (10) having N secondary ports (11(1, 2, N)) combining into one primary port (12), wherein respective N secondary port (11(1, 2, . . . , N)) is provided with a phase shifter arrangement (13) and a load control arrangement (14). Respective phase shifter arrangement (13) is configured to set a phase of a signal fed through respective N secondary port (11(1, 2, . . . , N)). Respective load control arrangement (14) is configured to set the N secondary ports (11(1, 2, . . . , N)) in an active or in an inactive operation mode. For I inactive secondary ports (11(1)) the load control arrangement (14) is further configured to set a phase of the signal reflected from the I inactive secondary ports (11(1)). The method comprises the method steps of; step A (100), selecting which of the N secondary ports (11(1, 2, . . .

Abstract: An amplification device includes a pulse signal acquisition part, a dummy signal generation part, a combination part, an amplifier and a separation part. The pulse signal acquisition part acquires a desired signal that is a pulse signal to be amplified. The dummy signal generation part generates a dummy signal. The combination part adds the dummy signal before and after the desired signal and outputs a composite signal. The amplifier amplifies the composite signal and outputs an amplified composite signal. The separation part extracts an amplified desired signal that is a signal resulting from amplification of the desired signal, from the amplified composite signal and outputs the amplified desired signal. Power of the composite signal is power that makes the amplification part operate nonlinearly.

Abstract: A method of operating a power amplifier supplying power to an antenna, supplying switched power to the power amplifier comprises in a first mode of operation via a driver circuit and one or more switches to switch the supply of power to the power amplifier on and off periodically; and calibrating the power amplifier in a second mode of operation. The calibrating comprises supplying voltage to the power amplifier via the same driver circuit and one or more switches for a calibration pulse duration longer than the on/off period. A power supply and an RF front end comprising the power supply are also disclosed.

Abstract: Aspects of this disclosure relate to a dual connectivity power amplifier system. The power amplifier system includes first and second power amplifiers that are concurrently active in a dual connectively mode. The first power amplifier is active in a different mode. A switch electrically connects the first power amplifier to different radio frequency signal paths in the dual connectivity mode and the different mode. Related methods, power amplifier modules, and wireless communication devices are disclosed.

Abstract: Provided are, among other things, systems, apparatuses methods and techniques for converting digital data to radio-frequency (RF) signals. One such apparatus includes a reactive-impedance network within which the levels of multiple binary waveforms are individually boosted, before being combined to produce a single, composite output signal.

Abstract: Apparatus and methods for adaptive power amplifier biasing are provided. In certain embodiments, a power amplifier system includes a power amplifier that provides amplification to a radio frequency (RF) signal, and a power amplifier bias control circuit that generates a bias signal of the power amplifier based on a bandwidth signal indicating a bandwidth of the RF signal. The power amplifier bias control circuit has a bandwidth that adapts to the bandwidth of the RF signal as indicated by the bandwidth signal.

Abstract: Two Silicon Carbide negative positive negative transistors realized on a monolithic substrate as a differential pair to keep their base-emitter junctions at nearly the same temperature such that their kT/q sensitivities tract together with their base connections electrically connected to the cold junction terminals of a thermocouple to create an amplified differential voltage across output load resistors while operating at high temperature.

Abstract: A packaged semiconductor die may include a package terminal array comprising a plurality of terminals, wherein a spacing between the plurality of terminals of the ball grid array is less than 0.5 mm. First and second high-voltage circuits of the die may output a differential signal to a first and second terminal that may exceed 15 volts, in which the first high-voltage circuit and the second high-voltage circuit are positioned symmetrically around an axis and in which the first terminal and the second terminal are located at an edge of the package terminal array. A low-voltage circuit may be coupled to a third terminal and positioned between the first high-voltage circuit and the second high-voltage circuit, wherein the low-voltage circuit comprises circuitry organized in columns aligned along an axis and having a width defined by a fraction of the terminal spacing pitch.

Abstract: An architecture of radio frequency front-end includes a power amplifier module integrated duplexer (PAMiD), an antenna and at least one tunable matching network; herein, the PAMiD includes a power amplifier, and the at least one tunable matching network is located between the power amplifier and the antenna, and is configured to adjust the impedance of the output end of the power amplifier and/or the impedance of the input end of the antenna.

Abstract: A radio-frequency power amplifier device includes: a carrier amplifier semiconductor device and a peak amplifier semiconductor device on a multilayer submount substrate; a bias power supply semiconductor device; second radio-frequency signal wiring that transmits a radio-frequency signal to the carrier amplifier semiconductor device and the peak amplifier semiconductor device; and carrier-amplifier bias power supply wiring that is wired in a third wiring layer and supplies a bias power supply voltage. The second radio-frequency signal wiring and the carrier-amplifier bias power supply wiring intersect in a plan view. The radio-frequency power amplifier device includes: a shield pattern that is located in a second wiring layer between a first wiring layer and the third wiring layer; and one or more connection vias disposed in an extension direction of the carrier-amplifier bias power supply wiring. The one or more connection vias are connected to the shield pattern.

Abstract: A semiconductor device capable of measuring a minute current is provided. The semiconductor device includes an operational amplifier and a diode element. An inverting input terminal of the operational amplifier and an input terminal of the diode element are electrically connected to a first terminal to which current is input, and an output terminal of the operational amplifier and an output terminal of the diode element are electrically connected to a second terminal from which voltage is output. A diode-connected transistor that includes a metal oxide in a channel formation region is used as the diode element. Since the off-state current of the transistor is extremely low, a minute current can flow between the first terminal and the second terminal. Thus, when voltage is output from the second terminal, a minute current that flows through the first terminal can be estimated from the voltage.

Abstract: A transistor package for a power amplifier is provided. The transistor package includes a plurality of radio frequency, RF, paths that includes a first RF path and second RF path. Each RF path includes a transistor-carrying die and at least one impedance element. The transistor package includes a circuit portion electrically coupling a first impedance element in the first RF path to a second impedance element in the second RF path where the circuit portion includes at least one resistor.

Abstract: A directional coupler is configured so as to include: a resistive element in which one end thereof is connected to a first terminal and the other end is connected to a second terminal; a first amplifier circuit for outputting either a current directly proportional to a first voltage applied to the one end of the resistive element or a current directly proportional to a second voltage applied to the other end of the resistive element; a second amplifier circuit for outputting a first current which is directly proportional to the voltage difference between the first voltage applied to the one end of the resistive element and the second voltage applied to the other end of the resistive element and whose polarity is different from that of the current outputted from the first amplifier circuit when a signal is flowing from the first terminal to the second terminal, and for outputting a second current which is directly proportional to the voltage difference between the first voltage and the second voltage and whose

Abstract: Low noise amplifiers (LNAs) with low noise figure are provided. In certain embodiments, an LNA includes a single-ended LNA stage including an input for receiving a single-ended input signal from an antenna and an output for providing a single-ended amplified signal, a balun for converting the single-ended amplified signal to a differential signal, and a variable gain differential amplification stage for amplifying the differential signal from the balun. Implementing the LNA in this manner provides low noise figure, high gain, flexibility in controlling gain, and less sensitivity to ground/supply impedance.

Abstract: A high-frequency power amplifier is configured in such a way as to include an input matching circuit, an amplifying element, an output matching circuit, a coupling circuit, a detection circuit, and an output terminal, and in such a way that either the input matching circuit or the output matching circuit has an active element, the detection circuit receives a signal outputted by the coupling circuit and outputs a control voltage into which the detection circuit converts the signal to the active element, and the active element changes the impedance of the active element in accordance with the control voltage outputted by the detection circuit, thereby changing the power of a signal outputted by either the input matching circuit having the active element or the output matching circuit having the active element, to change the power of a signal which the coupling circuit outputs to the output terminal.

Abstract: Envelope tracking power supply circuitry includes a look up table (LUT) configured to provide a target supply voltage based on a power envelope measurement. The target supply voltage is dynamically adjusted based on a delay between the power envelope of an RF signal and a provided envelope tracking supply voltage. The envelope tracking supply voltage is generated from the adjusted target supply voltage in order to synchronize the envelope tracking supply voltage with the power envelope of the RF signal.

Abstract: A delay-compensating power management integrated circuit (PMIC) is provided. The PMIC includes a target voltage circuit configured to generate a target voltage that is utilized for generating a time-variant voltage to amplify an analog signal. The target voltage is generated based on a time-variant envelope of the analog signal but lags behind the time-variant envelope by a temporal delay(s) due to an inherent processing delay in the target voltage circuit. In this regard, a voltage processing circuit is provided in the target voltage circuit to generate a modified target voltage that is time-adjusted relative to the target voltage to substantially offset the temporal delay(s). By generating the time-variant voltage based on the modified target voltage, the time-variant voltage can be better aligned with the time-variant envelope of the analog signal, thus helping to reduce amplitude distortion when amplifying the analog signal.