Abstract: A method for conducting bus arbitration in a hardware tester system comprising a single master controller and a multi-master controller comprises configuring the single master controller with arbitration logic operable to communicate on a bus in the hardware tester system using a same arbitration scheme as the multi-master controller, wherein the single master controller and the multi-master controller are connected to the bus. Further, responsive to a determination by the arbitration logic that the multi-master controller controls the bus, the method comprises withdrawing the single master controller from attempting to control the bus.

Abstract: An information handling system includes a plurality of components, and a controller. The controller determines a separate thermal resistance for each of the components, categorizes each component into one of a plurality of cooling domains based on the thermal resistance of the component and an amount of air flow around the component, and adjusts cooling controls for each of the components based on the respective cooling domain of the component.

Abstract: Methods and apparatus are provided for controlling one or more memory devices connected to an input output (IO) circuit through a serial peripheral interface (SPI), to make any device which is in execute in place (XIP) mode exit XIP mode. An example method comprises driving an initial signal from the IO circuit onto the data pins for a first plurality of clock cycles, the initial signal causing any memory device not in XIP mode to treat subsequent signals as a dummy read, disabling a driving function of the IO circuit prior to a negative edge of a last one of the first plurality of clock cycles, stopping generation of clock signals for a transition waiting period after the first plurality of clock cycles, and activating a weak pull-up of the IO circuit to apply logic high on all of the data pins for a second plurality of clock cycles.

Abstract: A method for predicting a way of a set associative shadow cache is disclosed. As a part of a method, a request to fetch a first far taken branch instruction of a first cache line from an instruction cache is received, and responsive to a hit in the instruction cache, a predicted way is selected from a way array using a way that corresponds to the hit in the instruction cache. A second cache line is selected from a shadow cache using the predicted way and the first cache line and the second cache line are forwarded in the same clock cycle.

Abstract: A method for predicting a way of a set associative shadow cache is disclosed. As a part of a method, a request to fetch a first far taken branch instruction of a first cache line from an instruction cache is received, and responsive to a hit in the instruction cache, a predicted way is selected from a way array using a way that corresponds to the hit in the instruction cache. A second cache line is selected from a shadow cache using the predicted way and the first cache line and the second cache line are forwarded in the same clock cycle.

Abstract: A method is provided to operate a computer to interoperate with a portable media player. The method includes processing signals provided from the portable media player to the computer that are indicative of whether an accessory has been connected to the portable media player, to determine whether the accessory has been connected to the portable media player. Based on a determination that the accessory has been connected to the portable media player, physiologic data of a user that was provided to the portable media player from a wireless physiologic data gathering device, is received from the portable media player, into the computer, via the accessory.

Abstract: A key-value store is provided having one or more key-value storage interfaces. A key-value store on at least one compute node comprises a memory for storing a plurality of key-value pairs; and an abstract storage interface comprising a software interface module that communicates with at least one persistent storage device providing a key-value interface for persistent storage of one or more of the plurality of key-value pairs, wherein the software interface module provides the one or more key-value pairs to the at least one persistent storage device in a key-value format. The abstract storage interface optionally processes one or more batch operations on the plurality of key-value pairs. A distributed embodiment for a partitioned key-value store is also provided.

Abstract: A method for serial data transfer in a bus system having at least two bus subscribers that exchange messages via the bus, the transmitted messages having a CAN standard ISO 11898-1 structure, where for a first marker (EDL), the control field of the messages, divergently from ISO 11898-1, encompasses more than 6 bits, and for the EDL, the data field of the messages, divergently from ISO 11898-1, may encompass more than 8 bytes, the values of the 4 bits of the data length code being interpreted divergently from ISO 11898-1 to establish the data field size, and for a second marker (BRS), the bit length for at least one predefined or predefinable region within the message assumes a value that is shortened as to the bit length used before the second marker was present, the region beginning at the earliest with the second marker and ending at the latest with the CRC delimiter, and the BRS occurring only when the EDL is present, and occurring in the control field of the messages which encompasses more than 6 bits.

Abstract: Systems and method are disclosed for provisioning storage for a logical storage device. At least one storage capability profile is provided. A request to provision the storage for the logical storage device is received. A plurality of candidate storage resource configurations are determine based on the at least one storage capability profile and the storage policy profile, where a first candidate storage resource configuration specifies thick provisioning in a first storage pool and a second candidate storage resource configuration specifies thin provisioning in the first storage pool. A ranking of the plurality of candidate storage resource configurations is provided, the ranking indicating the first candidate storage resource configuration has a higher priority than the second candidate storage resource configuration. It is determined that the first storage pool has insufficient storage for thick provisioning.

Abstract: In one embodiment, a storage system configured for reading a file written to a plurality of tape media includes at least two tape drives and a read/write control. The read/write control is configured to load a tape medium into a tape drive, and read metadata from the loaded tape medium and determine from the metadata whether the tape medium is a parent tape medium or a child tape medium for the file. The read/write control is also configured to retrieve ID information on the parent tape medium from the metadata saved in the child tape medium in response to a determination that the loaded tape medium is a child tape medium, and load the parent tape medium identified by the retrieved ID information into another tape drive. Moreover, the read/write control is configured to read a written first file part based on metadata saved in the loaded parent tape medium.

Abstract: A novel and efficient method is described that creates a monolithic high capacity Packet Engine (PE) by connecting N lower capacity Packet Engines (PEs) via a novel Chip-to-Chip (C2C) interface. The C2C interface is used to perform functions, such as memory bit slicing and to communicate shared information, and enqueue/dequeue operations between individual PEs.

Abstract: An apparatus, method and computer program in a distributed cluster storage network comprises storage control nodes to write data to storage on request from a host; a forwarding layer at a first node to forward data to a second node; a buffer controller at each node to allocate buffers for data to be written; and a communication link between the buffer controller and the forwarding layer at each node to communicate a constrained or unconstrained status indicator of the buffer resource to the forwarding layer. A mode selector selects a constrained mode of operation requiring allocation of buffer resource at the second node and communication of the allocation before the first node can allocate buffers and forward data, or an unconstrained mode of operation granting use of a predetermined resource credit provided by the second to the first node and permitting forwarding of a write request with data.

Abstract: A data input circuit of a semiconductor apparatus may include a plurality of parallelizing units corresponding to a plurality of input/output pads in a one-to-one manner, and a data control block configured to transmit serial test data, which may be input through less than all of the plurality of input/output pads, to the plurality of parallelizing units in response to first and second control signals.

Abstract: A method and system for providing a distraction free reading mode with an electronic personal display is disclosed. One example accesses non-adjustable settings for a reader mode. In addition, user adjustable settings for the reader mode on the electronic personal display are also accessed. The user adjustable settings and the non-adjustable settings are then implemented when the reader mode is initiated.

Abstract: A first external tool (10A) serially connected to an electronic controller (20A) through a pair of communication lines (LANH, LANN) applies a high voltage (Vaa) higher than a normal control voltage (Vcc) to the communication line (LANH) when a program is written. The electronic controller (20A) recognizes connection of the first external tool (10A) by a comparison circuit (212A) for monitoring a received voltage and a write-mode determination circuit (218A), initializes a microprocessor (200), and receives and stores an total control program (TCPRG) in a program memory (204A) based on a content of a boot program memory (201). During an operation of the electronic controller (20A), the external tool (10A) is removed and the high voltage (Vaa) is not applied to the communication line (LANH). Therefore, the electronic control apparatus is not erroneously placed in the write mode.

Abstract: A system and method of implementing a modified priority routing of an input/output (I/O) interruption. The system and method determines whether the I/O interruption is pending for a core and whether any of a plurality of guest threads of the core is enabled for guest thread processing of the interruption in accordance with the determining that the I/O interruption is pending. Further, the system and method determines whether at least one of the plurality of guest threads enabled for guest thread processing is in a wait state and, in accordance with the determining that the at least one of the plurality of guest threads enabled for guest thread processing is in the wait state, routes the I/O interruption to a guest thread enabled for guest thread processing and in the wait state.

Abstract: Method and apparatus for performing a shift and XOR operation. In one embodiment, an apparatus includes execution resources to execute a first instruction. In response to the first instruction, said execution resources perform a shift and XOR on at least one value.

Abstract: A new serial bus interface module that enables constrained sensor systems to better match flash-based storage devices' (SD card) read and write performance. The serial bus interface module augments existing flash-based storage with non-volatile random-access memory to form a hybrid storage system using the most popularly used master-slave bus architecture. Together with PSC-like features, the serial bus interface module not only enables slave-to-slave transfer (therefore eliminating the double-transaction problem) but also reads caching (one source to multi-sink) and buffering while flushing. These transaction types enable multi-sector write for significantly faster speed and lower energy overhead, while the use of non-volatile memory for metadata caching means low risk of file-system corruption in the event of power failure. The serial bus interface also enables the direct data transfer from sensors to storage or communication modules without requiring the microprocessor's intervention.

Abstract: In a wireless docking system a dockee device (120) communicates with a host device (100) that is coupled to at least one peripheral (110, 111, 112). The host device has a host communication unit (102) and a docking processor (101) arranged for docking at least one dockee device. The dockee device has a dockee communication unit (121), and a dockee processor (122) for docking to the host device. The dockee processor is arranged for providing at least one virtual peripheral device in a virtual docking environment, the virtual peripheral device having a privacy level. When docking, the virtual peripherals are mapped on actual peripherals so as to apply the privacy level to the actual peripheral. When docked, data transfer with the actual peripheral is controlled according to the respective peripheral privacy level.

Abstract: A method for determining cable connections identifies a plurality of cables connected to a link included in a first device. The method identifies a first cable connected to the link included in the first device. The method determines that a second cable connected to is connected to a link included in a second device The method further determines that only one of an inbound and an outbound channel of a signaling lane included in the first cable is operable. The method utilizes a second cable to perform one of disabling signal transmission or detecting loss of signal on the operable channel. The method enables and disables signal transmission on the operable channel to determine that the first cable is connected to the link included in the remote device.