Abstract: In an apparatus and method growing a SiC single crystal, a PVT growth apparatus is provided with a single crystal SiC seed and a SiC source material positioned in spaced relation in a growth crucible. A resistance heater heats the growth crucible such that the SiC source material sublimates and is transported via a temperature gradient that forms in the growth crucible in response to the heater heating the growth crucible to the single crystal SiC seed where the sublimated SiC source material condenses forming a growing SiC single crystal. Purely axial heat fluxes passing through the bottom and the top of the growth crucible form a flat isotherm at least at a growth interface of the growing SiC single crystal on the single crystal SiC seed.
Type:
Grant
Filed:
July 1, 2019
Date of Patent:
June 15, 2021
Assignee:
II-VI DELAWARE, INC.
Inventors:
Xueping Xu, Ilya Zwieback, Avinash K. Gupta, Varatharajan Rengarajan
Abstract: A single crystal production apparatus that is designed to produce a single crystal by cooling a melting zone formed by a heating part including an infrared generation part and a reflection part, wherein: the reflection part includes a spheroidal mirror and a concave spherical mirror; the infrared generation part is disposed at one focal point of the spheroidal mirror; an opening is formed in the spheroidal mirror on the side of the other focal point of the spheroidal mirror; and the one focal point and the spherical center of the concave spherical mirror fall on the same location.
Abstract: A method of producing a synthetic diamond is disclosed, the method comprising: (a) capturing carbon dioxide from the atmosphere; (b) conducting electrolysis of water to provide hydrogen; (c) reacting the carbon dioxide obtained from step (a) with the hydrogen obtained from step (b) to produce methane; and (d) using the hydrogen obtained from step (b) and the methane obtained from step (c) to produce a synthetic diamond by chemical vapour deposition (CVD).
Abstract: The disclosure relates to a method for making semimetal compound of Pt. The semimetal compound is a single crystal material of PtSe2. The method comprises: placing pure Pt and pure Se in a reacting chamber as reacting materials; evacuating the reacting chamber to be vacuum less than 10 Pa; heating the reacting chamber to a first temperature of 600 degrees Celsius to 800 degrees Celsius and keeping for 24 hours to 100 hours; cooling the reacting chamber to a second temperature of 400 degrees Celsius to 500 degrees Celsius at a cooling rate of 1 degrees Celsius per hour to 10 degrees Celsius per hour and keeping for 24 hours to 100 hours to obtain a crystal material of PtSe2; and separating the excessive reacting materials from the crystal material of PtSe2.
Type:
Grant
Filed:
February 13, 2019
Date of Patent:
May 11, 2021
Assignees:
Tsinghua University, HON HAI PRECISION INDUSTRY CO., LTD.
Inventors:
Ke-Nan Zhang, Ming-Zhe Yan, Shu-Yun Zhou, Yang Wu, Shou-Shan Fan
Abstract: A system for growing silicon crystal structures includes a housing defining a growth chamber and a feed system connected to the housing for delivering silicon particles to the growth chamber. The feed system includes a container for holding the silicon particles. The container includes an outlet for discharging the silicon particles. The feed system also includes a channel connected to the outlet such that silicon particles discharged from the container flow through the channel. The feed system further includes a separation valve connected to the channel and to the housing. The separation valve is configured such that a portion of the feed system rotates relative to the housing.
Type:
Grant
Filed:
February 25, 2016
Date of Patent:
April 6, 2021
Assignee:
Corner Star Limited
Inventors:
Stephan Haringer, Gianni Dell'Amico, Giancarlo Zago, Renzo Odorizzi, Giorgio Agostini, Marco Zardoni
Abstract: Described herein is a method for growing InN, GaN, and AlN materials, the method comprising alternate growth of GaN and either InN or AlN to obtain a film of InxGa1?xN, AlxGa1?xN, AlxIn1?xN, or AlxInyGa1?(x+y)N.
Type:
Grant
Filed:
December 16, 2014
Date of Patent:
March 2, 2021
Assignee:
The Government of the United States of America, as represented by the Secretary of the Navy
Inventors:
Neeraj Nepal, Charles R. Eddy, Jr., Nadeemmullah A. Mahadik, Syed B. Qadri, Michael J. Mehl
Abstract: There is provided a method of fabricating a trapped vacancy in a crystal lattice of a target comprising: positioning the target in a laser system, the target containing vacancy trapping elements within the crystal lattice; modifying the crystal lattice within the target by using a laser to generate a lattice vacancy; and annealing the target to cause the lattice vacancy to migrate and be captured by a vacancy trapping element to form the trapped vacancy in the crystal lattice.
Type:
Grant
Filed:
July 1, 2016
Date of Patent:
March 2, 2021
Assignee:
Oxford University Innovation Limited
Inventors:
Martin James Booth, Patrick Salter, Jason Smith, Yu-Chen Chen
Abstract: Methods for forming single crystal silicon ingots with improved resistivity control and, in particular, methods that involve gallium or indium doping are disclosed. In some embodiments, the ingots are characterized by a relatively high resistivity.
Type:
Grant
Filed:
December 27, 2017
Date of Patent:
February 16, 2021
Assignee:
GlobalWafers Co., Ltd.
Inventors:
Richard J. Phillips, Parthiv Daggolu, Eric Gitlin, Robert Standley, HyungMin Lee, Nan Zhang, Jae-Woo Ryu, Soubir Basak
Abstract: A polycrystalline silicon rod is formed of polycrystalline silicon deposited radially around a silicon core line and is characterized by, in a cross-section that is a perpendicular cut in respect to the axial direction of a cylindrical rod, a ratio of surface area covered by coarse crystal particles having a diameter of 50 ?m or greater is 20% or more of the crystal observed at the face, excluding the core line portion.
Abstract: A ceramic layer is attached to a top surface of a base plate using a bond layer. The ceramic layer has a top surface configured to support a substrate. A clamp electrode assembly is positioned within an upper region of the ceramic layer. The clamp electrode assembly serves to clamp the substrate to the top surface of the ceramic layer and functions as a primary radiofrequency (RF) power delivery electrode. A plurality of RF power delivery connection modules is distributed in a substantially uniform manner about a perimeter of the ceramic layer. Each of the RF power delivery connection modules is configured to form an electrical connection from the base plate to the clamp electrode assembly at its respective location.
Type:
Grant
Filed:
August 29, 2017
Date of Patent:
January 12, 2021
Assignee:
Lam Research Corporation
Inventors:
Neil Martin Paul Benjamin, Henry Povolny, Anthony J. Ricci
Abstract: A crystal pulling apparatus for producing an ingot is provided. The apparatus includes a furnace and a gas doping system. The furnace includes a crucible for holding a melt. The gas doping system includes a feeding tube, an evaporation receptacle, and a fluid flow restrictor. The feeding tube is positioned within the furnace, and includes at least one feeding tube sidewall, a first end through which a solid dopant is introduced into the feeding tube, and an opening opposite the first end through which a gaseous dopant is introduced into the furnace. The evaporation receptacle is configured to vaporize the dopant therein, and is disposed near the opening of the feeding tube. The fluid flow restrictor is configured to permit the passage of solid dopant therethrough and restrict the flow of gaseous dopant therethrough, and is disposed within the feeding tube between the first end and the evaporation receptacle.
Type:
Grant
Filed:
December 20, 2018
Date of Patent:
January 12, 2021
Assignee:
GlobalWafers Co., Ltd.
Inventors:
Stephan Haringer, Roberto Scala, Marco D'Angella
Abstract: The instant disclosure provides a method for preparing a perovskite crystal, including a mixing step, a crystallization step, a diluting step and a recrystallization step. The mixing step includes adding a first precursor and a second precursor into a solvent for forming a supersaturated solution. The crystallization step includes stirring the supersaturated solution for initiating a reaction between the first and second precursors in the supersaturated solution to form a perovskite powder in a solution. The diluting step includes adding the solvent to the solution and stirring the solution for dissociating the perovskite powder in the solution to form a clear solution. The recrystallization step includes adding a crystal seed into the clear solution for initiating a crystallization process on the crystal seed and forming the perovskite crystal.
Abstract: A substrate supporting plate that may prevent deposition on a rear surface of a substrate and may easily unload the substrate. The substrate supporting plate may include a substrate mounting portion and a peripheral portion surrounding the substrate mounting portion. An edge portion of a top surface of the substrate mounting portion may be anodized. A central portion of the top surface of the substrate mounting portion may not be anodized.
Type:
Grant
Filed:
March 6, 2017
Date of Patent:
December 29, 2020
Assignee:
ASM IP HOLDING B.V.
Inventors:
Yong Min Yoo, Jong Won Shon, Seung Woo Choi, Dong Seok Kang
Abstract: A SiC epitaxial wafer having a SiC epitaxial layer formed on a SiC single crystal substrate having an offset angle of 4 degrees or less in a<11-20>direction from a (0001) plane. A trapezoidal defect included in the SiC epitaxial wafer includes an inverted trapezoidal defect in which a length of a lower base on a downstream side of a step flow is equal to or less than a length of an upper base on an upstream side of the step flow. Also disclosed is a method for manufacturing the SiC epitaxial wafer.
Type:
Grant
Filed:
February 16, 2016
Date of Patent:
December 15, 2020
Assignee:
SHOWA DENKO K.K.
Inventors:
Jun Norimatsu, Akira Miyasaka, Yoshiaki Kageshima, Koji Kamei, Daisuke Muto
Abstract: The molybdenum crucible includes a cylindrical side wall and a bottom provided integrally with one end of the side wall. The side wall includes a coarse grain region configured to extend from an outer wall toward an inner wall and a fine grain region configured to extend from the inner wall toward the outer wall so as to be in contact with the coarse grain region. The ratio of the coarse grain region in the side wall in the thickness direction thereof is 10% or more and less than 90%. The coarse grain region is defined as such a region in which crystal grains having a grain size of 1 mm or more determined by an intercept method in the height direction of the crucible occupy 95% or more of an area of a measurement region.
Abstract: A method of producing silicon carbide is disclosed. The method comprises the steps of providing a sublimation furnace comprising a furnace shell, at least one heating element positioned outside the furnace shell, and a hot zone positioned inside the furnace shell surrounded by insulation. The hot zone comprises a crucible with a silicon carbide precursor positioned in the lower region and a silicon carbide seed positioned in the upper region. The hot zone is heated to sublimate the silicon carbide precursor, forming silicon carbide on the bottom surface of the silicon carbide seed. Also disclosed is the sublimation furnace to produce the silicon carbide as well as the resulting silicon carbide material.
Type:
Grant
Filed:
September 5, 2014
Date of Patent:
December 1, 2020
Assignee:
GTAT Corporation
Inventors:
Roman V. Drachev, Parthasarathy Santhanaraghavan, Andriy M. Andrukhiv, David S. Lyttle
Abstract: A reaction chamber is provided. The reaction chamber includes a chamber body, a dielectric window, and a power supplier. The dielectric window is provided on top of the chamber body along a first direction and hermetically connected with the chamber body. Each coil of a plurality of sets of coils is wound around an outer surface of the dielectric window at an interval along the first direction. The plurality of sets of coils are connected in parallel, with first ends electrically coupled to the power supplier for supplying power to each set of the plurality of sets of coils, and with second ends grounded. The second ends of the plurality of sets of coils are arranged in proximity between the first ends.
Abstract: In an embodiment, a wafer carrier includes a pocket sized and shaped to accommodate a wafer, the pocket being defined by a base and a substantially circular perimeter including an inner face and an outer face. The substantially circular perimeter includes a notch in the inner face.
Type:
Grant
Filed:
April 3, 2017
Date of Patent:
November 10, 2020
Assignee:
Infineon Technologies Americas Corp.
Inventors:
Mihir Tungare, Peter Kim, Jianwei Wan, Chankyung Choi
Abstract: A method for producing an AlN single crystal substrate, the method including: i) preparing a first base substrate consisting of a first AlN single crystal; ii) growing a first AlN single crystal layer over a main face of the first base substrate, to obtain a layered body; iii) cutting the first MN single crystal layer of the layered body, to separate the layered body into a second base substrate and a first part of the first AlN single crystal layer, the second base substrate including the first base substrate and a thin film layered thereon, the thin film being a second part of the first AlN single crystal layer; iv) polishing a surface of the thin film, to obtain a third base substrate consisting of a second AlN single crystal; and v) growing a second AlN single crystal layer over the polished surface of the third base substrate.
Abstract: A method of growing a crystal in a recess in a substrate on which an insulating film having the recess is formed, includes: forming a first film on the insulating film at a thickness as not to completely fill the recess; etching the first film by an etching gas to remain the first film only in a bottom portion of the recess; annealing the substrate such that the first film in the bottom portion is modified into a crystalline layer; forming a second film on the insulating film and a surface of the crystalline layer at a thickness as not to completely fill the recess; annealing the substrate such that the second film is crystallized from the bottom portion through a solid phase epitaxial growth to form an epitaxial crystal layer; and etching and removing the second film remaining on the substrate by an etching gas.