Patents Examined by Hyung-Sub Sough
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Patent number: 6175082Abstract: A device for controlling the movement of an electrical cord which connects a computer mouse to a computer. The device is made of a shackle made of a partially cylindrical body having flared lips which extend along the shackle body and a mounting structure attached to the shackle. The device shackle attaches to a mouse cord and the device mounting structure is attachable to stationary objects such as mouse pads or desk tops. The device limits the movement of a computer mouse cord to a length necessary to operate a computer mouse while restraining the remaining mouse cord length by allowing the length of mouse cord between the mouse and the shackle to be moved while the length of cord between the shackle and the computer is held stationary by the device.Type: GrantFiled: May 3, 1995Date of Patent: January 16, 2001Inventors: Robert C. Klinger, Troy E. Bergstrom
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Patent number: 6162990Abstract: An electrical junction box provided for wiring up an automobile. In the electrical junction box, a plurality of bus bars and a wiring board are accommodated in a main cover and an under cover, and tabs raised from the bus bars are inserted into connector mounting frames formed on the main cover and the under cover. One of the tabs is long, and the connector mounting frame of the under cover has a length which makes constant a depth of a recess formed by the connector mounting frame when the bus bar having the long tab is mounted.Type: GrantFiled: September 12, 1997Date of Patent: December 19, 2000Assignee: Yazaki CorporationInventor: Masami Sakamoto
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Patent number: 6160224Abstract: An object of this invention is to provide a solder material capable of, when joining an electronic component to a substrate with the solder material, improving heat fatigue resistance thereof and reducing damage of Ni film interposed therebetween. A solution of this invention is to assemble an electronic part by soldering a semiconductor device with a substrate using solder balls made of a solder material containing from 0.01 to 4.99% by weight of Fe; from 0.01 to 4.99% by weight of Ni, total thereof being from 0.02 to 5.0% by weight; from 0.1 to 8.0% by weight of at least one of Ag and In; from 0 to 70% by weight of Pb, balance containing Sn and unavoidable impurity.Type: GrantFiled: May 12, 1998Date of Patent: December 12, 2000Assignee: Tanaka Denki Kogyo Kabushiki KaishaInventors: Toshinori Ogashiwa, Takatoshi Arikawa
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Patent number: 6153825Abstract: A superconducting current lead includes a cylindrical support member 3, and superconducting wire material units 1 each of which is fixed onto the support member and each of which is composed of a single tape-like oxide superconducting wire material or a laminated tape-like oxide superconducting wire material, wherein tape surf aces of the superconducting wire material units are disposed in parallel with a circumferential direction in a cylindrical coordinate system, and the cylindrical support member is formed from a low thermal conductivity material.Type: GrantFiled: December 26, 1997Date of Patent: November 28, 2000Assignees: Japan Atomic Energy Research Institute, Fuji Electric Co., Ltd., Sumitomo Electric Industries, Ltd.Inventors: Toshinari Ando, Hiroshi Tsuji, Takaaki Isono, Yukio Yasukawa, Kizen Sakaki, Masayuki Konno, Takeshi Kato, Kazuhiko Hayashi
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Patent number: 6150615Abstract: A lead frame used for a semiconductor chip has built-in end resistors accurately patterned through lithographic techniques and an etching from a conductive bonding layer between an insulating film and a conductive metallic foil, the conductive metallic foil is patterned into a conductive island for a semiconductor chip and conductive strips for electric signals, and the built-in end resistors achieve impedance matching for the electric signals.Type: GrantFiled: May 4, 1998Date of Patent: November 21, 2000Assignee: NEC CorporationInventor: Katsunobu Suzuki
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Patent number: 6147876Abstract: Bare IC chips (201 through 203) are mounted on respective areas (101 through 103) of a printed wiring board (100). The outer electrode pads (105) on the peripheries of the board (100) are soldered to another printed wiring board (1) such as a mother board. Lead pads (107) and the outer electrode pads (105) are interconnected through a circuit pattern (109), through holes (111) and interstitial via holes (112). The circuit pattern (109) is disposed on a die bonding surface of the bare IC chips (201 and 202) for which insulation is not necessary. A multi-chip module is thus completed.Type: GrantFiled: June 13, 1996Date of Patent: November 14, 2000Assignee: Kabushiki Kaisha ToshibaInventors: Masayoshi Yamaguchi, Mitsutoshi Sawano, Kazutoshi Hohki
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Patent number: 6147311Abstract: An anisotropic electro-conductive adhesive layer 14 including an adhesive 15 made of a thermosetting or thermoplastic resin containing electro-conductive particles 16 dispersed therein is formed on a basic circuit board 11 carrying a first circuit pattern 12. A second circuit pattern 18 is formed on the anisotropic electro-conductive adhesive layer 14. An end of the second circuit pattern 18 is curved into the anisotropic electro-conductive adhesive layer 14 to be electrically connected with first circuit pattern 12 via the electro-conductive particles 16. Thereby, the production process can be simplified and the production cost can be reduced. Also, the micro-circuit patterns can be arranged at a high density.Type: GrantFiled: August 12, 1997Date of Patent: November 14, 2000Assignee: Shinko Electric Industries Co., Ltd.Inventor: Mitsutoshi Higashi
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Patent number: 6147855Abstract: A variable capacitor that provides a full range of capacitance, while reducing the amount of rotation necessary to effect maximum variation in capacitance, and while eliminating any wear-related deterioration in device performance includes at least two coplanar, electrically isolated sets of parallel electroconductive members so configured as to form a fixed set of capacitor plates, each of which may be separately electrically connected to an electrical circuit. A movable group having at least one member including at least one electroconductive area is positioned parallel to, and spaced from, the fixed set of plates. The movable group is adapted for rotation about an axis perpendicular to a surface plane of the first set of plates to vary an amount by which said movable group overlaps the surface of each of said capacitor plates, and thereby provide variable capacitive coupling between the two isolated electroconductive members that comprise the fixed set of capacitor plates.Type: GrantFiled: June 30, 1997Date of Patent: November 14, 2000Assignee: Applied Materials, Inc.Inventor: William N. Taylor, Jr.
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Patent number: 6144560Abstract: A semiconductor device including bond pads disposed proximate an edge thereof, and an overcoat layer. The overcoat layer defines notches around each of the bond pads. The overcoat layer may be formed from a photoimageable material such as a photoimageable epoxy. The invention also includes an alignment device that secures the semiconductor device perpendicularly upon a carrier substrate. The alignment device includes intermediate conductive elements which correspond to the bond pads of the semiconductor device. Upon insertion of the semiconductor device into the alignment device, the notches facilitate alignment of the bond pads with their corresponding intermediate conductive elements. The intermediate conductive elements establish an electrical connection between the semiconductor device and the carrier substrate.Type: GrantFiled: December 16, 1999Date of Patent: November 7, 2000Assignee: Micron Technology, Inc.Inventors: Warren M. Farnworth, Walter L. Moden, Larry D. Kinsman
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Patent number: 6140592Abstract: An improved fuse associated current conducting pin and sealing structure for a hermetic terminal assembly wall wherein the sealing member has a preselected coefficient of expansion compatible with that of the pin and wall and a softening point temperature in excess of the conducting temperature of the pin surface occasioned by fuse melting.Type: GrantFiled: June 27, 1995Date of Patent: October 31, 2000Assignee: Emerson Electric Co.Inventors: F. Dieter Paterek, Richard L. Teaford
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Patent number: 6137054Abstract: A wire-circuit sheet includes: a resin sheet with circuit connecting holes, wires lying across the circuit connecting holes , and at least on cutting hole to punch the resin sheet so as to cut simultaneously the wires. Further, a wire-circuit sheet and its manufacturing method include: a resin sheet on which a plurality of wires lie as crossing or coming close to each other, cutting holes being provided at the crossing or close points of the plurality of wires to cut off the wires and the sheet together, and the wires being fixed and sandwiched in between laminated resin sheets with a sticky surface.Type: GrantFiled: January 24, 1995Date of Patent: October 24, 2000Assignee: Yazaki CorporationInventors: Kouichi Uezono, Keiichi Ozaki, Sanae Kato, Akira Sugiyama
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Patent number: 6124548Abstract: A retainer (A) aligns and retains ends (E) of branch wires (W1) and wires (W2) to be connected with the branch wires (W1) by means of a wire retaining portion (U). The wire retaining portion (U) is formed with cavities (42) which have a specified depth and into which the wires (W1,W2) are individually inserted, and contact members (60) for coming into contact with the wires (W1,W2) inserted into the cavities (42). The contact members (60) prevent the wires (W1,W2) from coming out of the cavities (42). The contact members (60) also move away from the wires (W1,W2) when necessary. The ends (E) of the branch wires (W1) and the wires (W2) to be connected with the branch wires (W1) can be aligned and retained during a wire arranging operation. After forming a bundle of wires, the wires (W1,W2) can be released from the retainer (A) with their ends (E) aligned. The aligned ends (E) can be easily processed at one time. The number of the wires (W1,W2) to be retained can be easily confirmed.Type: GrantFiled: March 15, 1999Date of Patent: September 26, 2000Assignee: Sumitomo Wiring Systems, Ltd.Inventors: Koutaro Suzuki, Jun Nakata
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Patent number: 6121554Abstract: Connecting pads in pad rows in a signal layer are connected to another signal layer through a plurality of through hole rows each including a plurality of plated through holes that extend through a power source layer. Each of the through hole rows includes a plurality of through holes arranged side by side between each two adjacent pad rows corresponding thereto. These plated through holes each face the space between each two adjacent connecting pads in each corresponding pad row, and are arranged at intervals about twice as long as the intervals between the connecting pads. Each two adjacent through hole rows are located with an offset not smaller than the diameter of each pad in the longitudinal direction of the rows, and the power source layer includes a plurality of clear regions that are cleared of a conductor and penetrated individually by the through holes.Type: GrantFiled: November 28, 1997Date of Patent: September 19, 2000Assignee: Kabushiki Kaisha ToshibaInventor: Yoshinori Kamikawa
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Patent number: 6121553Abstract: An adhesive composition including (a) a polyamide-imide resin preferably having a molecular weight of 80,000 or more and (b) a thermosetting component preferably including an epoxy resin and a curing agent and/or a curing accelerator therefor is used for providing an insulating adhesive layer having a storage elastic modulus at 300.degree. C. of 30 MPa or more and a glass transition temperature of 180.degree. C. or higher. The insulating adhesive is suitable for use in wire scribed circuit boards, multilayer printed circuit boards, and circuit boards for chip carriers.Type: GrantFiled: October 23, 1997Date of Patent: September 19, 2000Assignee: Hitachi Chemical Company, Ltd.Inventors: Eiichi Shinada, Masao Kanno, Yuuichi Shimayama, Yoshiyuki Tsuru, Takeshi Horiuchi
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Patent number: 6122178Abstract: A PCMCIA electronics package adapted to enclose, and provides EMI shielding to, a printed circuit board (PCB). The PCB has an electrical connector adapted for plugging into a computer is at a one end and RF circuitry at the other end. Electronic components are disposed on an inner region of the surfaces of the PCB. The PCB has a ground plane conductor disposed therein. Electrically conductive strips are disposed on the surfaces of the PCB along opposing side edges and the other end of the PCB. A plurality of conductive vias pass through a portion of the PCB electrically connecting the electrical strip conductors to the ground plane conductor. A plurality of resilient, electrically conductive clips is provided. Each one of the clips has: a cup-shaped region disposed over a corresponding one of the PCB edges and the other end of the PCB. Side portions of the cup-shaped regions are in contact with conductive strips. The clips have an arm with a distal end elevated from the PCB.Type: GrantFiled: November 25, 1997Date of Patent: September 19, 2000Assignee: Raytheon CompanyInventors: Macdonald J. Andrews, Richard G. Berard, Arnold E. VanDoren
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Patent number: 6118079Abstract: A polymer insulator having a core member, an insulation overcoat member arranged on an outer surface of the core member, and a securing metal fitting fixed to an end portion of the core member in such a manner that the end portion is contacted with the insulation overcoat member is disclosed. The disclosed polymer insulator further includes a seal portion arranged at a boundary between the insulation overcoat member and the securing metal fitting, which is made of a sealing agent in which 80-250 parts by weight of ATH (Alumina trihydrate, Al.sub.2 O.sub.3.3H.sub.2 O) is included with respect to 100 parts by weight of a polymer component. Therefore, the polymer insulator according to the invention has an improved tracking-erosion resistance performance.Type: GrantFiled: June 11, 1998Date of Patent: September 12, 2000Assignee: NGK Insulators, Ltd.Inventors: Yukihiro Koshino, Takanori Kondou
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Patent number: 6114622Abstract: A personal computer chassis including a bottom element, front and back walls, and a side wall. The front wall is mounted to a front end of the bottom element, and the back wall is mounted to the back end of the bottom element. The side wall is hinged to a first side end of the bottom element. When the side wall is in a closed position, it is capable of engaging with the front wall and the back wall. The side wall may help the chassis maintain an EMI shield for the computer. The side wall may be configured to allow opening and closing without the use of a tool. Moreover, the side wall may optionally remain attached to the bottom element when opened such that the side wall can not readily be lost or misplaced. The hinged side wall may include reinforcement members extending generally perpendicularly outward from its edges, for improving the structural integrity of the chassis in the closed position. The disclosure further shows a computer chassis having a back wall defining an access opening.Type: GrantFiled: May 6, 1998Date of Patent: September 5, 2000Assignee: Bermo, Inc.Inventor: Ronald Michael Draeger
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Patent number: 6115257Abstract: A PCMCIA card structure includes a front connector, a frame, a substrate, and a sheet metal cover having a top cover panel. A ground plate having rearwardly extending ground contacts is carried on the upper surface of the connector. The frame includes an insulative cross beam disposed adjacent to the rear of the connector, the cross beam serving to support the top cover panel of the card, to prevent the top cover panel from contacting the connector ground plate or the contacts extending from the ground plate, and, along with portions of the ground plate, to close off the space between the connector and the front edge of the top cover panel. The ground plate has a transverse length shorter than that of the connector, thereby defining end shoulder surfaces along the upper surface of the connector. The top cover panel includes a pair of laterally spaced, forwardly extending tabs, each tab overlying an end shoulder surface on the connector.Type: GrantFiled: July 9, 1999Date of Patent: September 5, 2000Assignee: Xircom, Inc.Inventor: Ian A. Laity
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Patent number: 6115260Abstract: A terminal structure in a memory module includes a male connector having a plurality of terminal strips adapted to be engaged with the terminal tongues in the female socket. Each of the terminal strips has an obstacle removal portion defined therein for removing foreign matter present on at least one of the terminal tongues.Type: GrantFiled: February 26, 1999Date of Patent: September 5, 2000Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Takao Nakajima, Tetsurou Tsuji, Tetsuro Washida
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Patent number: RE37010Abstract: A communication cable includes a plurality of twisted pairs of electrical conductors, each electrical conductor being surrounded by a layer of plenum rated insulation. The cable also includes at least one additional twisted pair of electrical conductors, each electrical conductor thereof being surrounded by a layer of non-plenum rated insulation.Type: GrantFiled: August 22, 1996Date of Patent: January 9, 2001Assignee: Alcatel NA Cable Systems, Inc.Inventor: Kerry Newmoyer