Abstract: A rectifier is described herein. According to one example, the rectifier includes a semiconductor substrate and further includes an anode terminal and a cathode terminal connected by a load current path of a first MOS transistor and a diode that is connected parallel to a load current path. An alternating input voltage is operably applied between the anode terminal and the cathode terminal. Further, the rectifier includes a control circuit that is configured to switch the first MOS transistor on for an on-time period, during which the diode is forward biased. The first MOS transistor, the diode, and the control circuit are integrated in the semiconductor substrate.

Abstract: A dynamic threshold determining circuit changes the threshold voltage used to determine when to inject additional energy to increase a power converter's output voltage in response to a low voltage transient for the converter. By being able to change the threshold, finer control of the energy input for correcting transients is possible. In one implementation, the threshold is closer to the target voltage than a typical static threshold value used for transient correction, and the energy injected is smaller than that typically used for transient correction. Thus, the power converter will have a fast response to a transient but be less likely to overshoot the correction. Should the transient continue, the threshold can be changed to move further from the target value while an increased amount of energy is added so that the system can dynamically move to correct bigger transients.

Abstract: System and method for regulating a power conversion system. A system controller for regulating a power conversion system includes an operation-mode-selection component and a driving component. The operation-mode-selection component is configured to receive a first signal related to an output load of the power conversion system and a second signal related to an input signal received by the power conversion system and output a mode-selection signal based on at least information associated with the first signal and the second signal. The driving component is configured to receive the mode-selection signal and generate a drive signal based on at least information associated with the mode-selection signal, the driving signal corresponding to a switching frequency.

Abstract: One or more embodiments of the present disclosure may include a method of power regulation. The method may include determining a peak voltage level on a primary winding of a transformer. The method may also include selecting a particular coarse current level window based on the determined current level. Wherein the particular coarse current level window is one of a plurality of coarse current level windows. The method may additionally include determining a low window value based on the particular coarse current level window. The method may include generating a reference voltage based on the low window value. The method may also include generating a control signal based on the reference voltage. The method may additionally include transmitting the control signal to a switch circuit coupled to the primary winding of the transformer to adjust the current level on the primary winding of the transformer.

Abstract: A multilevel converter converting between AC and DC includes a phase leg having a first and a second phase arm, the first phase arm being connected between a first pole having a first potential and a first AC terminal and the second phase arm being connected between the first AC terminal and a second potential, where the phase arms include half-bridge and full-bridge cells, where each cell includes at least one energy storage element for providing the voltage contribution and cell switching units with cell switches and anti-parallel diodes for controlling the voltage contribution, where the full-bridge cells include a bypass switch controllable to bypass the corresponding energy storage element, and when a phase-to-ground fault occurs the cell switches are blocked and the bypass switches activated with a delay in relation to the blocking.

Abstract: A circuit includes a zero current detector (ZCD) circuit that senses an inductor current of an inductor and generates signal pulses indicating when an increasing cycle of the inductor current crosses a predetermined current value and when a decreasing cycle of the inductor current crosses the predetermined current value. A sync control provides a control signal specifying one of the signal pulses corresponding to the increasing or decreasing cycle of the inductor current. A sync selector circuit generates a sync pulse representing the signal pulse from the ZCD in response to the control signal. The sync pulse triggers a timing adjustment for a switch device.

Abstract: Some apparatus and associated methods relate to a buck-derived switched mode power supply with constant on-time and configured to substantially maintain a steady-state average switch period in a time interval between a start of a load transient and the time when the inductor current returns to a steady state. In an illustrative example, the time interval may include a first and a second predetermined number of cycles after the start of the load transient. The switch period may be modulated, for example, by an amount calculated to supply a change in additional energy demand in the first number of cycles and an opposite amount in the subsequent second number of cycles calculated to maintain the average steady-state switch period over the time interval. In various examples, maintaining average switching period with constant on-time may minimize transient response times without sacrificing stability and without the need for complex compensation networks.

Abstract: The present disclosure discloses an active clamp circuit for a power semiconductor switch and a power converter using the same. The active clamp circuit includes: a discharging circuit, a first terminal of the discharging circuit being electrically connected to a collector of the power semiconductor switch; an unidirectional blocking circuit; a first voltage regulator diode connected in series with the unidirectional blocking circuit to form a series branch, a first terminal of the series branch being electrically connected to the collector of the power semiconductor switch; and a resistance-capacitance RC circuit, a first terminal of the RC circuit, a second terminal of the discharging circuit, and a second terminal of the serial circuit being electrically connected, a second terminal of the RC circuit being electrically coupled to a gate of the power semiconductor switch.

Abstract: A voltage regulator circuit is disclosed. In one embodiment, a low drop-out (LDO) voltage regulator includes a voltage loop and a current loop. The current loop includes a source follower coupled to an output node of the LDO voltage regulator, the source follower being implemented with a PMOS transistor. The current loop also includes a current mirror coupled between a first branch of the current loop and a second branch of the current loop. The source follower is implemented in the second branch of the current loop. The voltage loop includes an amplifier circuit having an inverting input coupled to the output node, and a non-inverting input coupled to receive a reference voltage. The output of the amplifier is coupled to the gate terminal of the PMOS transistor of the current mirror.

Abstract: A driving circuit includes a power switch driver and a plurality of current-limiting circuits. The power switch driver is configured to output a driving signal according to a switching signal. Each of the current-limiting circuits has an input terminal electrically coupled to a corresponding one of output terminals of the power switch driver respectively. Output terminals of the current-limiting circuits are electrically coupled to a control terminal of a power switch. The power switch driver is configured to selectively output the driving signal to one of a plurality of output terminals according to a load state of the power switch, such that the driving signal is outputted to the control terminal of the power switch via one of the current-limiting circuits.

Abstract: A multi-stage switching power supply includes a first DC-DC power converter, a second DC-DC power converter and a control circuit. The control circuit is coupled to the DC-DC power converters for providing a first control signal to the first DC-DC power converter and a second control signal to the second DC-DC power converter. The control circuit is configured to vary a duty cycle of the first control signal to regulate an output voltage of the power supply, maintain a frequency of the second control signal at a fixed frequency, and in response to the duty cycle of the first control signal reaching a duty cycle threshold or an input voltage of the first DC-DC power converter reaching a voltage threshold, vary a frequency of the second control signal to regulate the output voltage of the power supply. Other example power supplies, control circuits, etc. are also disclosed.

Abstract: A power converter which converts between a first current at a first voltage provided at a first node and a second current at a second voltage provided at a second node. The power converter has a flying capacitor, an inductor and five switches. Furthermore, the power converter has a control unit to control four switches during steady state operation within a sequence of different operations states, in order to set the second voltage or the second current to a target level. In addition, the control unit detects the occurrence of a load transient at the second node, and in reaction to detecting occurrence of a load transient, to at least partially close a bypass switch, in order to provide additional current from the flying capacitor to the second node or in order to divert current from the inductor towards the reference potential.

Abstract: Controllers and methods for controlling power supplies are disclosed herein. An example of a controller includes comparison circuitry operable to compare a switching frequency of the controller to a predetermined switching frequency. Voltage measuring circuitry is operable to measure the output voltage of the power supply. Circuitry is operable to disable at least one component in the power supply in response to the switching frequency being less than the predetermined switching frequency and the output voltage being greater than a predetermined output voltage.

Abstract: The embodiments of the present disclosure disclose a low dropout regulator and a method for controlling the same. The low dropout regulator comprises a control circuit configured to compare a output voltage with a first threshold voltage and a second threshold voltage, generate a first control signal when the output voltage is less than the first threshold voltage or greater than the second threshold voltage and a second control signal when the output voltage is greater than the first threshold voltage and less than the second threshold voltage; a digital regulator circuit configured to adjust the output voltage according to the first control signal and maintain the output voltage according to the second control signal; and an analog regulator circuit configured to output feedback current to the output terminal according to the output voltage and the reference voltage under the trigger of the second control signal.

Abstract: A circuit and method for controlling a power converter having a high-side and a low-side switch are provided. The circuit may include a comparator configured to receive a reference voltage at a first input and a ramp voltage at a second output, and to output a delay signal based on a comparison of the reference voltage and the ramp voltage. The delay signal may be configured to turn on one or more of the high-side switch and the low-side switch. The circuit may increase or decrease the reference voltage based on a dead time, which equals an amount of time when the high-side switch and the low-side switch are turned off. The circuit may include a first switch that is controlled to lower the reference voltage if a dead time exceeds a first threshold, and a second switch that is controlled to raise the reference voltage if the dead time delay signal is below a second threshold.

Abstract: One example includes a transconductor system. The system includes a first transconductance amplifier that generates a control current in response to a first input voltage. The system also includes a second transconductance amplifier that generates an output signal in response to a second input voltage. The system further includes an intermediate amplifier that generates a control voltage in response to the control current and a third input voltage. The control voltage can be provided to the first and second transconductance amplifiers to set a transconductance of each of the first and second transconductance amplifiers to be approximately equal.

Abstract: A full bridge circuit is disclosed. The full bridge circuit includes first and second half bridge circuits each having a midpoint node, and a transmitter tank circuit connected across the midpoint nodes and configured to transmit power based on the transmitter tank current to a load. The full bridge circuit also includes a ZVS tank circuit connected across the midpoint nodes. The ZVS tank circuit generates first and second ZVS tank currents. The first ZVS tank current and the transmitter tank current cooperatively cause the voltage at the first midpoint node to be substantially equal to the voltage of a power or ground node, and the second ZVS tank current and the transmitter tank current cooperatively cause the voltage at the second midpoint node to be substantially equal to the voltage of the power or ground node.

Abstract: A control circuit according to an embodiment of the present invention is configured to control a switching element of a switching power supply. The control circuit includes a comparator having a first input terminal configured to receive an output voltage of the switching power supply. The comparator has a second input terminal that is connectable to a positive terminal of a reference voltage source. The comparator has an output. The output brings the reference voltage to a first voltage while the output signal takes a first voltage level. The output brings the reference voltage to a second voltage while the output signal takes a second voltage level. The constant voltage source has a positive terminal connected to a negative terminal of the reference voltage source and a ground of the comparator.

Abstract: A power converter controller includes a drive circuit to generate a drive signal to control switching of a power switch. The drive circuit generates the drive signal in response to a current sense signal, a current limit signal, a frequency skip signal, and a hold signal. A current limit generator generates the current limit signal in response to a load. A frequency detection circuit generates the frequency skip signal in response to the drive signal to indicate when an intended frequency of the drive signal is within a frequency window. The current limit signal remains fixed for at least a switching cycle when the intended frequency is within the frequency window. A first latch generates the hold signal to control the current limit generator to hold the current limit signal. The first latch generates the hold signal in response to the frequency skip signal and a feedback signal.

Abstract: In an embodiment, a current sense circuit includes a copy transistor having a gate configured to be coupled to a gate of an output transistor, and a drain coupled to an input terminal. The drain of the copy transistor is configured to be coupled to a drain of the output transistor. A first transistor has a current path coupled to a current path of the copy transistor. An error amplifier has a non-inverting input coupled to a source of the copy transistor, an inverting input configured to be coupled to a source of the output transistor, an output coupled to a gate of the first transistor, a positive power supply terminal coupled to the input terminal and a negative power supply terminal coupled to a reference supply terminal. A current-to-voltage converter has an input coupled to the current path of the copy transistor.