Abstract: The present technology relates to a solid-state imaging device, manufacturing method of a solid-state imaging device, and an electronic device, which can provide a solid-state imaging device having further improved features such as reduced optical color mixing and the like. Also, an electronic device using the solid-state imaging device thereof is provided. According to a solid-state imaging device having a substrate and multiple photoelectric converters that are formed on the substrate, an insulating film forms an embedded element separating unit. The element separating unit is configured of an insulating film having a fixed charge that is formed so as to coat the inner wall face of a groove portion, within the groove portion which is formed in the depth direction from the light input side of the substrate.

Abstract: The present technology relates to a solid-state imaging device, manufacturing method of a solid-state imaging device, and an electronic device, which can provide a solid-state imaging device having further improved features such as reduced optical color mixing and the like. Also, an electronic device using the solid-state imaging device thereof is provided. According to a solid-state imaging device having a substrate and multiple photoelectric converters that are formed on the substrate, an insulating film forms an embedded element separating unit. The element separating unit is configured of an insulating film having a fixed charge that is formed so as to coat the inner wall face of a groove portion, within the groove portion which is formed in the depth direction from the light input side of the substrate.

Abstract: A laser-based coating removal method debonds a film from a substrate rather than ablating the film. A laser light is transmitted through a transparent film to an underlying bonding layer for bonding the film to one or more additional films and/or a substrate. The laser light is absorbed at the bonding layer and the transparent film is released. In some embodiments, after the transparent film is released it is able to be physically removed.

Abstract: A light-emitting device is provided. The light-emitting device comprises a substrate; a semiconductor stack on the substrate comprising a first region and a second region; a first trench extending from the semiconductor stack to the substrate to expose a surface of the substrate and separating the first region from the second region; and a first electrode comprising a first pad on the first region and a first extending electrode connecting to the first pad, wherein the first extending electrode is across the first trench.

Abstract: A semiconductor device includes: a substrate having an active region; a gate structure disposed in the active region; source/drain regions respectively formed within portions of the active region disposed on both sides of the gate structure; a metal silicide layer disposed on a surface of each of the source/drain regions; and contact plugs disposed on the source/drain regions and electrically connected to the source/drain regions through the metal silicide layer, respectively. The metal silicide layer is formed so as to have a monocrystalline structure.

Abstract: A nitride semiconductor light-emitting element includes at least an n-type nitride semiconductor layer, a light-emitting layer, and a p-type nitride semiconductor layer. A multilayer body is provided between the n-type nitride semiconductor layer and the light-emitting layer, having at least one stack of first and second semiconductor layers. The second semiconductor layer has a greater band-gap energy than the first semiconductor layer. The first and second semiconductor layers each have a thickness of more than 10 nm and 30 nm or less. In applications in which luminous efficiency at room temperature is a high priority, the first semiconductor layer has a thickness of more than 10 nm and 30 nm or less, the second semiconductor layer has a thickness of more than 10 nm and 40 nm or less, and the light-emitting layer has V-shaped recesses in cross-sectional view.

Abstract: A light-emitting device of an embodiment of the present application comprises light-emitting units; a transparent structure having cavities configured to accommodate at least one of the light-emitting units; and a conductive element connecting at least two of the light-emitting units.

Abstract: A fin cut process cuts semiconductor fins after forming sacrificial gate structures that overlie portions of the fins. Selected gate structures are removed to form openings and exposed portions of the fins within the openings are etched. An isolation dielectric layer is deposited into the openings and between end portions of the cut fins. The process enables a single sacrificial gate structure to define the spacing between two active regions on dissimilar electrical nets.

Abstract: A semiconductor device including pixels arranged in a matrix of n rows and m columns, in which the pixels in the m-th column are shielded from light, is provided.

Abstract: A semiconductor device includes a first nitride semiconductor layer, a second nitride semiconductor layer containing aluminum located on the first nitride semiconductor layer, one or more nitride layers containing aluminum located on the second nitride semiconductor layer, a source electrode located on the second nitride semiconductor layer, a drain electrode located on one of the second nitride semiconductor layer or the nitride layer, and a gate electrode located between the source electrode and the drain electrode. An end of the nitride layer on the source electrode side thereof is located between the gate electrode and the drain electrode.

Abstract: Disclosed are highly luminescent nanostructures, particularly highly luminescent quantum dots, comprising a nanocrystal core of InP and shell layers of GaP and AlP. The nanostructures may have an additional shell layer. Also provided are methods of preparing the nanostructures, films comprising the nanostructure and devices comprising the nanostructures.

Abstract: A thin film transistor includes a gate electrode, a semiconductor layer, a source electrode, and a drain electrode. The semiconductor layer overlaps the gate electrode and includes a channel layer comprising an oxide semiconductor and an auxiliary layer comprising amorphous silicon. The source electrode and the drain electrode are separated from each other and connected to the semiconductor layer. A thin film transistor array panel and method of manufacturing same also is disclosed.

Abstract: A cutting apparatus including a cutting unit on which a cutting blade is detachably mounted, a control unit for controlling the cutting unit, and a blade case holder for holding a blade case for storing the cutting blade is provided. The blade case is provided with an IC tag allowing reading and writing of use history information of the cutting blade. The control unit is connected to a read/write unit for reading the use history information from the IC tag of the blade case held by the blade case holder and writing the use history information to the IC tag. The use history information read from the IC tag by the read/write unit is reflected in processing conditions for a workpiece to be processed, and the use history information after processing of the workpiece is written to the IC tag by the read/write unit.

Abstract: A semiconductor device and a manufacturing method thereof are provided. The semiconductor device includes a substrate, a metal-oxide-semiconductor (MOS) transistor, and a dielectric layer. The MOS transistor includes a gate structure formed over the substrate. The dielectric layer is formed aside the gate structure, and the dielectric layer is doped with a strain modulator. An effective lattice constant of the dielectric layer modified by the doping with the strain modulator is different from an effective lattice constant of the dielectric layer prior to the doping.

Abstract: A light emitting device includes a substrate, a light emitting chip, a first electrode, and a second electrode. The light emitting chip includes a first and a second semiconductor layers. The first semiconductor layer is disposed on the substrate. The second semiconductor layer is stacked on the first semiconductor layer and forms a light emitting junction with the first semiconductor layer. The first electrode connects to the first semiconductor layer and the second electrode connects to the second semiconductor layer. The light emitting device may further include a transparent layer that is disposed on the substrate and surrounds and contacts the lateral of the light emitting chip. A refraction index of the transparent layer is between a refraction index of the light emitting chip and that of a vacuum. The first electrode may penetrate the second semiconductor layer to connect to the first semiconductor.

Abstract: Embodiments of the present disclosure describe multi-device flexible systems on a chip (SOCs) and methods for making such SOCs. A multi-material stack may be processed sequentially to form multiple integrated circuit (IC) devices in a single flexible SOC. By forming the IC devices from a single stack, it is possible to form contacts for multiple devices through a single metallization process and for those contacts to be located in a common back-plane of the SOC. Stack layers may be ordered and processed according to processing temperature, such that higher temperature processes are performed earlier. In this manner, intervening layers of the stack may shield some stack layers from elevated processing temperatures associated with processing upper layers of the stack. Other embodiments may be described and/or claimed.

Abstract: In the manufacture of a semiconductor device using a lead frame, in which an outer lead is electrically connected to an inner lead suspension lead via an inner lead, an encapsulating resin is formed over the inner lead, part of the outer lead, and part of the inner lead suspension lead. The parts of the outer lead and the inner lead suspension lead that protrude from the resin are cut, and a plated film is formed on the portion of the cut outer lead that protrudes from the resin so that a solder layer is easily formed on all exposed surfaces of the outer lead. The inner lead suspension lead includes a narrowed portion that is smaller in cross-sectional area than other portions of the inner lead suspension lead, and an outline of the resin overlaps the narrowed portion of the inner lead suspension lead in plan view so as to suppress impact forces generated when the inner lead suspension lead is cut at the narrowed portion.

Abstract: A hybrid packaging multi-chip semiconductor device comprises a lead frame unit, a first semiconductor chip, a second semiconductor chip, a first interconnecting structure and a second interconnecting structure, wherein the first semiconductor chip is attached on a first die paddle and the second semiconductor chip is flipped and attached on a third pin and a second die paddle, the first interconnecting structure electrically connecting a first electrode at a front surface of the first semiconductor chip and a third electrode at a back surface of the second semiconductor chip and a second electrode at the front surface of the first semiconductor chip is electrically connected by second interconnecting structure.

Abstract: Devices and methods are disclosed, related to shielding and packaging of radio-frequency (RF) devices on substrates. In some embodiments, A radio-frequency (RF) module comprises a lead-frame package with a plurality of pins and at least one pin exposed from overmold compound. The module further includes a metal-based covering over a portion of the lead-frame package. Additionally, the metal-based covering can be in contact with the at least one pin.

Abstract: Semiconductor devices and methods are provided in which vertical fuse devices are integrally formed with FINFET (Fin Field Effect Transistor) devices, wherein the vertical fuse devices are formed as part of a process flow for fabricating the FINFET devices. For example, a semiconductor device comprises first and second vertical semiconductor fins, a vertical fuse device, and a FINFET device. The vertical fuse device comprises a metal fuse element formed over a portion of the first vertical semiconductor fin, and the FINFET device comprises a metal gate electrode formed over a portion of the second vertical semiconductor fin. The metal fuse element and the metal gate electrode are concurrently formed as part of a replacement metal gate process flow.