Abstract: This disclosure relates to current flattening circuits for an electrical load. The current flattening circuits incorporate randomize various parameters to add noise onto the supply current. This added noise may act to reduce the signal to noise ratio in the supply current, increasing the difficulty of identifying a computational artifact signal from power rail noise.

Abstract: An on-chip resistor correction circuit includes a first MOS transistor connected between VDD and a reference resistor, the other end of the reference resistor being grounded; an operational amplifier for outputting a first control signal based on a reference voltage and a voltage of the reference resistor; a second MOS transistor connected between VDD and a reference node; a branch where each of the on-chip resistors is located is controllably connected between the reference node and ground; a comparator for generating a comparison signal based on the voltage of the reference node and the reference voltage; and a controller for generating a control signal under the action of the comparison signal to control the branch where each of the on-chip resistors is located to turn on or off.

Abstract: A power supply system with line loss reduction supplies power to a load through a power line. The power supply system includes a step-up converter, a detection circuit, and a control unit. The control unit sets a terminal voltage required by the load, controls an output voltage of the step-up converter to be terminal voltage, and acquires an output current corresponding to the terminal voltage to be a present current by the detection circuit. The control unit controls the output voltage to be a modulated voltage, and acquires an output current corresponding to the modulated voltage to be a modulated current by the detection circuit. The control unit adjusts the output voltage to be a first predetermined voltage according to the terminal voltage, the present current, the modulated voltage, and the modulated current.

Abstract: A multiple output universal serial bus travel adaptor includes: at least one AC-DC converter for converting an AC power to a first DC power; at least one DC-DC converter for providing a second DC power according to the first DC power; plural switches which are coupled to the AC-DC converter and/or the DC-DC converter to provide the first DC power or the second DC power to corresponding connectors according to operation signals; and a protocol controller configured to generate the operation signals according to at least one of the following parameters: a) the types of the connectors; b) whether there is a mobile device connected with the connectors; c) a first command from the mobile device; d) the power consumed by the mobile devices; e) the currents flowing through the connectors; and f) the voltages at the connectors.

Abstract: A power-on reset circuit with reduced detection time. One example power-on reset circuit generally includes a voltage sensing circuit having an input coupled to a first power supply rail; a variable resistance component having a control input coupled to an output of the voltage sensing circuit and having a first terminal coupled to the first power supply rail; and an amplitude detection circuit having a first input coupled to the first power supply rail and having a second input coupled to a second terminal of the variable resistance component, the amplitude detection circuit being configured to generate a power-on reset signal at an output of the amplitude detection circuit based on a difference between a first voltage of the first power supply rail and a second voltage at the second terminal of the variable resistance component.

Abstract: A voltage generation circuit includes an operation voltage driving circuit configured to drive an operation voltage based on a calibration voltage and a feedback voltage and generate the feedback voltage from the operation voltage. The voltage generation circuit also includes a reference voltage calibration circuit configured to generate the calibration reference voltage, wherein the calibration reference voltage varies based on a set value calculated according to the feedback voltage and a reference voltage.

Abstract: There is disclosed a method of supplying an n-channel transistor, operating as a voltage regulator, with a supply voltage and providing a control voltage to the n-channel transistor. The n-channel transistor is controlled by the control voltage to output an operating voltage of a printhead at a predetermined voltage.

Abstract: A voltage converter includes an inductor, a transistor, a comparator, an error amplifier, and a slope generator circuit. The transistor has a control input and first and second transistor current terminals. The first current terminal is coupled to the inductor. The comparator has first and second comparator inputs and a comparator output. The comparator output is usable to control the transistor's control input. The error amplifier has an error amplifier input and an error amplifier output. The error amplifier output is coupled to the first comparator input. The slope generator circuit is coupled to at least one of the first or second comparator inputs. The slope generator circuit is configured to generate a slope compensation current which, during at least a portion of each cycle of operation of the voltage regulator, varies approximately exponentially with respect to time.

Abstract: A voltage dividing capacitor circuit includes a first capacitor voltage divider and a second capacitor voltage divider. The first capacitor voltage divider is connected to a second voltage node, the first capacitor voltage divider includes a first flying capacitor and a plurality of first switches, the second voltage node coupled to a second load capacitor, the plurality of first switches connected in series between a first voltage node and a ground node, the first voltage node coupled to a first load capacitor, and the ground node coupled to a ground voltage. The second capacitor voltage divider is connected between the first voltage node and the second voltage node, and includes a second flying capacitor and a plurality of second switches, the plurality of second switches connected in series between the first voltage node and the second voltage node.

Abstract: A charge pump having only NMOS devices charges a plurality of capacitors to a parallel charged voltage level by electrically connecting the capacitors in parallel between an input voltage node and a ground by activating a plurality of first NMOS transistor switches and a plurality of second NMOS transistor switches and deactivating a plurality of third NMOS transistor switches. The charge pump then generates a series capacitor output voltage level at a capacitor series output node by electrically connecting and discharging the capacitors in series between the input voltage node and the capacitor series output node by activating the third NMOS transistor switches and deactivating the first NMOS transistor switches and the second NMOS transistor switches.

Abstract: A method to bypass a voltage regulator of a system on a chip (SOC) comprising powering a first power domain using a voltage regulator; powering a second power domain using the voltage regulator; coupling a third power domain with an external voltage source; raising an external voltage supply from the external voltage source above a threshold level of the voltage regulator; coupling the first second power domains to the external voltage source; turning OFF the voltage regulator of the SOC after coupling the first power domain of the SOC and the second power domain of the SOC to the external voltage source; and powering the first power domain of the SOC, the second power domain of the SOC, and the third power domain of the SOC with the external voltage source, the external voltage source bypassing the voltage regulator.

Abstract: A damage predicting device of a power semiconductor switching element includes a resistor connected to a gate of the power semiconductor switching element, and control circuitry. The control circuitry compares a detection voltage matching a voltage generated between two ends of the resistor and a reference voltage, and predicts that predetermined damage has been accumulated in a gate insulating layer in the power semiconductor switching element when the detection voltage exceeds the reference voltage.

Abstract: An inverter energy system supplies power to a site. The inverter energy system comprises a number of solar strings, each solar string including a solar panel(s) as a renewable energy source and an inverter. The inverter energy system is connected to a mains power supply (grid) and to a site load (sub circuits). The forward or reverse power flow into or out of the mains power supply is monitored at a monitoring point at the site. A rate limit is set for power flow into and/or or out of the mains power supply. The supply of power from the inverter energy system is controlled so that the power flow into or out of the mains power supply is within the set rate limit.

Abstract: In an embodiment, a voltage comparator includes: a first switch having a conduction terminal coupled to an internal node that is coupled to an output of the voltage comparator; a current source; a capacitor; and a second switch connected in parallel with the capacitor, wherein the current source, the capacitor, and the first switch are coupled in series.

Abstract: Examples include a driver circuit for driving a voltage controlled electro-optical modulator. The driver circuit includes a supply input and an input for receiving the input voltage. The driving circuit further includes a level shifter circuit, which includes first and second capacitors and is electrically connected to the input, and a voltage distribution circuit, which is electrically connected between the level shifter circuit and an output of the driver circuit for providing the output voltage. The level shifter circuit is configured to generate, based on the input voltage and using the first capacitor, a first voltage varying between the positive supply voltage level and a positive first level that is greater than the positive supply voltage level. The level shifter circuit is also configured to generate, based on the input voltage and using the second capacitor, a second voltage varying between ground and a negative second level.

Abstract: Various embodiments relate to a mode detector configured to determine a mode of a circuit based upon an attached power source, including: a first latch configured to hold an first input value and output the first held value and an inverse of the first held value; a second latch configured to hold a second input value and output the second held value and an inverse of the second held value; a first output switch connected between a first power source line and a power source output of the mode detector, wherein the first output switch is configured to be controlled by the output of the first latch; a second output switch connected between a second power source line and the power source output of the mode detector, wherein the second output switch is configured to be controlled by the output of the second latch; a first AND gate with a first input and a second input connected to the inverse output of the second latch, wherein the first input is configured to receive a first power on reset signal based upon the f

Abstract: A mobile device includes; a PCB including a first side and a second side, a PMIC generating power supply voltages and mounted on the second side of the PCB, a package substrate mounted on the first side of PCB using first interconnects, an IC mounted on the first side of the package substrate, LDO regulators mounted on the second side of the package substrate and disposed between the first interconnects, and high density capacitors disposed between each of the LDO regulators and the second side of the package substrate, wherein the PCB includes first electrical paths connecting the PMIC to the LDO regulators, and the package substrate includes second electrical paths connecting the LDO regulators to the IC.

Abstract: A bandgap circuit includes a supply node as well as a first and second bipolar transistors having jointly coupled base terminal at a bandgap node providing a bandgap voltage. First and second current generators are coupled to the supply node and supply mirrored first and second currents, respectively, to first and second circuit nodes. A third circuit node is coupled to the first bipolar transistor via a first resistor and coupled to ground via a second resistor, respectively. The third circuit node is also coupled to the second bipolar transistor so that the second resistor is traversed by a current which is the sum of the currents through the bipolar transistors. A decoupling stage intermediate the current generators and the bipolar transistors includes first and second cascode decoupling transistors having jointly coupled control terminals receiving a bias voltage sensitive to the bandgap voltage.

Abstract: A circuit includes first and second transistors, a capacitor, and a controller. The controller is coupled to the control inputs of the first and second transistors. The controller configured to, during a first mode and in accordance with a first time-varying duty cycle, turn on and off the first transistor while turning on the second transistor when the first transistor is off. The controller is also configured to, during a second mode following the first mode, and in accordance with a second time-varying duty cycle, turn on and off the first transistor while turning on the second transistor when the first transistor is off.

Abstract: A power supply system includes a plurality of power supplies coupled to a common power bus. Each of the plurality of power supplies adjusts an output voltage set-point within a droop window in response to an excursion sensed voltage on the common power bus reflecting the current load on the power supply system. In response to a transient in the sensed voltage being above or below the droop window, each power supply may shift its droop window up or down. If the droop window of each power supply is at a maximum or minimum value within a voltage regulation window, each power supply may respond to a transient in the sensed voltage by compressing the droop window.