Abstract: A quadrature voltage controlled oscillator (QVCO) for providing an oscillating output signal. The QVCO includes a first oscillating circuit for producing a first output signal and a second output signal, those signals being a first set of antiphase signals. The QVCO also includes a second oscillating circuit for producing a first output signal and a second output signal, those signals being a second set of antiphase signals. The first oscillating circuit also has injection circuitry for injecting the second set of antiphase signals without a DC bias into the first output signal and the second output signal, and the second oscillating circuit also has injection circuitry for injecting the first set of antiphase signals without a DC bias into the third output signal and the fourth output signal.

Abstract: A circuit includes an oscillator circuit to receive a bias current and generate an oscillating signal at an output node. A current differencing circuit subtracts a current at the output node from a reference current to generate a first current. In addition, a current mirroring circuit mirrors the first current to generate the bias current. An inverter stage is coupled to the output node, and includes an input branch configured to receive the oscillating signal and generate first and second control signals based upon the oscillating signal. At least one amplifying branch receives the first and second control signals and amplifies the first and second control signals. An output branch receives the amplified first and second control signals and generates an amplified version of the oscillating signal based upon the amplified first and second control signals.

Abstract: A power transmitting apparatus includes an active electrode, a passive electrode, a voltage generating circuit that applies a voltage between the active electrode and the passive electrode, and a reference potential electrode connected to a reference potential. A power receiving apparatus includes an active electrode, a passive electrode, a secondary battery connected between the active electrode and the passive electrode, and a reference potential electrode connected to a reference potential. Power is transmitted from the power transmitting apparatus to the power receiving apparatus as a result of the respective electrodes facing each other and being capacitively coupled to each other when the power receiving apparatus is mounted to the power transmitting apparatus.

Abstract: A novel and useful wideband FM demodulator operating across an 8 GHz IF bandwidth for application in low-power, wideband heterodyne receivers. The demodulator includes an n-stage ring oscillator that is injection locked to a wideband input signal. Locking to the input frequency, it divides the FM deviation by n, thereby facilitating as well as reducing the energy required for wideband demodulation. The quadrature-phased output of the ring oscillator is phase correlated using a low-power folded CMOS mixer capable of detecting FM up to 400 Mb/s over a 2-10 GHz IF frequency range.

Abstract: A resonation element includes a basal portion, resonating arms extending out in a Y-axis direction from the basal portion, and a vibration substrate, formed of single crystal silicon, in which a Z-axis direction is set to a thickness direction, and is configured such that the resonating arms are flexurally vibrated in an XY in-plane direction. In addition, when resonation frequencies of the resonating arms are set to F [kHz], widths of the resonating arms are set to W [?m], and lengths of the resonating arms are set to L [?m], at least one expression of the following Expression (1) and the following Expression (2) is satisfied. W<10A×Log(F)+B??(1) where, A is ?5.006×10?1, and B is 2.451, and L<10C×log(F)+D??(2) where, C is ?7.507×10?1, and D is 4.268.

Abstract: Synthetic antiferromagnetic (SAF) and synthetic ferrimagnetic (SyF) free layer structures are disclosed that reduce Ho (for a SAF free layer), increase perpendicular magnetic anisotropy (PMA), and provide higher thermal stability up to at least 400° C. The SAF and SyF structures have a FL1/DL1/spacer/DL2/FL2 configuration wherein FL1 and FL2 are free layers with PMA, the coupling layer induces antiferromagnetic or ferrimagnetic coupling between FL1 and FL2 depending on thickness, and DL1 and DL2 are dusting layers that enhance the coupling between FL1 and FL2. The SAF free layer may be used with a SAF reference layer in STT-MRAM memory elements or in spintronic devices including a spin transfer oscillator. Furthermore, a dual SAF structure is described that may provide further advantages in terms of Ho, PMA, and thermal stability.

Abstract: A method for calibrating an oscillator in an electronic device and an electronic device configured for calibration are provided. Multiple signals are sent to the electronic device from another electronic device, such as from a host device. With knowledge of the time interval between the multiple signals, the electronic device may calibrate the oscillator in the electronic device. For example, the electronic device may be a USB-compliant electronic device. The USB-compliant electronic device may receive Start of Frame (SoF) signals from a host device, which in one USB implementation is received at 1 mSec intervals. The USB-compliant electronic device may count the output of the oscillator between receipt of different SoF signals in order to determine the frequency of the oscillator at different oscillator settings.

Abstract: A resonator element includes a quartz crystal substrate having a main surface along a plane including an X-axis and a Z?-axis, and a thickness in a Y?-axis direction. The quartz crystal substrate includes a vibrating portion including a side along the X-axis, a side along the Z?-axis, and a peripheral portion having a thickness smaller than that of the vibrating portion, which is provided along an outer edge of the vibrating portion. The vibrating portion includes a first portion and a second portion having a thickness smaller than that of the first portion, which is provided on at least an outer edge on a +X side of the X-axis and an outer edge on a ?X side thereof, among outer edges of the first portion. When Z is a length of the quartz crystal substrate along the Z?-axis, and t is a thickness of the first portion, 11<Z/t?53.

Abstract: A PWM receiver circuit receives and demodulates pulse width modulated (PWM) data signals without requiring synchronization such that no synchronization preamble need be provided with the PWM data signal. Embodiments may consume less power since there is no need to repeatedly synchronize a PLL, counter or other circuitry to the PWM data signal. Furthermore, the PWM receiver circuit operates in view of or is “tolerant” to jitter in the frequency of the PWM signal and also to a relatively wide range of intentional variation in the frequency. Interleaved operation of parallel PWM receiver circuits are utilized in some embodiments. In one embodiment currents are integrated during low and high portions of the duty cycle of the PWM data signal and the difference in the respective voltages generated through such integration used to demodulate the PWM data signal.

Abstract: The described systems and methods can facilitate examination of device parameters including analysis of relatively dominant characteristic impacts on delays. In one embodiment, at least some coupling components (e.g., metal layer wires, traces, lines, etc.) have a relatively dominant impact on delays and the delay is in part a function of both capacitance and resistance of the coupling component. In one embodiment, a system comprises a plurality of dominant characteristic oscillating rings, wherein each respective one of the plurality of dominant characteristic oscillating rings includes a respective dominant characteristic. Additional analysis can be performed correlating the dominant characteristic delay impact results with device fabrication and operation.

Abstract: Systems and methods are provided for generating an amplitude modulation signal to a switchmode power amplifier. A DC to DC switch is configured to receive a DC input voltage and to provide a DC output voltage. A low dropout regulator is configured to provide the amplitude modulation signal according to a modulation control signal received by the low dropout regulator. A control circuit is configured to establish a nominal operating power level for the power amplifier via the amplitude modulation signal and to maintain a minimum voltage difference between the DC output voltage and the low dropout regulator output. A modulator control circuit is configured to provide the modulation control signal to the low dropout regulator. The modulator control circuit provides the transition from a high amplitude to a low amplitude and a transition from the low amplitude to the high amplitude at configurable first and second slopes, respectively.

Abstract: In the present invention, a nanomechanical resonator array (1), which is suitable being used in an oscillator and production method of said nanomechanical resonator array are developed. Said resonator array (1) comprises at least two resonators (2), which are in the size of nanometers, which are vertically arrayed and which are preferably in the form of nano-wire or nano-tube; at least one coupling membrane (3), which mechanically couples said resonators (2) from their one ends, and at least one clamping element (4), which supports mechanical coupling by clamping said coupling membrane (3). Said resonator array (1) can be actuated and its displacements can be sensed. The present invention develops a predictive model of the frequency response of an oscillator comprising the said resonator array (1) for electrostatic actuation and capacitive readout. An oscillator comprised of multiple resonator arrays (1) with different frequency responses connected to a frequency manipulation circuitry can be used as well.

Abstract: Systems and methods for frequency drift compensation for a dielectric resonator oscillator and systems and methods to reduce temperature drift in a dielectric resonator oscillator are provided. Some systems can include an oscillator circuit and a dielectric resonator electrically coupled to the oscillator circuit. The oscillator circuit can have a first temperature coefficient, and the dielectric resonator can have a second temperature coefficient to compensate for frequency drift caused by the first temperature coefficient of the oscillator circuit.

Abstract: The disclosed embodiments provide a resonant oscillator circuit. The resonant oscillator circuit includes a clipping mechanism configured to clip an output voltage of a signal pulse generated by the resonant oscillator circuit to a predefined constant level. The resonant oscillator circuit also includes a feedback path configured to return energy from the clipping mechanism to an input of the resonant oscillator circuit.

Abstract: A cross-coupled complementary balanced voltage-controlled oscillator and a method for operating same. The oscillator comprises an electro-mechanical resonator, and an oscillator core. The oscillator core comprises capacitively cross-coupled complementary inverters and a resistor network. The oscillator may comprise a frequency tuning network having inductors for increasing the tuning range. The capacitance inhibit the inverters from latching to a static direct current state. The resistor network forms a high pass filter with the capacitance to inhibit relaxation oscillations. The method comprises enabling the resistor network to form a high pass filter and starting balanced oscillations in the oscillator, the capacitance of the high pass filter for inhibiting latching, and the high pass filter for inhibiting relaxation oscillations. The method may comprise tuning the frequency by varying the capacitance of the oscillator.

Abstract: A phased array architecture configured for current reuse is disclosed. In an exemplary embodiment, an apparatus includes a current mode phase rotator (PR) module configured to generate phase shifted in-phase (I) and quadrature-phase (Q) current signals, and a current mode residual sideband (RSB) correction module configured to correct residual sideband error associated with the phase shifted I and Q current signals. The RSB correction module and the PR module form a phased array element configured to reuse a DC supply current.

Abstract: A circuit for use with PWM signal having first pulse and a second pulse, wherein the first pulse has a period and a first duty cycle, and the second pulse has the period and a second duty cycle. The period has clock information therein, the first duty cycle has first data information therein, and the second duty cycle has second data information therein. The circuit includes a first integrating component and a second integrating component. The first integrating component can generate a first voltage corresponding to the first duty cycle and a second voltage corresponding to the first duty cycle. The second integrating component can generate a third voltage corresponding to the second duty cycle and a fourth voltage corresponding to the second duty cycle.

Abstract: A novel and useful LC-tank digitally controlled oscillator (DCO) incorporating a split transformer configuration. The LC-tank oscillator exhibits a significant reduction in area such that it is comparable in size to conventional ring oscillators (ROs) while still retaining its salient features of excellent phase noise and low sensitivity to supply variations. The oscillator incorporates an ultra-compact split transformer topology that is less susceptible to common-mode electromagnetic interference than regular high-Q LC tanks which is highly desirable in SoC environments. The oscillator, together with a novel dc-coupled buffer, can be incorporated within a wide range of circuit applications, including clock generators and an all-digital phase-locked loop (ADPLL) intended for wireline applications.

Abstract: An oscillator circuit comprising at least a first component arranged to be statically calibrated to calibrate the oscillator circuit to achieve a symmetrical frequency/temperature profile for the oscillator circuit. The oscillator circuit further comprises at least one further component arranged to be dynamically calibrated to enable an oscillating frequency of the oscillator circuit to be dynamically adjusted, and at least one temperature compensation component arranged to receive at least one temperature indication for the oscillator circuit and to dynamically adjust the at least one further component based at least partly on the at least one received temperature indication. In some examples, the at least one temperature compensation component is arranged to dynamically adjust the at least one further component based on a standardized temperature compensation scheme.

Abstract: Aspects of this disclosure relate to reference switchover. In one embodiment, an apparatus includes a phase error detector, a phase alignment detector, and a selection circuit. The phase error detector is configured to generate an indication of a relative phase difference between a first reference clock signal and a second reference clock signal. The phase alignment detector is configured to receive the indication of the relative phase difference and determine when the relative phase difference satisfies a preset threshold. The selection circuit is configured to transition from providing the first reference clock signal as a clock system reference signal to providing the second reference clock signal as the clock system reference signal responsive to the phase alignment detector detecting that the relative phase difference satisfies the preset threshold.