Patents Examined by Jeison C Arcos
  • Patent number: 11055167
    Abstract: Techniques for remapping portions of a plurality of non-volatile memory (NVM) dice forming a memory domain. A processing device partitions each NVM die into subslice elements comprising respective physical portions of NVM having proximal disturb relationships. The NVM allocation has user subslice elements and spare subslice elements. For the NVM dice forming the memory domain, the processing device performs an error analysis to identify a predetermined number of subslice elements having highest error rates for the memory domain. Identified user subslice elements having the highest error rates, remap to spare subslice elements of the memory domain that were not identified as having the highest error rates to remove subslice element or elements having highest error rates. At least one user subslice element is remapped from a first die of the memory domain to a second die of the memory domain.
    Type: Grant
    Filed: May 14, 2018
    Date of Patent: July 6, 2021
    Assignee: MICRON TECHNOLOGY, INC.
    Inventors: Samuel E. Bradshaw, Justin Eno
  • Patent number: 11016857
    Abstract: A method, computer program product, and computer system to maintain high availability of a service processor. An embodiment provides program code with a location of a second service processor (the second service processor is communicatively coupled to the first service processor). The program code stops a virtual machine during runtime, including instruction execution and IO operations, where during runtime, the virtual machine executes one or more processes to service and manage computing resources in the distributed computing environment. The program code generates a micro-checkpoint of the virtual machine. The program code resumes the instruction execution of the virtual machine and transmits the micro-checkpoint to a second service processor based on the location and then resumes IO operations. The second service processor utilizes the micro-checkpoint to enable a hypervisor on the second service processor to start a virtual machine on the second service processor.
    Type: Grant
    Filed: August 27, 2019
    Date of Patent: May 25, 2021
    Assignee: International Business Machines Corporation
    Inventors: Bradley W. Bishop, Lee N. Helgeson, Michael R. Hines, James A. O'Connor
  • Patent number: 10997029
    Abstract: An apparatus for core repair includes a failure analysis and recovery (“FAR”) probe that accesses a core of a processor and units of the core over a low-level communication bus while the core is operational after a failure notification. The FAR probe compares operational data of the core versus vital product data (“VPD”) while the core is running tests and a thermal, power, functional (“TPF”) workload to determine if the core is in a degraded state and runs tests to identify a failure after determining that the core is in a degraded state. The FAR probe adjusts parameters of the core in response to identifying a failure of the core and re-evaluates the core to determine if the core is functional. The FAR probe returns the core to service after determining that the core is functional. The FAR probe operates independent of other processor cores while the cores are operational.
    Type: Grant
    Filed: March 7, 2019
    Date of Patent: May 4, 2021
    Assignee: International Business Machines Corporation
    Inventors: Rocio Yolanda Garza, Tony Sawan, Saurabh Chadha, Diyanesh B. Chinnakkonda Vidyapoornachary
  • Patent number: 10977129
    Abstract: Various embodiments of the present disclosure generally relate to a method and a device for managing a hybrid storage disk array. Specifically, the method can include: in response to a first data portion of a first extent in a first set of extents of a first type of storage disk being unavailable, obtaining a metadata portion of a second extent in a second set of extents of the second type of storage disk. The method can also include: reading from the metadata portion reconstruction information for reconstructing the first data portion; and reconstructing, based on the reconstruction information, the first data portion on a third extent in the first set of extents. In addition, there is also provided accordingly a system, an apparatus and a computer program product.
    Type: Grant
    Filed: October 23, 2018
    Date of Patent: April 13, 2021
    Assignee: EMC IP Holding Company LLC
    Inventors: Hongpo Gao, Qingyun Liu, Geng Han, Baote Zhuo, Ruiyong Jia, Ree Sun
  • Patent number: 10977110
    Abstract: Embodiments described herein provide a system for facilitating a training system for a device. During operation, the system determines a system model for the device that can be based on empirical data of the device. The empirical data is obtained based on experiments performed on the device. The system then generates, from the system model, synthetic data that represents behavior of the device under a failure. The system determines uncertainty associated with the synthetic data and, from the uncertainty, determines a set of prediction parameters using an uncertainty quantification model. The system generates training data from the synthetic data based on the set of prediction parameters and learns a set of learned parameters associated with the device by using a machine-learning-based classifier on the training data.
    Type: Grant
    Filed: December 27, 2017
    Date of Patent: April 13, 2021
    Assignee: Palo Alto Research Center Incorporated
    Inventors: Ion Matei, Rajinderjeet S. Minhas, Johan de Kleer, Anurag Ganguli
  • Patent number: 10970177
    Abstract: In one aspect, a computerized method for managing consistency and availability tradeoffs in a real-time operational database management system (DBMS) includes the step of implementing consistency in an AP mode of the real-time operational DBMS by implementing the following steps. The method adds a set of schemes that enable a real-time operational DBMS to linearize read/write operations in all situations except a first specified situation and a second specified situation. The real-time operational DBMS is in AP mode, at least one master node for every data item is available in the database cluster of the real-time operational DBMS at all times. The method implements a CP mode of operation.
    Type: Grant
    Filed: August 19, 2018
    Date of Patent: April 6, 2021
    Inventors: Brian J. Bulkowski, Venkatachary Srinivasan, Andrew Gooding
  • Patent number: 10922175
    Abstract: Techniques are directed to failure recovery of a storage system. In accordance with certain techniques, in response to detecting that a disk group of a memory system failed, failure duration of the disk group is recorded. If the failure duration does not reach a predetermined ready time limit and the disk group is in a degraded state, the disk group is maintained in a degraded but not ready state. The predetermined ready time limit is shorter than a logic unit number debounce time limit to avoid a data unavailable event. With such techniques, the possibility of occurrence of a data loss event may be reduced significantly while avoiding a data unavailable event.
    Type: Grant
    Filed: December 18, 2018
    Date of Patent: February 16, 2021
    Assignee: EMC IP Holding Company LLC
    Inventors: Baote Zhuo, Geng Han, Jibing Dong, Jian Gao, Xinlei Xu
  • Patent number: 10908983
    Abstract: There is described an apparatus for preventing a problem in a simulator comprising a plurality of components, comprising: a communication unit for at least one of transmitting data and receiving data; a memory having stored thereon a database containing a plurality of lists of events each associated with a respective source of anomaly; a processing unit configured for: receiving an actual state of operation for at least some of the plurality of components; determining that a given one of the plurality of lists of event has partially occurred using the actual state of operation; and outputting an alert indicative of the respective source of anomaly associated with the given one of the plurality of lists of event via the communication unit.
    Type: Grant
    Filed: March 31, 2017
    Date of Patent: February 2, 2021
    Assignee: CAE INC.
    Inventors: Ann-Katherine Giroux, Michel Galibois, Yannick Heneault, Gunther Sascha Filkorn, Francis Meloche-Charlebois
  • Patent number: 10908981
    Abstract: There is described an apparatus for diagnosing a problem in a simulator comprising a plurality of components, comprising: a communication unit; a memory having stored thereon a database containing a plurality of lists of events each associated with a respective anomaly of the simulator and a respective source of anomaly; a processing unit configured for: receiving a detected anomaly of the simulator via the communication unit; retrieving from the database at least a given one of the plurality of lists of events that correspond to the detected anomaly; receiving an actual state of operation for at least some of the plurality of components; identifying a source of the detected anomaly by comparing the received actual state of operation and at least a given one of the plurality of lists of events; and outputting the source of the detected anomaly via the communication unit.
    Type: Grant
    Filed: March 31, 2017
    Date of Patent: February 2, 2021
    Assignee: CAE INC.
    Inventors: Ann-Katherine Giroux, Michel Galibois, Yannick Heneault, Gunther Sascha Filkorn, Francis Meloche-Charlebois
  • Patent number: 10901879
    Abstract: A computer-implemented method, apparatus and computer program product, the method comprising: obtaining attribute weights associated with element attributes in a web page comprising elements, in regard of a specific element to be operated upon, a first margin, and a second margin; based on the attribute weights, determining a probability for each element in the web page to be the specific element; determining a first threshold indicating a difference between probabilities of two elements having the highest probabilities; determining a second threshold indicating a difference between a probability of an element having the highest probability and one; based on the first threshold, second threshold, first margin and second margin, determining whether the element having the highest probability is the specific element; and subject to the specific element being identified, performing an action upon the specific element.
    Type: Grant
    Filed: May 2, 2018
    Date of Patent: January 26, 2021
    Assignee: TESTCRAFT TECHNOLOGIES LTD.
    Inventor: Yarin Podoler
  • Patent number: 10901858
    Abstract: Methods and systems for recovering a host image of a client machine to a recovery machine comprise comparing a profile of a client machine of a first type to be recovered to a profile of a recovery machine of a second type different from the first type, to which the client machine is to be recovered, by a first processing device. The first and second profiles each comprise at least one property of the first type of client machine and the second type of recovery machine, respectively. At least one property of a host image of the client machine is conformed to at least one corresponding property of the recovery machine. The conformed host image is provided to the recovery machine, via a network. The recovery machine is configured with at least one conformed property of the host image by a second processing device of the recovery machine.
    Type: Grant
    Filed: September 6, 2018
    Date of Patent: January 26, 2021
    Assignee: Falconstor, Inc.
    Inventors: Po-Hsin Wei, Andrew Spyros Malitzis, Andrew Lee Modansky, Sheng-Chang Chang
  • Patent number: 10901827
    Abstract: An accelerator manager monitors hardware accelerators that are called by one or more computer programs. A virtual function table includes multiple entries, where each entry correlates a call from a computer program to a corresponding call to either a software library or a hardware accelerator. A call by the computer program to a function in the virtual function table results in the call being routed to either the software library or to a hardware accelerator depending on the contents of the corresponding entry in the virtual function table. The accelerator manager, in response to a detected failure in an accelerator, replaces one or more calls in the virtual function table to the failed accelerator with calls to the software library. The accelerator manager can then retry the call that caused the accelerator to fail, which will then be executed by the software library.
    Type: Grant
    Filed: May 14, 2018
    Date of Patent: January 26, 2021
    Assignee: International Business Machines Corporation
    Inventors: Paul E. Schardt, Jim C. Chen, Lance G. Thompson, James E. Carey
  • Patent number: 10896084
    Abstract: A method, computer program product, and a computer system for mitigating a fault in an information service comprised of multiple microservices includes a processor(s) obtaining a notification of a fault in the information service which includes logs tracking execution of the information service in a shared computing environment. The processor(s) generates a dependency data structure describing interdependencies between individual microservices with respect to each other. The processor(s) mitigates the fault by replacing a faulty microservice in the microservices represented in the dependency data structure; the faulty microservice includes program code with an issue resulting in the fault.
    Type: Grant
    Filed: May 2, 2018
    Date of Patent: January 19, 2021
    Assignee: International Business Machines Corporation
    Inventors: Antonio Bagarolo, Marco Imperia, Paolo Ottaviano, Maximiliano Cammisa, Pasquale Maria Mascolo Montenero
  • Patent number: 10896080
    Abstract: An S.M.A.R.T. threshold optimization method used for disk failure detection includes the steps of: analyzing S.M.A.R.T. attributes based on correlation between S.M.A.R.T. attribute information about plural failed and non-failed disks and failure information and sieving out weakly correlated attributes and/or strongly correlated attributes; and setting threshold intervals, multivariate thresholds and/or native thresholds corresponding to the S.M.A.R.T. attributes based on distribution patterns of the strongly or weakly correlated attributes. As compared to reactive fault tolerance, the disclosed method has no negative effects on reading and writing performance of disks and performance of storage systems as a whole. As compared to the known methods that use native disk S.M.A.R.T. thresholds, the disclosed method significantly improves disk failure detection rate with a low false alarm rate.
    Type: Grant
    Filed: September 19, 2018
    Date of Patent: January 19, 2021
    Assignee: HUAZHONG UNIVERSITY OF SCIENCE AND TECHNOLOGY
    Inventors: Song Wu, Zhuang Xiong, Hai Jin
  • Patent number: 10891182
    Abstract: Embodiments are directed to predicting the health of a computer node using health report data and to proactively handling failures in computer network nodes. In an embodiment, a computer system monitors various health indicators for multiple nodes in a computer network. The computer system accesses stored health indicators that provide a health history for the computer network nodes. The computer system then generates a health status based on the monitored health indicators and the health history. The generated health status indicates the likelihood that the node will be healthy within a specified future time period. The computer system then leverages the generated health status to handle current or predicted failures. The computer system also presents the generated health status to a user or other entity.
    Type: Grant
    Filed: January 25, 2019
    Date of Patent: January 12, 2021
    Assignee: MICROSOFT TECHNOLOGY LICENSING, LLC
    Inventors: Hao Xia, Todd F. Pfleiger, Mark C. Benvenuto, Ajay Kalhan
  • Patent number: 10884910
    Abstract: The technology disclosed enables the automatic definition of monitoring alerts for a web page across a plurality of variables such as server response time, server CPU load, network bandwidth utilization, response time from a measured client, network latency, server memory utilization, and the number of simultaneous sessions, amongst others. This is accomplished through the combination of load or resource loading and performance snapshots, where performance correlations allow for the alignment of operating variables. Performance data such as response time for the objects retrieved, number of hits per second, number of timeouts per sec, and errors per second can be recorded and reported. This allows for the automated ranking of tens of thousands of web pages, with an analysis of the web page assets that affect performance, and the automatic alignment of performance alerts by resource participation.
    Type: Grant
    Filed: February 4, 2019
    Date of Patent: January 5, 2021
    Assignee: Spirent Communications, Inc.
    Inventor: Brian Buege
  • Patent number: 10877857
    Abstract: Provided herein may be a memory system and a method of operating the memory system. The memory system may include: a memory device comprising a plurality of semiconductor devices each including a plurality of memory blocks; and a controller configured to generate at least one or more descriptors in response to a request from a host, and control internal operations of the plurality of semiconductor devices based on the respective at least one or more descriptors. The controller may generate and manage at least one or more descriptor indexes respectively corresponding to the at least one or more descriptors. When a failure occurs during the internal operations of the plurality of semiconductor devices, at least one descriptor corresponding to a memory block in which the failure has occurred is searched for using the at least one or more descriptor indexes.
    Type: Grant
    Filed: August 21, 2018
    Date of Patent: December 29, 2020
    Assignee: SK hynix Inc.
    Inventor: Jeen Park
  • Patent number: 10853248
    Abstract: It may be beneficial in the case of an undesired lapse of external power to provide a back-up power supply to protect electronic components in an electronic equipment rack. This can frequently be difficult and/or costly due to the necessary addition of electronic infrastructure, such as cabling and/or logic. One means of overcoming this obstacle is to utilize unused or reserved conductors in an already utilized management cable to convey a loss-of-power signal to the components in tandem with the existing cable signals.
    Type: Grant
    Filed: February 5, 2018
    Date of Patent: December 1, 2020
    Assignee: Amazon Technologies, Inc.
    Inventor: Michael Jon Moen
  • Patent number: 10846211
    Abstract: Described herein are technologies related to testing computer code for bugs, wherein the computer code is to run in kernel mode of an operating system. The computer code is executed in kernel mode of a first operating system, and content of memory that is mapped to kernel mode address space of the first operating system is transferred to user mode memory that is mapped to user mode address space of a second operating system. The computer code is executed in user mode and tested while being executed in user mode.
    Type: Grant
    Filed: March 21, 2018
    Date of Patent: November 24, 2020
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Barry C. Bond, Patrice Godefroid
  • Patent number: 10838831
    Abstract: Techniques for remapping portions of an array of non-volatile memory (NVM) resident on a die, in which the die is one of a plurality of NVM dice forming a memory device. A processing device partitions the NVM into a plurality of subslice elements comprising respective physical portions of non-volatile memory having proximal disturb relationships. The NVM has a first portion of the subslice elements allocated as user subslice elements and a second portion as spare subslice elements and the processing device performs an error analysis to identify a predetermined number of subslice elements having highest error rates for a memory domain on the die. For the identified subslice elements having the highest error rates, the processing device remaps user subslice elements to spare subslice elements that were not identified as having the highest error rates to remove subslice element or elements having highest error rates from a user space of the NVM.
    Type: Grant
    Filed: May 14, 2018
    Date of Patent: November 17, 2020
    Assignee: MICRON TECHNOLOGY, INC.
    Inventors: Samuel E. Bradshaw, Justin Eno