Patents Examined by Jiri F. Smetana
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Patent number: 6656373Abstract: An optical element which controls both the phase and irradiance distribution, thereby completely specifying the E-field, of light, allowing completely arbitrary control of the light at any plane. Such an optical element includes a portion that controls the phase and a portion that controls the irradiance. The portion that controls the irradiance is an apodized irradiance mask having its transmission varying with position in a controlled fashion. This apodized irradiance mask is preferably a pattern of metal. In order to insure a smoothly varying pattern of metal with minimized diffraction effects, a very thin mask spaced from a substrate is used to provide the metal on the substrate. The apodized irradiance mask may be placed directly on the phase control portion, or may be on an opposite side of a substrate of the phase controlled portion.Type: GrantFiled: July 7, 2000Date of Patent: December 2, 2003Assignee: Wavefront Sciences, Inc.Inventors: Daniel R. Neal, Justin D. Mansell
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Patent number: 6527966Abstract: A method of forming a pattern in which production of reaction products in the interface between an organic anti-reflective coating and a radiation sensitive material coating is suppressed, the number of residues of an etchable layer formed after etching is decreased, and which provides a etched pattern having high resolution and good dimensional accuracy. According to the method, an etchable layer (11) composed of polysilicon coating an organic anti-reflective coating (12), and a radiation sensitive material coating (13) composed of a chemically amplified resist material containing as acid generators both (a) onium salt compound and (b) at least one of a sulfone compound and a sulfonate compound are formed on a semiconductor substrate (10), the radiation sensitive material coating (13) is imagewise exposed through the mask (14) and developed to form a patterned radiation sensitive material coating (13b).Type: GrantFiled: May 1, 2000Date of Patent: March 4, 2003Assignees: Clariant Finance (BVI) Limited, Matsushita Electric Industrial Co., LimitedInventors: Koji Shimomura, Yoshiaki Kinoshita, Satoru Funato, Yuko Yamaguchi
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Patent number: 6508949Abstract: A method for correcting characteristics of an attenuated phase-shift mask having an attenuated layer including (a) storing a data in a memory, which shows a correlation between characteristics and process conditions, (b) measuring the characteristics of the attenuated phase-shift mask, (c) calculating a appropriate process condition from the result of the step (b) and the data stored in the memory; and (d) soaking the attenuated phase-shift mask into a liquid solution for a certain time that is calculated in the step (c) to change thickness and composition of the attenuated layer.Type: GrantFiled: July 18, 2000Date of Patent: January 21, 2003Assignee: Oki Electric Industry Co., Ltd.Inventor: Katsuhiro Takushima
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Patent number: 6500351Abstract: A recording head pole production process, and a pole made by the process, in which a combination of wet and dry etching steps are utilized to advantageously provide an undercut in the relatively high magnetic moment material beneath a photoresist area used to define the pole such that any re-deposited layer of material which occurs on the sides of the pole and photoresist area during the dry etching operation is advantageously rendered substantially discontinuous, or weakly linked, and the re-deposited material remaining on the pole itself following a photoresist strip can then be removed by being subjected to a stream of gaseous particles and ultimately carried away by the accompanying gas stream itself. In a particular embodiment disclosed herein the relatively high magnetic moment material may comprise a sputter deposited layer of cobalt-zirconium-tantalum (CoZrTa), iron-aluminum-nitride (FeAlN), iron-tantalum-nitride (FeTaN), iron-nitride (FeN) or similar materials.Type: GrantFiled: May 24, 1999Date of Patent: December 31, 2002Assignee: Maxtor CorporationInventors: Andrew L. Wu, Jeffrey G. Greiman, Lawrence G. Neumann, Vijay K. Basra
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Patent number: 6485577Abstract: A method and apparatus for pipe pig that is employed in a piping system for the purpose of recovering product. The pipe pig, or simply “pig,” is utilized to flush or purge a piping system, which includes a pipe that is normally filled with a product stream. The pig is a substantially solid slug that is introduced into the flow within the pipe. The pipe pig includes at least a component of a product stream and the pig is at least partially frozen to achieve its substantially solid form. The pipe pig is inserted or alternatively formed within a launch chamber that junctions with a pipe. A release valve is opened to allow the pig to enter the pipe. An exterior surface of the launch chamber can be heated to prevent the pig from sticking within the launch chamber or refrigerated to form the pig. The pipe pig can be propelled into the product stream or allowed to fall by gravity or suction alone.Type: GrantFiled: January 7, 2000Date of Patent: November 26, 2002Inventor: Robert Kiholm
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Patent number: 6464892Abstract: Three fundamental and three derived aspects of the present invention are disclosed. The three fundamental aspects each disclose a process sequence that may be integrated in a full process. The first aspect, designated as “latent masking”, defines a mask in a persistent material like silicon oxide that is held abeyant after definition while intervening processing operations are performed. The latent oxide pattern is then used to mask an etch. The second aspect, designated as “simultaneous multi-level etching (SMILE)”, provides a process sequence wherein a first pattern may be given an advanced start relative to a second pattern in etching into an underlying material, such that the first pattern may be etched deeper, shallower, or to the same depth as the second pattern. The third aspect, designated as “delayed LOCOS”, provides a means of defining a contact hole pattern at one stage of a process, then using the defined pattern at a later stage to open the contact holes.Type: GrantFiled: November 2, 2001Date of Patent: October 15, 2002Inventors: James E. Moon, Timothy J. Davis, Gregory J. Galvin, Kevin A. Shaw, Paul C. Waldrop, Sharlene A. Wilson
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Patent number: 6461527Abstract: A method for fabricating a flexible printed circuit board with access on both sides includes the steps of applying a metallic conductor track sheet to a base sheet and patterning the metallic conductor track sheet in order to produce conductor tracks. A conductor track covering with first contact-making cutouts is applied over the conductor tracks. Second contact-making cutouts are produced in the base sheet material by locally removing the base sheet through the use of laser irradiation. As an alternative, the first contact-making cutouts as well as the second contact-making cutouts can be produced by removing material with a laser.Type: GrantFiled: June 26, 2000Date of Patent: October 8, 2002Assignee: Siemens AktiengesellschaftInventors: Detlef Haupt, Frank Franzen
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Patent number: 6426233Abstract: The present invention includes a method for making an emitter for a display device, an emitter array produced by such method, an etch mask used during such method, and a method for making such an etch mask. The method for making the emitter is practiced by providing a substrate, forming a conducting layer on the substrate, forming an emitting layer on the conducting layer, forming an etch mask having a controlled distribution of a plurality of mask sizes over the emitting layer, and forming at least one emitter by removing portions of the emitting layer using the etch mask. The method for making the etch mask is practiced by forming an etch mask layer over an emitting layer, forming a patterning layer having a controlled distribution of mask sizes over the etch mask layer, and forming the etch mask by removing portions of the etch mask layer using the controlled distribution of mask sizes in the patterning layer.Type: GrantFiled: August 3, 1999Date of Patent: July 30, 2002Assignee: Micron Technology, Inc.Inventor: Eric J. Knappenberger
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Patent number: 6423148Abstract: In cleaning a substrate which has a metal material and a semiconductor material both exposed at the surface and which has been subjected to a chemical mechanical polishing treatment, the substrate is first cleaned with a first cleaning solution containing ammonia water, etc. and then with a second cleaning solution containing (a) a first complexing agent capable of easily forming a complex with the oxide of said metal material, etc. and (b) an anionic or cationic surfactant.Type: GrantFiled: September 2, 1999Date of Patent: July 23, 2002Assignee: NEC CorporationInventor: Hidemitsu Aoki
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Patent number: 6379577Abstract: A process and solution for selectively wet etching a titanium based perovskite material disposed on a silicon oxide or silicon nitride substrate is disclosed herein. The solution is composed of hydrogen peroxide, an acid and deionized water. The solution is heated to a temperature between 25 and 90 degrees Celsius. The titanium based perovskite material may be barium strontium titanate, barium titanate, strontium titanate or a lead titanate. The solution selectively etches the perovskite material while the substrate is only minimally etched, if at all. The process and solution allows for an etching rate up to thirty times greater than conventional etching rates for similar perovskite materials selective to various substrate, barrier and mask layers, including SiO2.Type: GrantFiled: June 10, 1999Date of Patent: April 30, 2002Assignee: International Business Machines CorporationInventors: Hiroyuki Akatsu, David E. Kotecki, Jingyu Jenny Lian, Hua Shen
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Patent number: 6372149Abstract: The invention relates to a method for making a relief strip, comprising the steps of etching the strip, causing the etched strip to pass through a coloring line, a silicone solution metering unit, to meter a silicone solution on the strip etched portion, introducing the strip into a mold having a plurality of mold cavities of different cross-sections and spacings, therefrom a vacuum metered ink amount is ejected and caused to enter the recess of the material, and causing the strip to further pass through an infrared oven, and finally brushing the strip.Type: GrantFiled: December 22, 1999Date of Patent: April 16, 2002Assignee: Veneta DecalcogommeInventor: Mario Ferro
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Patent number: 6362453Abstract: A method of etching a surface of a transparent solid material with a laser beam, wherein the surface is irradiated with the laser beam having a fluence of 0.01-100 J/cm2/pulse while maintaining a fluid capable of absorbing the laser beam in contact with an opposite surface of the solid material.Type: GrantFiled: March 15, 1999Date of Patent: March 26, 2002Assignee: Director-General of Agency of Industrial Science and TechnologyInventors: Jun Wang, Hiroyuki Niino, Akira Yabe
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Patent number: 6309904Abstract: A method of fabricating an optical integrated circuit comprising at least one etched and buried BRS waveguide coupled to at least one etched but not buried ridge waveguide includes defining an imprint for the two types of guide beforehand, using a common mask, and then defining the two types of guide by successive etching operations.Type: GrantFiled: June 24, 1999Date of Patent: October 30, 2001Assignee: AlcatelInventors: Frédéric Pommereau, Philippe Pagnod-Rossiaux, Monique Renaud, Bernard Martin, Roland Mestric
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Patent number: 6303043Abstract: A method of fabricating a preserve layer. A top metallic layer is formed over the substrate. Portions of the metallic layer and the substrate are removed to form a trench. A conformal pad oxide layer is formed over the substrate. A conformal first nitride layer is formed on the pad oxide layer. A spin-on glass layer is formed on the first nitride layer to fill the trench. An etching back step is performed to remove a portion of the spin-on glass layer. The remaining spin-on glass layer fills the trench to the surface of the first nitride layer above the top metallic layer. An oxide layer is formed over the substrate. A second nitride layer is formed on the oxide layer. A preserve layer comprising the pad oxide layer, the first nitride layer, the oxide layer, and the second nitride layer is formed.Type: GrantFiled: July 7, 1999Date of Patent: October 16, 2001Assignee: United Microelectronics Corp.Inventors: Wei-Shiau Chen, Ruoh-Haw Chang, Shu-Jen Chen
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Patent number: 6194231Abstract: A method for monitoring a condition of a polishing pad used in a chemical-mechanical planarization (CMP) process to polish a semiconductor wafer is disclosed. The method uses a linear multi-dimensional scanning device arranged above the polishing pad in a radial direction to monitor the changes in profile of the surface of the polishing pad, and determines the condition of the polishing pad according to the profile information. When the change in profile of the surface of the polishing pad substantially exceeds a preset value, e.g. 2 mm, it is indicated that the polishing pad should be changed.Type: GrantFiled: March 1, 1999Date of Patent: February 27, 2001Assignee: National Tsing Hua UniversityInventors: Hong Ho-Cheng, Kuo-Hsing Liu