Patents Examined by Jiri Smetana
  • Patent number: 6379989
    Abstract: A microoptomechanical structure produced by defining a microoptical structure in a single-crystal silicon layer separated by an insulator layer from a handle wafer, such as a SOI wafer, selectively etching the single crystal silicon layer, depositing a sacrificial oxide layer on the etched single crystal silicon layer, depositing and etching a polysilicon layer on the sacrificial oxide layer, with remaining polysilcon forming hinge elements, and releasing formed microoptical structures. Embodiments use an oxide as an insulator, and other embodiments provide for wafer bonding of the silicon layer to the insulator layer.
    Type: Grant
    Filed: December 21, 1999
    Date of Patent: April 30, 2002
    Assignee: Xerox Corporation
    Inventors: Joel A. Kubby, Jingkuang Chen, Alex T. Tran
  • Patent number: 6379571
    Abstract: An ink-jet head is produced by means of an etching employing a mask member which is formed without defects such as pinholes. More specifically, a polyetheramide resin layer is employed as an etching-resistance mask when processing a substrate by means of the etching, in which the polyetheramide resin layer is etched by means of an etching gas containing oxygen as main component.
    Type: Grant
    Filed: June 10, 1999
    Date of Patent: April 30, 2002
    Assignee: Canon Kabushiki Kaisha
    Inventors: Junichi Kobayashi, Norio Ohkuma, Keiichi Murakami, Tamaki Sato
  • Patent number: 6378338
    Abstract: Magnetic disk substrates are produced by subjecting glass substrates to at least steps of degreasing, etching, sensitization with tin chloride, activation and sensitivity-enhancing treatment in that order, then plating the pretreated substrates with a nickel/phosphorus film, and thereafter polishing the plated substrates. In the process, the substrates being processed are washed with hot pure water at a temperature of not lower than 50° C. for a period of from 20 to 90 seconds, after the sensitization step but before the activation step, and heated at a temperature of not lower than 70° C. for a period of from 5 to 100 minutes, after the sensitization step but before the nickel/phosphorus-plating step.
    Type: Grant
    Filed: August 30, 1999
    Date of Patent: April 30, 2002
    Assignee: Showa Denko K.K.
    Inventors: Kurata Awaya, Kazuyoshi Nishizawa, Kiyoshi Tada
  • Patent number: 6374847
    Abstract: A method is provided for cleansing a seal of a device used for sealing an evaporative emission control system of an automotive vehicle. The method starts by determining if a request to close the device has been made. If the request to close the device has been made, the method cycles the device a plurality of times to press and lift the seal off of a seat repeatedly. The method also determines if the seal is closed after the cycling step. If the seal is not closed after the cycling step, the method closes the seal. Preferably, the cycling step includes cycling the device at a pre-selected duty cycle, frequency and cycle count. The duty cycle, frequency, and cycle count correspond to calibration tables prepared for the particular device employed to insure that the seal strikes its seat about three times before sealing.
    Type: Grant
    Filed: August 30, 1999
    Date of Patent: April 23, 2002
    Assignee: DaimlerChrysler Corporation
    Inventors: Gary D. Dawson, William B. Blomquist, Chris J. Booms
  • Patent number: 6374833
    Abstract: A method of in situ reactive gas plasma treatment is disclosed. The method is capable of removing a residue remained in a metal etching chamber after the metal etching process to improve the yield of the wafer and the particle performance of the metal etching chamber. The method includes the steps of (a) vactuating the metal etching chamber after the metal etching process, (b) introducing a reactive gas to the metal etching chamber, and (c) applying an electromagnetic power to the metal etching chamber for producing a plasma derived from the reactive gas to remove the residue inside the metal etching chamber and/or on the wafer.
    Type: Grant
    Filed: May 5, 1999
    Date of Patent: April 23, 2002
    Assignee: Mosel Vitelic, Inc.
    Inventors: Tien-Min Yuan, Shih-Chi Lai, Yen-Chung Feng, Tsung-Hua Wu
  • Patent number: 6368978
    Abstract: The present invention is a method for hydrogen-free plasma etching of indium tin oxide using a plasma generated from an etchant gas containing chlorine as a major constituent (i.e., chlorine comprises at least 20 atomic %, preferably at least 50 atomic %, of the etchant gas). Etching is performed at a substrate temperature of 100° C. or lower. The chlorine-comprising gas is preferably Cl2. The etchant gas may further comprise a non-reactive gas, which is used to provide ion bombardment of the surface being etched, and which is preferably argon. The present invention provides a clean, fast method for plasma etching indium tin oxide. The method of the invention is particularly useful for etching a semiconductor device film stack which includes at least one layer of a material that would be adversely affected by exposure to hydrogen, such as N- or P-doped silicon.
    Type: Grant
    Filed: March 4, 1999
    Date of Patent: April 9, 2002
    Assignee: Applied Materials, Inc.
    Inventors: Ajay Kumar, Padmapani Nallan, Jeffrey D. Chinn
  • Patent number: 6368514
    Abstract: Batch thin film capacitors and their methods of manufacture using semiconductor manufacturing techniques. A mask, photo mask or shadow mask, having a pattern is used to form a matrix of rows and columns of thin film capacitors in a wafer. Capacitor terminals are formed in a batch process by separation at column saw areas, depositing a conductive layer and vertically etching horizontal layers of the conductive layer. Capacitance of an individual batch processed thin film capacitor is increased by stacking wafers together prior to separation at the column saw areas and forming capacitor terminals thereafter to couple parallel thin film capacitors together.
    Type: Grant
    Filed: September 1, 1999
    Date of Patent: April 9, 2002
    Assignee: Luminous Intent, Inc.
    Inventor: Richard Metzler
  • Patent number: 6368422
    Abstract: Methods and compositions for dissolving adherent petroleum residues which occur in the production and processing of petroleum in which esters of the following formula are employed: R1—COO—(CnH2nO)x—R2  (I) which R1 is an alkyl group containing 6 to 22 carbon atoms or a (CH2)m—COOR4 group, R2 and R4 independently of one another represent an alkyl group containing 1 to 8 carbon atoms, n is the number 2 or 3 and m is a number of 1 to 6 and x is 0 or a number of 1 to 12.
    Type: Grant
    Filed: November 26, 1999
    Date of Patent: April 9, 2002
    Assignee: Henkel Kommanditgesellschaft auf Aktien
    Inventors: Wolfgang Breuer, Claus-Peter Herold
  • Patent number: 6369931
    Abstract: A method for manufacturing a micromechanical device, in particular a micromechanical vibrating-mirror device, having the following steps: making available a three-layer structure having a first layer, a second layer and a third layer, the second layer lying between the first and the third layers; etching through the first layer up to the second layer to produce an island region, lying on the second layer, which is joined to region of the first layer surrounding the island region by way of one or more connecting webs, and etching through a region of the third layer up to the second layer and removing a region of the second layer below the island region in such a way that the island region can perform movements, preferably torsional vibrations, about the one or more connecting webs, the torsional vibrations having such an amplitude that a part of the island region extends into the etched-through region of the third layer.
    Type: Grant
    Filed: August 18, 1999
    Date of Patent: April 9, 2002
    Assignee: Robert Bosch GmbH
    Inventors: Karsten Funk, Wilhelm Frey
  • Patent number: 6361703
    Abstract: The present invention relates to a method for producing a mold having a micro-textured surface, wherein the mold can be used to form an elastomeric seal having a micro-textured surface. The resulting seal will hold an amount of lubricant that is released with time, the release of the lubricant will result in decreased friction between the seal and a surface contacted by the seal.
    Type: Grant
    Filed: March 4, 1999
    Date of Patent: March 26, 2002
    Assignee: Caterpillar Inc.
    Inventor: Alan M. Dickey
  • Patent number: 6358831
    Abstract: A method for forming a top interconnection level and bonding pads for an integrated circuit chip is described. The interconnection level is formed by a damascene type process. Bonding pads are placed above the plane of the wiring channels of the interconnection level. This eliminates the problem of dishing of the relatively large bonding pads which occurs, during chemical mechanical polishing, when the bonding pads are on the same level as the interconnection metallurgy. The interconnection wiring includes a smaller pad base segment upon which the larger bonding pad is then formed. The bonding pad base segments are small enough that dishing during CMP is not a problem. Placing the bonding pads on pad bases provides for a more robust pad. The top level and bonding pad fabrication procedures are applicable with various conductive materials including aluminum, tungsten, and copper.
    Type: Grant
    Filed: March 3, 1999
    Date of Patent: March 19, 2002
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Meng-Chang Liu, Yuan-Lung Liu
  • Patent number: 6347636
    Abstract: The present invention provides systems, methods and apparatus for high temperature (at least about 500-800° C.) processing of semiconductor wafers. The systems, methods and apparatus of the present invention allow multiple process steps to be performed in situ in the same chamber to reduce total processing time and to ensure high quality processing for high aspect ratio devices. Performing multiple process steps in the same chamber also increases the control of the process parameters and reduces device damage. In particular, the present invention can provide high temperature deposition, heating and efficient cleaning for forming dielectric films having thickness uniformity, good gap fill capability, high density, low moisture, and other desired characteristics.
    Type: Grant
    Filed: June 25, 1999
    Date of Patent: February 19, 2002
    Assignee: Applied Materials, Inc.
    Inventors: Li-Qun Xia, Visweswaren Sivaramakrishnan, Srinivas Nemani, Ellie Yieh, Gary Fong
  • Patent number: 6342164
    Abstract: A method for producing a pinhole-free dielectric film comprising applying a photopolymer to a first dielectric surface of a dielectric film having pinholes, exposing a second and opposing surface to an amount of radiation effective to polymerize the photopolymer exposed by the pinholes, and removing unpolymerized photopolymer.
    Type: Grant
    Filed: July 31, 2000
    Date of Patent: January 29, 2002
    Assignee: Motorola, Inc.
    Inventors: Allyson Beuhler, Gregory J. Dunn
  • Patent number: 6322713
    Abstract: In accordance with the invention, nanoscale connectors particularly useful for connecting microscale devices comprise free-standing nanoscale conductors. The nanoscale conductors are conveniently fabricated in sets of controlled, preferably equal length by providing a removable substrate, growing conductive nanotubes or nanowires on the substrate, equalizing the length of the nanoscale conductors, and removing the substrate. Preferably the removable substrate is soluble, leaving a collection of free standing nanoscale connectors in suspension or solution.
    Type: Grant
    Filed: July 15, 1999
    Date of Patent: November 27, 2001
    Assignee: Agere Systems Guardian Corp.
    Inventors: Kyung Moon Choi, Sungho Jin
  • Patent number: 6297469
    Abstract: The invention relates to a novel process for producing a metal-ceramic substrate in which at least one surface side of the ceramic layer is provided with at least one first structured metal layer and at least one second metal layer is applied to the first by electroless chemical deposition, and in which at least one depression or hole, or a plurality of depressions or holes are formed in the ceramic layer by laser machining to form a scored line.
    Type: Grant
    Filed: June 14, 1999
    Date of Patent: October 2, 2001
    Inventor: Jurgen Schulz-Harder
  • Patent number: 6287976
    Abstract: To move an article in and out of plasma during plasma processing, the article is rotated by a first drive around a first axis, and the first drive is itself rotated by a second drive, so that the article enters the plasma at different angles for different positions of the first axis. The plasma cross-section at the level at which the plasma contacts the article is such that those points on the article that move at a greater linear velocity (due to being farther from the first axis) move longer distances through the plasma. As a result, the plasma processing time becomes more uniform for different points on the article surface. The direction of rotation of the first and/or second drive changes during processing to improve processing uniformity. The article is allowed to be processed with the plasma only during one-half of each revolution of the second drive.
    Type: Grant
    Filed: May 19, 1999
    Date of Patent: September 11, 2001
    Assignee: Tru-Si Technologies, Inc.
    Inventors: Oleg Siniaguine, Igor Bagriy
  • Patent number: 6287476
    Abstract: A method to form a passivation layer using an electrochemical process over a MR Sensor so that the passivation layer defines the MR track width. The passivation layer is formed by anodizing the MR sensor. The passivation layer is an electrical insulator (preventing Sensor current (I) from shunting through the overspray) and a heat conductor to allow MR heat to dissipate away from the MR sensor through the overspray. The method comprises: forming a passivation layer on the MR sensor; the passivation layer formed using an electrochemical process. Then we spinning-on and printing a lift-off photoresist structure over the passivation layer. The passivation layer is etched to remove the passivation layer not covered by the lift-off structure thereby defining a track width of the MR sensor. Then we deposit a lead layer over the passivation layer and MR sensor. The lift-off structure is removed where by the passivation layer defines a track width.
    Type: Grant
    Filed: June 14, 1999
    Date of Patent: September 11, 2001
    Assignee: Headway Technologies, Inc.
    Inventors: Kochan Ju, Shou-Chen Kao, Cherng-Chyi Han, Jei-Wei Chang, Mao-Min Chen
  • Patent number: 6277295
    Abstract: A thermochemical process is disclosed that readily produces significantly roughened surfaces on densely sintered alumina. The alumina is reacted with cryolite (Na3AlF6) at a temperature of 300° C.-2075° C. for a time sufficient to produce the desired degree of roughness. This treatment causes controlled dissolution of alumina, controlled cavitation of grain boundaries, and formation of a thin film-reaction product. The resulting surface irregularities enhance subsequent micromechanical or chemical bonding of the densely sintered alumina component. The resulting roughened alumina components have numerous uses in the dental restorative and orthodontic fields, including orthodontic brackets, crowns, onlays, inlays, veneers, and the like. The technique is readily adapted to be used in either a dental office or a laboratory environment.
    Type: Grant
    Filed: April 23, 1999
    Date of Patent: August 21, 2001
    Assignee: Board of Supervisors of Louisiana State University and Argricultural and Mechanical College
    Inventors: Nikhil Sarkar, Avishai Sadan
  • Patent number: 6245682
    Abstract: This invention relates to the fabrication of integrated circuit devices and more particularly to a method for forming and then later removing a silicon oxynitride, SiON, anti-reflection coating (ARC) over a semiconductor substrate, for the purpose of enhancing the resolution of photolithographically defined sub-micron polysilicon gates. The problem addressed by this invention is that the SiON ARC must first be used to reduce optical reflection from a blanket polysilicon surface, during the photolithography exposure step that defines the sub-micron polysilicon gate features, and then the ARC must be removed by a wet etch process that will not chemically attack the gate oxide under the polysilicon gate features or any exposed polysilicon surfaces.
    Type: Grant
    Filed: March 11, 1999
    Date of Patent: June 12, 2001
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Chu-Yun Fu, Syun-Ming Jang