Patents Examined by John Gladstone Mills
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Patent number: 6128615Abstract: A shared bag, for collecting objects used in object oriented programming, implemented as a process pair resource manager intended to provide concurrent access to multiple threads. The process-pair implementation includes a concurrent aspect and a serial aspect. Each thread gains concurrent access to the shared bag through a registered transaction. The multiple threads can concurrently access the shared bag by passing messages to the concurrent aspect in order to add objects to, or remove objects from the shared bag. The concurrent aspect adds a description of each message, as well as the result of processing each message, to a transaction record associated with the transaction under which the thread is registered. The identity of each removed object is also recorded by the concurrent aspect in the transaction record. At the conclusion of a transaction, the concurrent aspect passes the transaction record to the serial aspect. The serial aspect then replays the transaction, using the transaction record.Type: GrantFiled: June 17, 1997Date of Patent: October 3, 2000Assignee: Compaq Computer CorporationInventor: Mark E. Molloy
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Patent number: 6041331Abstract: According to the present invention, a method for extracting information from a plurality of documents for display. Information is extracted from a set of documents according to a set of pre-defined categories. A visual representation of the extracted information is provided to a user, who can apply one or more filters to the information in order to produce for display a visual representation of information content in the filtered information.Type: GrantFiled: December 12, 1997Date of Patent: March 21, 2000Assignee: Manning and Napier Information Services, LLCInventors: Michael L. Weiner, John Jacob Kolb V, Todd Chronis
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Patent number: 6029172Abstract: A computer system enables a user to browse a hierarchically classified database by interactively displaying a relevant portion of the classification scheme of the database as category names and sub-category names. After a user selects a displayed category (or sub-category), the system automatically modifies the displayed relevant portion of the classification scheme in a way that is dependent on the particular selected category. The modified portion of the classification scheme that is displayed includes not only the name of the user selected category and some of the names of sub-categories thereof, but also the names of some non-selected categories that are on the same hierarchy level as the selected category and are relevant to the selected category, as well as some of the names of sub-categories of these non-selected categories, thereby helping the user to find the name of a category or sub-category of interest without overwhelming the user with too many displayed names of categories and sub-categories.Type: GrantFiled: August 19, 1997Date of Patent: February 22, 2000Assignee: U.S. Philips CorporationInventors: Gerardus C. Jorna, Mirjam S. Wouters
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Patent number: 6029173Abstract: A system and method for storing data in a computer-readable database to represent curved geographic features. The database can be used in a navigation system. A computable function is used to define a curved line that represents the curved geographic feature. The computable function may be a polynomial equation whose shape is defined by its coefficients. In one embodiment, the polynomial equation is a type of spline curve, in particular a Bezier curve whose shape is defined by control points. The coefficients of the polynomial equation are associated with data representing the curved geographic feature. In the case in which the polynomial equation is a Bezier curve, the control points for generating the Bezier curve are associated with the data representing the curved geographic feature. These control points are stored in the database and are used in displaying the curved geographic feature.Type: GrantFiled: November 26, 1997Date of Patent: February 22, 2000Assignee: Navigation Technologies CorporationInventors: James A. Meek, Richard A. Ashby, David S. Lampert
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Patent number: 5987469Abstract: A method and apparatus is provided for displaying nested rectangles which graphically illustrate the directories and files located in a storage medium such a computer hard disk drive or the nodes of a tree data structure. The sizes of the rectangles are proportional to the size of the directory or file they represent, and the rectangles are nested in a recursive manner in accordance with the branch structure of the directories and files on the storage media. Preferably, the dimensions of the rectangles are chosen to maximize the number of rectangles, especially those capable of displaying the names of the directories and files. Yet further, the invention preferably assigns colors to the rectangles based upon certain criteria and suppresses directories or files from being shown if their rectangles will be too small to be accurately perceived.Type: GrantFiled: May 13, 1997Date of Patent: November 16, 1999Assignee: Micro Logic Corp.Inventors: James D. Lewis, Bogdan N. Reznik, Eran Librach, Bryce H. Bonnet, Nancy J. Lewis
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Patent number: 4803655Abstract: An execute module in a data processing system is provided with a randomly accessible scratchpad memory which is logically divided into two switchable pages. During operation one page can be written with new instruction data from a fetch module while a previously written page is concurrently being read by the execute module for execution of a designated data processing operation. When the execute module completes execution and requires a new block of data, the two pages are logically switched by toggling an address bit.Type: GrantFiled: December 28, 1987Date of Patent: February 7, 1989Assignee: Unisys Corp.Inventor: Laurence P. Flora
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Patent number: 4775955Abstract: A method and apparatus is provided for associating in cache directories the Control Domain Identifications (CDIDs) of software covered by each cache line. Through the use of such provision and/or the addition of Identifications of users actively using lines, cache coherence of certain data is controlled without performing conventional Cross-Interrogates (XIs), if the accesses to such objects are properly synchronized with locking type concurrency controls. Software protocols to caches are provided for the resource kernel to control the flushing of released cache lines. The parameters of these protocols are high level Domain Identifications and Task Identifications.Type: GrantFiled: December 18, 1987Date of Patent: October 4, 1988Assignee: International Business Machines CorporationInventor: Lishing Liu
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Patent number: 4773041Abstract: A referencing unit which creates addresses for main memory. Specifically, this reference unit is pipelined in the manner in which it receives the operators to be executed. Concurrency is achieved by allowing any number of read-type operations to be started before operators that are waiting for a store operation to finish even though these latter operators may appear earlier in the code stream. There are two inputs into the reference unit. Each is provided with a queue, one for receiving operators and address couples and another for receiving the output from the top-of-the-stack mechanism residing in the processor. The former is called an address coupled queue and the latter is called a top-of-stack queue. Since the address couple queue operators require no stack inputs, they enter the reference pipeline, two pipeline levels below where the top-of-stack operators enter the pipeline.Type: GrantFiled: June 2, 1986Date of Patent: September 20, 1988Assignee: Unisys CorporationInventors: Joseph A. Hassler, William G. Burroughs
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Patent number: 4555772Abstract: A personal computer having an interactive all points addressable display terminal (44) and a cursor positioning device (52) and provided with apparatus for facilitating the generation of a graphics display using cursor characters selected from a table of cursor characters is capable of clearly demarking the currently selected cursor character from characters previously fixed at various points on the all points addressable display. This is accomplished by exclusive ORing the selected cursor character data with the corresponding data in the all points addressable display at the current position of the selected cursor character.Type: GrantFiled: May 31, 1983Date of Patent: November 26, 1985Assignee: International Business Machines Corp.Inventor: Lawrence K. Stephens
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Patent number: 4511983Abstract: A controller for microinstructions grouped into microprogram segments, each of which defines a base of a microprogram segment which is to be executed, includes a bank of addressable base registers. Each register in the bank stores an indication of a base in the memory. Registers in the bank are addressed so that the addressed register derives a signal indicative of the base address. Included are an address register for the memory and an output register for microinstructions read from the memory. The address and output registers respectively have outputs and inputs coupled to an address input and a read output of the memory. An adder has inputs responsive to the base indicating signal of the addressed register and to an output of the memory output register. The adder has an output coupled to an input of the address register. The output of the memory output register is coupled to an input of the means for addressing registers in the register bank to control which register of the base register bank is addressed.Type: GrantFiled: December 22, 1980Date of Patent: April 16, 1985Assignee: Compagnie Internationale pour l'Informatique CII-Honeywell Bull (Societe Anonyme)Inventors: Jean-Claude M. Cassonnet, Marie-Odile Lamarche nee Lechevin
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Patent number: 4408447Abstract: The invention relates to a method of and a system for controlling the operation of open-end spinning machines comprising a plurality of spinning units, which method is based upon a permanent cyclic communication of a central unit of the system with the individual spinning units. According to the invention, at a given instant, a single spinning unit only is connected to the central unit of the control system, said central unit being supplied with information data about the condition of the spinning unit connected thereto while said central unit simultaneously transmits instructions for said spinning unit, the other spinning units operating automatically on the basis of the stored instruction the validity of which lasts for the time of one control cycle.Type: GrantFiled: April 16, 1981Date of Patent: October 11, 1983Assignee: Vyzkumny ustav bavlnarskyInventors: Jiri Sloupensky, Miloslav Tyl
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Patent number: 4366536Abstract: A digital computer system for selecting and linking multiple separately stored data processing procedures consisting of assembly level commands and for selecting a variable data area from a plurality of variable data areas. The system includes memories for storing the data processing procedures, the variable data areas and linking addresses; a program counter for accessing the memory containing the stored data processing procedures; registers for accessing the memories containing the data and the linking addresses; and a hardware unit which is adapted to execute the assembly level commands contained in selected data processing procedures and to provide addresses to the respective memories and the program counter for accessing the memories and the program counter to select linking addresses, variable data areas and data processing procedures in accordance with assembly level commands in the data processing procedure being executed and previously selected addresses.Type: GrantFiled: April 15, 1980Date of Patent: December 28, 1982Assignee: National Semiconductor CorporationInventor: Leslie D. Kohn
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Patent number: 4349875Abstract: A buffer storage control apparatus selectively employs the conventional "least-recently-used" (LRU) algorithm or the "all-used" (AU) algorithm to determine which block of data in the buffer storage unit is to be replaced by new data. The AU algorithm relies on the fact that under certain conditions, such as the straight transfer of a block of data from a main memory to an output device under the control of an I/O supervisor, the block of data so transferred will no longer be needed. The control apparatus therefore detects such a data transfer and selectively allocates buffer storage in accordance with the AU or LRU algorithms.Type: GrantFiled: May 23, 1980Date of Patent: September 14, 1982Assignee: Nippon Electric Co., Ltd.Inventor: Masahiro Tada
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Patent number: 4327409Abstract: A control system for a plurality of I/O apparatuses used for transferring data between a main memory and an I/O apparatus controlling device through a channel control device. If an error occurs in the data transfer, no response signal is sent to the I/O apparatus controlling device from the channel control device and the absence of the response signal is detected by time supervision in the supervising circuit in the I/O apparatus controlling device, so that only the portion of the I/O apparatus related to the error is stopped.Type: GrantFiled: August 31, 1979Date of Patent: April 27, 1982Assignee: Fujitsu LimitedInventors: Minekazu Maruoka, Tatsushi Hirotani