Patents Examined by John O. Chavis
  • Patent number: 6536039
    Abstract: The software program provides a unique arrangement and integration of CD drive, data server, and PC hard disk drive technologies. The program provides open-ended, flexible, and timely updating of software programs and content for users at a remote site because the user can download individual updated program modules as needed from a designated information site through a data server to a PC hard disk drive during a program run. Therefore, the user is not required to download the updated program, await the next release of a CD containing the updated program, or use the updated program directly on a designated information site. In addition to the program modules on the CD, the user can use downloaded updated program modules from either the current or a previous program run. The updated program modules are either replacements for those on the CD or additional program modules to the entire program.
    Type: Grant
    Filed: December 24, 1998
    Date of Patent: March 18, 2003
    Assignee: Avaya Technology Corp.
    Inventor: Jesse Lon Sanford
  • Patent number: 5692190
    Abstract: A personal computer is BIOS configured to boot from an installed CD-ROM having at least one bootable partition. To enable swapping of large amounts of data stored on the CD-ROM at the BIOS level after the initial boot, the DOS-BIOS interface is modified so that a CD-ROM emulated as a hard drive file will emulate a floppy diskette image, a medium permitted by the operating system to be changed following an initial boot.
    Type: Grant
    Filed: September 27, 1994
    Date of Patent: November 25, 1997
    Assignee: International Business Machines Corporation
    Inventor: Donald D. Williams
  • Patent number: 5664194
    Abstract: In a computer-driven device, a start-up mode after reset is provided whereby boot-up instructions are by default always accepted directly from an external source. The device may comprise a gate array (GA) which is connected directly via a serial port to a receiving or input device, to receive program code for transfer directly as instructions to a microprocessor-type central processing unit. The central processing unit is part of a computer controlled device containing a microprocessor, memory (a RAM), and typically a bulk erase flash memory device, the flash memory device being unprogrammed when the computer controlled device is fabricated originally. When the computer controlled device first powers up, a special mode of operation ensues in which the gate array directly monitor bits received via the serial port from the input device and shifts them into a local register from which bytes or words are loaded directly into the CPU as instructions.
    Type: Grant
    Filed: December 4, 1995
    Date of Patent: September 2, 1997
    Assignee: Metricom, Inc.
    Inventor: David L. Paulsen
  • Patent number: 5628014
    Abstract: Methods and apparatus for caching files in DOS based computer systems are disclosed wherein the computer systems include a nonstandard drive in which files have been stored and from which files can be accessed, retrieved or written to, a computer CPU for generating instructions for accessing, retrieving or writing portions of desired files, wherein said instructions for accessing, retrieving or writing are generated through the use of DOS interrupt 21 and a drive, recognized by the computer CPU as a DOS drive, for storage and access, retrieval or writing of files, wherein the access, retrieval or writing of files from the drive can be achieved faster than access, retrieval or writing of files from the non-standard drive.
    Type: Grant
    Filed: February 3, 1995
    Date of Patent: May 6, 1997
    Assignee: ParaNode, Inc.
    Inventors: Albert B. P. Cecchini, David Kessler
  • Patent number: 5619686
    Abstract: A data source circuit and a complementary data acquisition circuit which can transmit and receive data at a higher rate than a conventional data source circuit which uses similar fabrication technology. A data source circuit of the present invention has an input for receiving a periodic source clock signal having a period T; a synchronization signal generator for generating, based on said downstream-clock signal, a series of one or more periodic synchronization signals having periods substantially equal to T, each synchronization signal being delayed from a previous synchronization signal; and a transmitter for transmitting one or more sub-words of a multi-bit data word, each sub-word having one or more bits, separate ones of said one or more sub-words being transmitted responsive to separate progressively delayed combined pairs of said synchronization signals. In a preferred embodiment of the present invention particularly suited for use in a point to point (e.g.
    Type: Grant
    Filed: November 18, 1993
    Date of Patent: April 8, 1997
    Assignee: National Semiconductor Corporation
    Inventors: Allan Lin, Jay Deng
  • Patent number: 5592676
    Abstract: A system architecture for enabling remote control of an application, including a first service processor connected via a network and a maintenance unit with channels (40) connected to a central system (4), in which the service processor (1) is connected via a service console switch (30) to a maintenance service console (RMS 6), and to a remote service console (RSC 5), wherein each service processor and each console further includes operating system programs, a supervisor program, and at least one service broken down into two applications, one called the "body", comprising the program algorithm, and the other, "presentation", including the interface with the user enabling a windows-type display with a menu bar.
    Type: Grant
    Filed: January 28, 1994
    Date of Patent: January 7, 1997
    Assignee: Bull, S.A.
    Inventor: Jean-Francois Bonnafoux
  • Patent number: 5581763
    Abstract: A portable secure computer architecture, apparatus, and method for protecting information and at least one program for controlling that information is disclosed comprising: a computer protected inside of a single sealed cartridge, the computer having a CPU, Memory, and a communications means for communicating with a host computer outside of the cartridge. All internal information and external communications are exclusively controlled by the internal program. Provision is also made for running a second program inside the architecture, while protecting secure information from that second program. Secure information is placed in a bank switched subdivision of memory. The subdivision is switched off by the information controlling program before the second program is permitted to run. Reactivating the protected subdivision causes a simultaneous non-maskable interrupt halting the second program and transferring control back to the first program.
    Type: Grant
    Filed: April 29, 1994
    Date of Patent: December 3, 1996
    Assignee: Progressive Technology Inc.
    Inventor: John N. Hait
  • Patent number: 5524243
    Abstract: Method and apparatus for rapidly configuring several field programmable gate arrays ("CFPGAs"), some of which FPGAs are of different sizes. In accordance with the present invention, the configuration is provided to each FPGA in parallel, on a bit-wise basis. Further, the different sizes of FPGA are accommodated by utilizing dummy bits in the configuration data. Still further, the configuration process can be completed at different times, i.e., the completion times of the configuration process can be staggered, by use of dummy bits in the configuration data.
    Type: Grant
    Filed: April 28, 1995
    Date of Patent: June 4, 1996
    Assignee: Rolm Company
    Inventor: Florin Gheorghiu
  • Patent number: 5519866
    Abstract: A human oriented object programming system provides an interactive and dynamic process for the incremental building of computer programs which facilitates the development of complex computer programs such as operating systems and large applications with graphic user interfaces (GUIs). The program is modeled as a collection of units called components. A component represents a single compilable language element such as a class or a function. The major functionalities are the database, the compiler, build and link mechanism. The database stores the components and properties. The compiler, along with compiling the source code of a property, and generating object code is responsible for calculating the dependencies associated with a component. The build mechanism uses properties of components along with the compiler generated dependencies to correctly and efficiently sequence the compilation of components during a build process.
    Type: Grant
    Filed: June 28, 1993
    Date of Patent: May 21, 1996
    Assignee: Taligent, Inc.
    Inventors: Roger P. Lawrence, John R. Dance
  • Patent number: 5452435
    Abstract: A media player and the clock which controls it are integrated into a single object. This integration may be achieved by the construct of inheritance between objects in an object oriented programming environment. A software class for player objects is established which inherits from a software class for clock objects. In this way, a player "is a" clock. This integration provides improved synchronization among different media, and simplifies design of applications which employ player objects and clock objects. Each object is synchronized to a RootClock object which operates at the speed of the fastest media player in the system. The RootClock may be separated into "low" order and "high" order components and a compare register in order to reduce interrupt overhead.
    Type: Grant
    Filed: March 31, 1993
    Date of Patent: September 19, 1995
    Assignee: Kaleida Labs, Inc.
    Inventors: Frederick L. Malouf, Erik R. Neumann
  • Patent number: 5319782
    Abstract: A method for synchronizing the dispatching of tasks from a CPU-based first multitasking operating system (OS) with threads of function calls opportunistically dispatched from a CPU-based second multitasking operating system. The second OS includes a set of callable resources. In the method, a task becomes bound to a thread for the duration of that thread's ownership of a callable resource from the second OS. Also, a thread becomes available on a work queue of threads for binding to a task only if the thread owns exactly one resource. After execution, the function is eliminated from the thread and ownership of that resource is relinquished and passed to the next thread queued on that resource. A task can remain bound to the same thread if there are no other threads asserting ownership to the next resource being called by the original thread. With contention, however, the task relinquishes the thread and becomes bound to another thread on the work queue.
    Type: Grant
    Filed: February 16, 1993
    Date of Patent: June 7, 1994
    Assignee: International Business Machines
    Inventors: Steven H. Goldberg, Gerald W. Holten, Jerome A. Mouton, Jr.