Patents Examined by Joseph Palys
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Patent number: 5826005Abstract: A system, method and computer program product of especial utility in allowing a user to insert a diagnostic computer program probe into an operating application computer program to either obtain a readout concerning the state of the application program or to introduce new behavior into it such that the results can be monitored. Through the provision of a number of application computer program probe points and corresponding diagnostic computer program probes herein disclosed, the invention may be utilized in conjunction with an operational application program and the corresponding diagnostic program may be developed independently of the application program the behavior of which is to be diagnosed.Type: GrantFiled: March 22, 1996Date of Patent: October 20, 1998Assignee: Sun Microsystems, Inc.Inventor: Billy J. Fuller
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Patent number: 5822513Abstract: A method and apparatus are provided for detecting stale write data bugs associated with storage systems. The detection is accomplished by choosing a data pattern signature for each block of a storage device to be tested. The data pattern signature is then stored in a write log table which provides an index as to the data pattern signature associated with each block. Then, the block is filled by writing, in a repeating fashion, the data pattern signature until all bytes of the block have been written. At a later time, the entire block is read from the storage device. Once read, each byte retrieved is compared against the value of the data pattern signature currently stored in the write log for that block. If a mismatch is detected, then the error is reported and stored in a error log so that the bug may be eliminated.Type: GrantFiled: September 27, 1996Date of Patent: October 13, 1998Assignee: EMC CorporationInventors: Erez Ofer, Brian L. Garrett
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Patent number: 5822514Abstract: A method and system for processing signals in a protection system involves executing operations on signals that are complimentary to each other, such that the results of the operations determines whether the operations can be continued. Logic operations are performed and controlled variables, and complimentary operations are performed and controlled by state machines which trigger one another, to configure the system as a "house of cards" architecture, such that the entire correct functioning of the system of cooperating state machines is disabled when something goes wrong with one of the state machines.Type: GrantFiled: July 17, 1996Date of Patent: October 13, 1998Assignee: NV GTI HoldingInventors: Hendrik Christian Steinz, Johannes Roland Dassel
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Patent number: 5819024Abstract: A fault analysis system searches for a cause of a fault on the basis of dump data output to a dump file at the time of occurrence of the fault. When the fault analysis system is started, a CPU resource condition corresponding to each task is read from the dump data and is set in a CPU resource condition holding unit. A resource condition switching control unit automatically switches the CPU resource condition for reference and displays a memory content for each task. Upon termination or interruption of the analysis, a resource condition file input/output control unit stores the CPU resource conditions each corresponding to the tasks already used for reference in a resource condition file, and upon re-starting of a search, it re-sets the CPU resource conditions read from the resource condition file in the CPU resource condition holding unit.Type: GrantFiled: July 10, 1996Date of Patent: October 6, 1998Assignees: Hitachi, Ltd., Hitachi Software Engineering Co., Ltd.Inventors: Tsutomu Kasuga, Etsurou Anzai
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Patent number: 5819029Abstract: An automated third party verification system and method for verifying a customer's authorization to switch long distance service providers. The system broadly comprises a customer database manager, a third party verification (TPV) interactive voice response (IVR) system, and a TPV management system. The customer database manager contacts the customer and, responsive to the customer's authorization to switch long distance carriers, creates a text file of the customer's responses to a series of questions supporting the authorization. The text file is sent to the TPV IVR system. The TPV IVR system directs a series of scripted questions, corresponding to those already asked by the customer database manager, to the customer and records the responses as voice clips. The TPV management system presents the voice clips and the corresponding text file to a verifier through a voice data verification module.Type: GrantFiled: February 20, 1997Date of Patent: October 6, 1998Assignee: Brittan Communications International Corp.Inventors: Jim G. Edwards, Robert W. Taylor, William J. Hokanson, Lynn A. Evans, Patricia A. Middleton, Frederick G. Lauckner, Andres E. Martinez, Edmond Jacobs
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Patent number: 5815655Abstract: A device for generating an error path list for analyzing delay times of paths generating errors, which paths connect first nodes with second nodes, includes a reading unit for reading information on the paths and the delay times thereof, a representative-path extraction unit for extracting worst paths in terms of the delay times as representative paths by using the information, and an output unit for generating the error path list reporting the representative paths.Type: GrantFiled: February 28, 1997Date of Patent: September 29, 1998Assignee: Fujitsu LimitedInventor: Akira Koshiyama
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Patent number: 5815731Abstract: A method and system for providing device driver configurations on demand during runtime within a computer system is disclosed. In accordance with a method of the present invention, a Hardware Namespace is constructed by a Hardware Resource Manager and a Logical Device Namespace is constructed by a Logical Device Manager within the computer system. A determination is made as to whether or not the peripheral device is contained within the Hardware Namespace and whether or not a device driver for the peripheral device is also contained within the Logical Device Namespace, in response to a first attempt to access a peripheral device after system boot-up by an application software. In response to a determination that the peripheral device is not contained within the Hardware Namespace, a user is prompted to install the peripheral device within the computer system.Type: GrantFiled: October 31, 1996Date of Patent: September 29, 1998Assignee: International Business Machines CorporationInventors: Ronald Patrick Doyle, Patricia Stephany Hogan, Sandra Juni Schlosser
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Patent number: 5812757Abstract: A fault recovery process of a computer is provided for removing a fault from the system as soon as possible, minimizing the secondary fault and improving the availability of the system. In a reliable computer, which includes a system bus, a main memory connected to the system bus, and at least one processing board connected to the system bus, at least one processing board executes the same instructions by n (n>=3) processing units having cache memories respectively. When one of the processing units of the processing board becomes faulty, the other processing units continue executing the processes, which are being executed by the faulty processing board, and then, the processes to be registered in the faulty processing board, are succeeded by other processing boards.Type: GrantFiled: July 5, 1996Date of Patent: September 22, 1998Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Hiromu Okamoto, Takashi Tanabe, Kaoru Abe, Tsugihiko Ohno, Toyohito Hatashita, Toshihisa Kamemaru, Norihisa Kaneda, Mamoru Katoh, Masakazu Soga
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Patent number: 5812759Abstract: A method of handling a fault which occurs during execution of an executable program comprises the steps of designating a first sequence of instructions of the executable program as visible and designating a second sequence of instructions of the executable program as invisible. According to this scheme, for the first visible sequence of instructions, faults are reported in a manner which designates an instruction at which the fault occurred. For the second invisible sequence of instructions, faults are reported in a manner which designates the invisible sequence of instructions as a whole. The invention permits fault handling for instructions added by a user to be performed in the same way as fault handling for built-in functions, and is usable with compiled machines.Type: GrantFiled: November 8, 1996Date of Patent: September 22, 1998Assignee: Allen Bradley Company, Inc.Inventor: Jeffery W. Brooks
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Patent number: 5812756Abstract: A network controller card having a processor, memory and program logic. The program logic can be used as communications circuits and as testing circuits. A reconfigure signal from a workstation remotely located from the network controller card initiates the processor to change the program logic from communications circuits to testing circuits and vice versa.Type: GrantFiled: December 20, 1996Date of Patent: September 22, 1998Assignee: Verilink CorporationInventor: Steven C. Taylor
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Patent number: 5805795Abstract: A method for selecting a set of test cases which may be used to test a software program product is disclosed. The program to be tested may have a number of code blocks that may be exercised during execution of the program. The method includes identifying each of the code blocks that may be exercised, and determining a time for executing each of the test cases in the set. A set of the test cases is then selected that exercises a maximum number of the identified code blocks that can be exercised in a minimum time. The selection step may be performed by executing a genetic algorithm for determining which subset of test cases to use, using a combination of time and coverage as a fitness value.Type: GrantFiled: January 5, 1996Date of Patent: September 8, 1998Assignee: Sun Microsystems, Inc.Inventor: Thomas G. Whitten
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Patent number: 5805787Abstract: Large numbers of relatively small (e.g., 1.8" or smaller) off-the-shelf disk drives are controlled to maximize the highest throughput performance at the least cost between a host computer and a mass storage subsystem. Host data is stored redundantly so as to form a cache. The controller recognizes data contained in its associated disk cache so as to produce that data to a requesting host with minimum delay. Data not in the disk cache as well as write commands are transferred to the controller of a mass storage subsystem with no substantial delay.Type: GrantFiled: December 29, 1995Date of Patent: September 8, 1998Assignee: EMC CorporationInventors: William A. Brant, Michael Edward Nielson
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Patent number: 5805800Abstract: The CPU in the processing unit of an external storage device transmits data between an information processing device and a storage medium, determines whether or not the information processing device can access the storage medium of the external storage device, decrypts data encrypted in the storage medium, etc. using a program loaded into RAM through an interface or a read/write unit. Changing the data loaded into the RAM efficiently and flexibly guarantees the security of the data stored on the storage medium.Type: GrantFiled: October 21, 1996Date of Patent: September 8, 1998Assignee: Fujitsu LimitedInventors: Seigo Kotani, Keiichi Murakami, Shinichi Yoshimoto, Kouichi Kanamoto, Tatsuro Masuda, Makoto Yoshioka, Masao Fujiwara
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Patent number: 5805796Abstract: A software system and corresponding method of operation represents physical devices as software objects that are derived from a generic base class. A diagnostic system operating on a processor includes a base class operating on the processor, a physical device connected to the processor and a diagnostic device object derived from the base class and having an encapsulated device characteristic definition corresponding to physical characteristics of the physical device so that the diagnostic device object is associated with the device. The base class is a generic class that serves as a template for other classes. A method of performing a diagnostic operation relating to a physical device in a computing system includes the steps of creating a generic base class, deriving a software object from a generic base class and representing the physical device as the derived software object.Type: GrantFiled: March 27, 1996Date of Patent: September 8, 1998Assignee: Dell USA, LPInventors: Richard W. Finch, Roderick W. Stone
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Patent number: 5802276Abstract: A system, method and article of manufacture for improving object security in distributed object systems, in an information handling system employing object oriented technology, includes one or more workstations, each workstation having one or more processors, a memory system, an input/output subsystem which may include one or more input/output controllers, each controlling one or more input/output devices, such as communications devices, cursor control devices, keyboards, and display devices, an operating system program such as the OS/2 multi-tasking operating system (OS/2 is a registered trademark of International Business Machines Corporation), and an object oriented control program such as the Distributed System Object Method (DSOM) program available from International Business Machines Corporation, wherein the object oriented control program includes a vault object containing security credentials for objects in the distributed system.Type: GrantFiled: January 3, 1996Date of Patent: September 1, 1998Assignee: International Business Machines CorporationInventors: Messaoud Benantar, George Robert Blakley, III, Anthony Joseph Nadalin
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Patent number: 5802269Abstract: A method and apparatus for controlling accesses to DMA control registers, specifically operating according to a Distributed Direct Memory Access (DDMA) protocol. When an access to a peripheral device ends in a Master Abort due to the failure of the peripheral device to respond to the DDMA Master component during a DDMA transaction, a System Management Interrupt (SMI#) is generated to the central processing unit. In the resulting execution of the System Management Mode code by the CPU, the cause of the peripheral component not responding (e.g., that the peripheral is in a low power mode, the connection between the DDMA master and the peripheral is interrupted, etc.) is determined. The CPU, executing SMM code, takes steps to correct the problem. For example, if the peripheral is powered down, the CPU will power it up so that the DDMA transaction can subsequently occur.Type: GrantFiled: June 28, 1996Date of Patent: September 1, 1998Assignee: Intel CorporationInventors: David Poisner, Rajesh Raman
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Patent number: 5799148Abstract: The present invention discloses a system and a method for estimating a measure of confidence in a match generated from a case-based reasoning system. The measure of confidence is determined by using a confidence function that is derived for all existing cases in the case base. The confidence function is then used to estimate the confidence of any matches between a new case and an existing case. In the present invention, a retrieval unit uses a similarity index and retrieves any existing cases from the case base that has a measurement of similarity to the new case that is within a predetermined similarity threshold. The confidence function then maps the similarity measurement for each retrieved case to a corresponding measure of how many different outcomes are likely given the level of similarity. A report of the existing cases that have the best measures of confidence are then provided in a list.Type: GrantFiled: December 23, 1996Date of Patent: August 25, 1998Assignee: General Electric CompanyInventors: Paul Edward Cuddihy, William Estel Cheetham
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Patent number: 5799145Abstract: Test data are written into all password data areas SDAs located on each of surfaces of a disk arranged in a disk drive apparatus. SDAs each having a low error rate are selected. A predetermined number of SDAs dispersed on the plural disk surfaces are selected as effective SDAs from the selected SDAs. Position data of these effective SDAs are registered in an EEPROM. A password is written into each of the effective SDAs in a low error rate order and the disk drive apparatus is set to a locked state. A password input by a user is compared with the password written into each of the effective SDAs to release the locked state. Therefore, when an unlock command is input, the password is read from each of the effective SDAs in the writing sequential order of the password. When the password is correctly read, the read password is compared with the password input by the user. The locked state is released only when these passwords coincide with each other.Type: GrantFiled: August 2, 1996Date of Patent: August 25, 1998Assignee: Kabushiki Kaisha ToshibaInventors: Hiroshi Imai, Tasuku Kasebayashi
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Patent number: 5799143Abstract: A method for multiple context analysis of software applications in a multiprocessing (22, 23), multithreaded computer environment utilizes instrumentation code inserted (54, 55) into the applications. For each execution (67) of the application (60), a context set is selected (62). Execution of the instrumented code (67) provides information for analysis in an instrumentation buffer (82) addressed by a reserved register (80) or buffer pointer. The operating system is responsible for providing in the reserved register (80) the address of the instrumentation buffer (82) appropriate for each instrumented context executed. When the application (60) is done with an instrumentation buffer (82), the buffer may be processed by filter software (68).Type: GrantFiled: August 26, 1996Date of Patent: August 25, 1998Assignee: Motorola, Inc.Inventors: Farooq Butt, Roger Smith, Katherine E. Stewart
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Patent number: 5799144Abstract: There is a problem that a mechanism for patching a bug of a program stored in a ROM does not function correctly when a queue buffer for prefetching an instruction is provided. According to a microcomputer of the present invention, a comparison circuit compares address information stored in a register with address data on an address bus and a latch circuit is put in a set state by a match signal activated by the comparison circuit and put in a reset state by a branch-generation signal or a JMP-instruction-code end signal. In the reset state, an operation to output data from a JMP-instruction-code ROM to a data base is disabled.Type: GrantFiled: November 26, 1996Date of Patent: August 25, 1998Assignee: Mitsubishi Denki Kabushiki KaishaInventor: Masao Mio