Abstract: A master-slave architecture deployment method based on snapshot includes: restoring a core library corresponding to a MySQL database at any point in snapshot time, where the core library is a virtual library of the MySQL database; querying out at least one piece of configuration information necessary for master-slave configuration of the MySQL database by using the core library as baseline; taking a snapshot on the core library by using a snapshot technology; creating and cloning at least one copy library corresponding to the core library respectively based on the snapshot and the at least one piece of configuration information necessary for master-slave configuration; and configuring a master-slave relationship and a master library and a slave library corresponding to the master-slave relationship for the core library and the at least one copy library. A master-slave architecture deployment device based on snapshot is further provided.

Abstract: Systems, methods, and devices for isolating a misbehaving accelerator circuit, such as an accelerator function unit or an accelerated function context, are provided. An integrated circuit may include a region that includes an accelerator circuit. When the accelerator circuit issues a request, another region of the integrated circuit or a processor connected to the integrated circuit may determine whether there is a misbehavior associated with the request and, in response to determining that there is a misbehavior associated with the request, may perform a misbehavior response to mitigate a negative impact of the misbehavior of the accelerator circuit.

Abstract: An operation log visualization device includes processing circuitry configured to store operation logs each containing a captured image of an operation screen captured during an operation and information identifying a position of an operation location in an operation target window on the operation screen, generate images in each of which a portion corresponding to the position in the captured image is highlighted, and generate a flowchart by arranging the generated images in an order of processing of operation logs corresponding to the images.

Abstract: An apparatus includes circuitry configured to generate multiple results, each result using a different read voltage, in response to one or each received data access command. The multiple read results may be used to dynamically calibrate a read voltage assigned to generate a read result in response to a read command.

Abstract: Techniques are provided for maintaining and recomputing reference counts in a persistent memory file system of a node. Primary reference counts are maintained for pages within persistent memory of the node. In response to receiving a first operation to link a page into a persistent memory file system of the persistent memory, a primary reference count of the page is incremented before linking the page into the persistent memory file system. In response to receiving a second operation to unlink the page from the persistent memory file system, the page is unlinked from the persistent memory file system before the primary reference count is decremented. Upon the node recovering from a crash, the persistent memory file system is traversed in order to update shadow reference counts for the pages with correct reference count values, which are used to overwrite the primary reference counts with the correct reference count values.

Abstract: An anomaly detection method includes: reading a branch target address corresponding to a branch instruction, twice or more; determining whether the branch target addresses read are identical; and executing the branch instruction when the branch target addresses read are identical, and executing anomaly detection processing when the branch target addresses read are not identical.

Abstract: Techniques facilitating anomaly detection and root cause analysis using distributed trace data. In one example, a system can comprise a processor that executes computer executable components stored in memory. The computer executable components comprise: a preprocessing component; and a monitor component. The preprocessing component can generate a trace frame comprising a vectorized representation of textual trace data produced by microservices of a microservice application. The monitor component can identify a state of the microservice application using the trace frame.

Abstract: In certain aspects, a memory device includes an array of memory cells, an input/output (I/O) circuit, and I/O control logic coupled to the I/O circuit. The array of memory cells includes P groups of banks. P redundant banks are included in and shared by the P groups of banks. The I/O circuit is coupled to the P groups of banks and configured to direct P×N pieces of data to or from P×N working banks, respectively. The I/O control logic is configured to determine the P×N working banks from the P groups of banks based on bank fail information indicative of K failed main banks from the P groups of banks. The P×N working banks include K redundant banks of the P redundant banks. The I/O control logic is also configured to control the I/O circuit to direct P×N pieces of data to or from the P×N working banks, respectively.

Abstract: A system, program product, and method for validating a system under test (SUT). The method includes generating one or more application programming interface (API) requests. The method also includes selecting one or more random biases for one or more properties of the one or more API requests. The method further includes generating a random sample of one or more values from an input domain space, wherein the one or more values are associated with one or more respective fields of the API being requested.

Abstract: Systems and methods are provided for detecting and correcting address errors in a memory system. In the memory system, a memory device generates an error-detection code based on an address transmitted via an address bus and transmits the error-detection code to a memory controller. The memory controller transmits an error indication to the memory device in response to the error-detection code. The error indication causes the memory device to remove the received address and prevent a memory operation.

Abstract: Apparatus and Method for Fault Handling of an Offload Transaction. For example, one embodiment of a processor comprises: a plurality of cores; an interconnect coupling the plurality of cores; and offload circuitry to transfer work from a first core of the plurality of cores to a second core of the plurality of cores without operating system (OS) intervention, the work comprising a plurality of instructions; the second core comprising first fault management logic to determine an action to take responsive to a fault condition, wherein responsive to detecting a first type of fault condition, the first fault management logic is to cause the first core to be notified of the fault condition, the first core comprising second fault management logic to attempt to resolve the fault condition.

Abstract: Techniques disclosed herein relate to managing notifications to a user associated with a computing device. The notifications correspond to a response to an indication of an exception condition on the computing device. The response to the exception condition includes a plurality of steps, including computer-implemented steps in which data objects output a plurality of notifications for the user. These notifications are processed by a notification choreographer and used to prepare a unified status communication. The unified status communication is output to the user and depicts information corresponding to a plurality of the notifications.

Abstract: Disclosed are a method and device for positioning a faulty disk. The method comprises: in response to detecting that a first disk is faulted, determining positioning information of the first disk, the positioning information comprising a logic Enclosure Identity (EID) and a logic Slot Identity (SID); and positioning the first disk according to the EID and SID of the first disk.

Abstract: A workload is generated to verify a system. The generating includes parsing one or more statements of an input test case to create one or more parsed structures. A comparison is performed of at least one parsed structure of the one or more parsed structures and at least one workload structure of at least one existing workload to identify one or more workload structures as matching the at least one parsed structure. Runtime data relating to at least the one or more workload structures identified as matching is obtained. The workload is created based on at least one matching workload structure of the one or more workload structures identified as matching, the at least one parsed structure of the one or more parsed structures and the runtime data.

Abstract: A method includes monitoring performance of a generated model while the generated model is being used for classification on live data, the monitoring including determining a first performance value of the generated model at a first point in time and determining a second performance value of the generated model at a second point in time; rendering, within a graphical user interface, a plot including a first axis and a second axis, the first axis including a characterization of a first performance metric and the second axis including a characterization of a second performance metric; and rendering, within the graphical user interface and the plot, a first graphical object at a first location characterizing the first performance value and a second graphical object at a second location characterizing the second performance value. Related apparatus, systems, techniques and articles are also described.

Abstract: A method for executing and evaluating financial services technology solutions in a secured testing environment during a regulatory approval process includes receiving, by a first computing device, via a user interface, a regulatory process application from a second computing device. The first computing device receives an application programming interface call providing an instruction for use in executing, within a secured testing environment, a software application identified within the regulatory process application. The first computing device executes the software application within the secured testing environment. The first computing device provides access to the software application executing within the secured testing environment to a user of a third computing device, during at least one phase of a regulatory approval process. The first computing device receives a result of the at least one phase of the regulatory approval process.

Abstract: Embodiments include systems and methods for generating a data throughput estimation model. A system may be monitored to measure both (a) data throughput and (b) computing statistics of one or more computing resources to generate an initial data set. The relationship between the data throughput and the computing statistics, in the initial data set, is used to generate a data throughput estimation model. The data throughput estimation model may be generated using a machine learning model, a neural network algorithm, boosting decision tree algorithm, and/or a random forest decision tree algorithm. Additional measurements of the computing resource statistics may be applied to the data throughput estimation model to estimate data throughput.

Abstract: A method, system, and computer program product for testing a container orchestration system are disclosed. The method includes replicating objects of a production cluster by extracting an object definition from an object and transforming the object definition to create a replicated object definition with an equivalent syntactic form. The replicated object definition requires fewer resources than the object definition. The method also includes applying the replicated objects of the production cluster to a simplified test cluster that replicates a configuration of the production cluster in a scaled down form. Additionally, the method includes testing, with the simplified test cluster, an upgraded version of the container orchestration system.

Abstract: There is provided a computer implemented method, a system for performing the method, and a computer program for recreating a program state. In one aspect, the invention comprises associating a step counter with respective points in the progress of a program's execution and generating a snapshot by storing the set of program values associated with a first step counter value. The state of the program is subsequently recreated by recreating the program state from the snapshot preceding the point in the progress of the program execution associated with a query step counter value and executing the program from the recreated state of the program to the point in the progress of the program execution associated with the second index reference value, including using previously stored non-deterministic values.

Abstract: A memory evaluation method includes determining a health degree evaluation model indicating a relationship in which a health degree of a memory changes with at least one health degree influencing factor of the memory; obtaining at least one running parameter value corresponding to each of the at least one health degree influencing factor; separately matching the at least one running parameter value corresponding to each health degree influencing factor to the health degree evaluation model, to obtain the health degree of the memory; and outputting health degree indication information indicating whether the memory needs to be replaced.