Patents Examined by Kamand Cureo
  • Patent number: 7119284
    Abstract: Printed circuit board with insulated metal substrate with integrated cooling systemlt comprises a metal substrate (10), at least one electrically insulating layer (11) adhered to said metal substrate (10) and several electro-conducting tracks (12) capable of interconnecting electronic power components (24), adhered to said electrically insulating layer (11), said metal substrate (10) incorporating several heat transporting channels comprising several conduits for a heat-carrying fluid, conduits which extend to the outside of the metal substrate up to a heat transfer area to an outside medium.
    Type: Grant
    Filed: December 26, 2003
    Date of Patent: October 10, 2006
    Assignee: Lear Corporation
    Inventors: Caƕles Borrego Bel, Xavier Sanchez Foguet, Alex Subirates Sole
  • Patent number: 6552277
    Abstract: The invention is directed to techniques for forming a connection between a pin and a circuit board using a pin having protruding portions and grooved surfaces that extend between the protruding portions. The protruding portions (i) prevent the pin from inadvertently slipping through a via of the circuit board, and (ii) maintains the pin's proper position relative to the circuit board via. The grooved surfaces enable gas to vent from a cavity in the via during the solder process thus enabling solder to flow within the via and form a reliable and robust solder joint between the pin and the circuit board via. In one arrangement, the protruding portions and grooved surfaces are at both ends of the pin enabling the pin to be soldered between two circuit board sections. In one arrangement, the pin is simultaneously soldered to both circuit board sections. In another arrangement, the pin is initially soldered to one circuit board section, and subsequently soldered to another circuit board section.
    Type: Grant
    Filed: September 8, 2000
    Date of Patent: April 22, 2003
    Assignee: EMC Corporation
    Inventor: Stuart D. Downes
  • Patent number: 6403895
    Abstract: A semiconductor device includes a wiring substrate which includes a wiring pattern provided per each wiring with a land covering an external terminal mounting perforation for mounting an external terminal, said land being provided on a side of the wiring pattern on which side a semiconductor chip is mounted, wherein a plurality of second pads for electrically connecting the wiring and the semiconductor chip by wire bonding are provided per each wiring, and at least one of the second pads is provided between lands.
    Type: Grant
    Filed: February 4, 2000
    Date of Patent: June 11, 2002
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Yoshiki Sota
  • Patent number: 6400578
    Abstract: This invention relates to an improved framework of disk array comprising a frame case in which a plurality of removable hard disk cartridges is neatly arrayed. Each hard disk cartridge contains a power supply and an adapter of disk array signal control device directly connected to the PC board in such a manner as to make the bottom of the removable hard disk not only closer to the PC board, but also the height of the casing lower than the prior art, conducive to receiving more hard disk array system, and achieving higher stability and less failure.
    Type: Grant
    Filed: October 6, 2000
    Date of Patent: June 4, 2002
    Assignee: Portwell Inc.
    Inventor: Chih-Chung Chen
  • Patent number: 6384339
    Abstract: A new process for electrically and mechanically joining arrays of conductors on flexible printed circuits and other flexible conductors including collated flat, flexible cables (FFCs). An array of flat copper conductors on a flexible dielectric sheet is electroplated with tin-lead solder. Surface insulation is locally omitted or removed from conductor surfaces. A second circuit or cable is overlapped in competent electrical communication and the solder plating fused by inductively heating the copper to join the two conductor arrays. An adhesive placed between conductors is also thermally activated to bond the film on the two cable arrays together. This insulates the electrical connections and seals them from attack by moisture and chemical pollutants.
    Type: Grant
    Filed: March 12, 2001
    Date of Patent: May 7, 2002
    Assignee: Sheldahl, Inc.
    Inventor: David Neuman