Patents Examined by Kamini B Patel
  • Patent number: 11886324
    Abstract: A relay and metering test instrument includes an application processor circuitry to control functional operation of the relay and metering test instrument. The application processor circuitry may receive a user selected source code state program, and operational parameters input by the user. The application processor circuitry may compile the source code state program and the operational parameters into a test routine for storage in a memory circuitry with other test routines. The relay and metering instrument may also include a real time processor circuitry and an input/output processor circuitry. The real time processor circuitry may selectively and independently execute the test routine or one of the other test routines to perform one or more respective testing stages. The input/output processor circuitry may cooperatively operate with the real time processor circuitry to output test signals and monitor for receipt of input test signals according to execution of the test routine.
    Type: Grant
    Filed: December 17, 2021
    Date of Patent: January 30, 2024
    Assignee: DOBLE ENGINEERING COMPANY
    Inventors: Scott Harold Gilbertson, Kevin M. Sullivan
  • Patent number: 11886318
    Abstract: Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for monitoring technology usage and performance. In some implementations, use of a technology item by one or more individuals assigned to use the technology item is monitored. Based on the monitoring, usage data that indicates usage of the technology item is generated. One or more criteria for evaluating the usage of the technology item by the one or more individuals is identified. It is determined whether usage data satisfies the one or more criteria. A system provides, for display on a user interface, output data indicating whether the usage data satisfies the one or more criteria.
    Type: Grant
    Filed: January 30, 2023
    Date of Patent: January 30, 2024
    Assignee: VigNet Incorporated
    Inventors: Praduman Jain, Josh Schilling, Dave Klein, Mark James Begale
  • Patent number: 11880284
    Abstract: A storage restore system includes a processor, a memory, and a restore part configured to generate, in a recovery-destination storage area to which to recover a file or a directory stored in a designated storage area and indicated by object data including the file or the directory and parent directory information which is information on a directory to which the file or the directory belongs, a directory indicated by the parent directory information in the object data, and configured to generate the file or the directory indicated by the object data under the directory thus generated.
    Type: Grant
    Filed: March 18, 2022
    Date of Patent: January 23, 2024
    Assignee: HITACHI, LTD.
    Inventor: Ryo Furuhashi
  • Patent number: 11880278
    Abstract: It is made possible to pursue both higher speeds of rebuilds in the distributed RAID scheme and high availability due to acquisition of DE-failure tolerance. A virtual chunk includes k (k is an integer that is equal to or larger than two) virtual parcels including a virtual parcel having user data and a virtual parcel having element data that is redundant data for repairing the user data, the virtual parcels included in the same virtual chunk is stored by mapping the virtual parcels in storage areas of k mutually different physical storage drives among N (k<N) of the physical storage drives, and the maximum value of the numbers of the same virtual parcels to be mapped to the physical storage drives housed in the same drive enclosures is equal to or smaller than a predetermined value.
    Type: Grant
    Filed: March 9, 2022
    Date of Patent: January 23, 2024
    Assignee: HITACHI, LTD.
    Inventors: Takeru Chiba, Hiroki Fujii
  • Patent number: 11868166
    Abstract: In an approach to improve detecting and correcting errors in one or more machine learning pipelines. Embodiments comprise generating a plurality of test machine learning pipeline instances based upon a target machine learning pipeline and evaluating the plurality of test machine learning pipeline instances for failure in a task. Further, embodiments identify one or more root causes of error based upon the evaluated plurality of test machine learning pipeline instances and failure in the task, and create a remediated target machine learning pipeline based upon the identified one or more root causes of error. Additionally, embodiments output the remediated machine learning pipelines.
    Type: Grant
    Filed: August 5, 2021
    Date of Patent: January 9, 2024
    Assignee: International Business Machines Corporation
    Inventors: Julian Timothy Dolby, Jason Tsay, Martin Hirzel
  • Patent number: 11868223
    Abstract: A read-disturb-based read temperature information utilization system includes a read-disturb-based read temperature information utilization subsystem coupled to a storage subsystem including storage devices that each generate local read-disturb-based read temperature information associated with that storage device. The read-disturb-based read temperature information utilization subsystem retrieves at least some of the local read-disturb-based read temperature information generated by each storage device and a number of reads associated with that storage device and, based on the number of reads associated with each of the storage devices, normalizes the at least some of the local read-disturb-based read temperature information retrieved from each of the storage devices to generate normalized local read-disturb-based read temperature information for each of the storage devices.
    Type: Grant
    Filed: January 19, 2022
    Date of Patent: January 9, 2024
    Assignee: Dell Products L.P.
    Inventors: Ali Aiouaz, Walter A. O'Brien, III, Leland W. Thompson
  • Patent number: 11868756
    Abstract: There are provided systems and methods for a compute platform for machine leaning model roll-out. A service provider, such as an electronic transaction processor for digital transactions, may provide intelligent decision-making through decision services that execute machine learning models. When deploying or updating machine learning models in these engines and decision services, a model package may include multiple models, each of which may have an execution graph required for model execution. When models are tested from proper execution, the models may have non-performant compute items, such as model variables, that lead to improper execution and/or decision-making. A model deployer may determine and flag these compute items as non-performant and may cause these compute items to be skipped or excluded from execution. Further, the model deployer may utilize a pre-production computing environment to generate the execution graphs for the models prior to deployment or upgrading.
    Type: Grant
    Filed: August 10, 2021
    Date of Patent: January 9, 2024
    Assignee: PAYPAL, INC.
    Inventors: Sudhindra Murthy, Divakar Viswanathan, Vishal Sood
  • Patent number: 11847867
    Abstract: An apparatus of optimizing an alarm offset for an AUTomotive Open System Architecture (AUTOSAR) operating system, may include a start module configured to input an offset value of a predetermined offset table to an offset variable value for each alarm information related to an alarm setting test file; and an execution module configured to execute the alarm setting test file based on the input offset value and output an execution result for optimizing the alarm offset.
    Type: Grant
    Filed: November 18, 2020
    Date of Patent: December 19, 2023
    Assignee: HYUNDAI AUTOEVER CORP.
    Inventor: Jun Ho Cho
  • Patent number: 11847045
    Abstract: A model validation system is described that is configured to automatically validate model artifacts corresponding to models. For a model artifact being validated, the model validation system is configured to dynamically determine the validation checks to be performed for the model artifact, where the validation checks include various validation checks to be performed at the model artifact level and also for individual components included in the model artifact. The checks to be performed are dynamically determined based upon the attributes of the model artifact and of the components within the model artifact. The system is configured to generate a validation report that comprises information regarding the checks performed and the results generated from performing the various validation checks. The validation report may also include information suggesting actions for passing checks that result in a failed check, or for improving the scores of certain validation checks.
    Type: Grant
    Filed: October 29, 2021
    Date of Patent: December 19, 2023
    Assignee: Oracle International Corporation
    Inventors: Bryan James Phillippe, Hari Bhaskar Sankaranarayanan, Jean-Rene Gauthier
  • Patent number: 11841787
    Abstract: Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for monitoring technology usage and performance. In some implementations, use of a technology item by one or more individuals assigned to use the technology item is monitored. Based on the monitoring, usage data that indicates usage of the technology item is generated. One or more criteria for evaluating the usage of the technology item by the one or more individuals is identified. It is determined whether usage data satisfies the one or more criteria. A system provides, for display on a user interface, output data indicating whether the usage data satisfies the one or more criteria.
    Type: Grant
    Filed: May 21, 2021
    Date of Patent: December 12, 2023
    Assignee: VigNet Incorporated
    Inventors: Praduman Jain, Josh Schilling, Dave Klein, Mark James Begale
  • Patent number: 11835991
    Abstract: In an embodiment, a method for managing self-tests in an integrated circuit (IC) includes: receiving built-in-self-test (BIST) configuration data; configuring a first clock to a first frequency based on the BIST configuration data; performing a first BIST test at the first frequency; configuring a second clock to a second frequency that is different from the first frequency; and performing a second BIST test at the second frequency.
    Type: Grant
    Filed: March 22, 2021
    Date of Patent: December 5, 2023
    Assignee: STMicroelectronics International N.V.
    Inventors: Amulya Pandey, Balwinder Singh Soni, Amritanshu Anand, Venkata Narayanan Srinivasan
  • Patent number: 11829248
    Abstract: An information handling system includes a memory and a baseboard management controller. The memory includes a recovery partition including a recovery kernel, a first boot partition including first firmware, and a second boot partition including backup firmware. The baseboard management controller (BMC) attempts a first boot operation of the first firmware in the first boot partition. In response to a failure of the first boot operation, the BMC attempts a second boot operation of the backup firmware in the second boot partition. In response to a failure of the second boot operation, the BMC operates a recovery kernel. During the operation of the recovery kernel, the BMC provides a firmware request to an enclosure controller, receives blocks of correct firmware from a functioning baseboard management controller, stores the blocks of correct firmware in the first boot partition, attempts and completes a third boot operation of the correct firmware.
    Type: Grant
    Filed: September 23, 2021
    Date of Patent: November 28, 2023
    Assignee: Dell Products L.P.
    Inventors: Prashanth Giri, Murali Somarouthu, Babu Chandrasekhar
  • Patent number: 11811895
    Abstract: A method of data storage includes determining a latency distance from a primary node to each of two or more replica nodes, choosing a preferred replica node of the two or more replica nodes based on the determined latency distances, and write-caching data into the preferred replica node.
    Type: Grant
    Filed: September 19, 2022
    Date of Patent: November 7, 2023
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Zhengyu Yang, Jiayin Wang, Thomas David Evans
  • Patent number: 11789854
    Abstract: A user interface testing system, method, and device for a vehicle under test (“VUT”). A test system is communicatively coupled to the VUT. A test system records outputs of at least one human-machine-interface (“HMI”) responsive to a first set of test cases and then scores the recorded HMI outputs responsive to the first set of test cases. The test system generates a second set of test cases and scoring criteria for the second set of test cases based on the received first set of test cases and the recorded HMI outputs responsive to the first set of test cases. The test system performs the second set of test cases on the HMI and records HMI outputs responsive to the second set of test cases. The test system assigns scores for the recorded HMI outputs responsive to the second set of test cases using the generated scoring criteria.
    Type: Grant
    Filed: August 18, 2020
    Date of Patent: October 17, 2023
    Assignees: VOLKSWAGEN AKTIENGESELLSCHAFT, AUDI AG, DR. ING. H.C. F. PORSCHE AKTIENGESELLSCHAFT
    Inventor: Benedict A. Recktenwald
  • Patent number: 11789851
    Abstract: The present invention discloses an offline debugging method, comprising: S01: obtaining interfaces which require return values in test flows of the test device; S02: setting the return value corresponding to each of the interfaces which require the return values, adding M debugging strategies and determining a debugging strategy required to be started; S03: compiling a configuration file comprises the M debugging strategies into an executable file required by the target platform; S04: setting up a virtual machine to fit the target platform, and transferring the executable file to the virtual machine; S05: invoking the test flow, returning the return value set by the debugging strategy corresponding to the interface which require the return value and obtaining an debugging result correspondingly. Therefore, the present invention solves a problem that debugging relays on hardware devices in semiconductor automation test, so as to reduce complexity and difficulty of debugging of a test device.
    Type: Grant
    Filed: September 15, 2020
    Date of Patent: October 17, 2023
    Inventor: Jack Hu
  • Patent number: 11782798
    Abstract: A multivariate time series model such as a Vector Auto Regression (VAR) model is built using fabric utilization, disk utilization, and CPU utilization time series data. The VAR model leverages interdependencies between multiple time-dependent variables to predict the start and length of an aperiodic backup time window, and to cause backup operations to occur during the aperiodic backup time window to thereby exploit the aperiodic backup time window for use in connection with backup operations. By automatically starting backup operations during predicted aperiodic backup time windows where the CPU, disk, and fabric utilization values are predicted to be low, it is possible to implement backup operations during time windows where the backup operations are less likely to interfere with primary application workloads, or system application workloads that need to be implemented to maintain optimal operation of the storage system.
    Type: Grant
    Filed: February 11, 2022
    Date of Patent: October 10, 2023
    Assignee: Dell Products, L.P.
    Inventors: Ramesh Doddaiah, Malak Alshawabkeh
  • Patent number: 11748202
    Abstract: One example includes an integrated circuit (IC). The IC includes non-volatile memory and logic. The logic is configured to receive repair code associated with a memory instance and assign a compression parameter to the repair code based on a configuration of the memory instance. The logic is also configured to compress the repair code based on the compression parameter to produce compressed repair code and to provide compressed repair data that includes the compressed repair code and compression control data that identifies the compression parameter. A non-volatile memory controller is coupled between the non-volatile memory and the logic. The non-volatile memory controller is configured to transfer the compressed repair data to and/or from the non-volatile memory.
    Type: Grant
    Filed: September 1, 2022
    Date of Patent: September 5, 2023
    Assignee: Texas Instruments Incorporated
    Inventors: Devanathan Varadarajan, Ramakrishnan Venkatasubramanian, Varun Singh
  • Patent number: 11748243
    Abstract: Systems and methods for performing user interface (UI) test automation may include receiving a document object model (DOM) associated with a web application, the web application having one or more web pages; generating a generic object representation of the web application based on the DOM using a page object model; generating a page object based on the generic page object representation in a first programing language; and storing the page object in the first programming language in a database to be accessed by test scripts associated with a UI test automation of the web application.
    Type: Grant
    Filed: April 27, 2021
    Date of Patent: September 5, 2023
    Assignee: Salesforce, Inc.
    Inventors: Charles Finkelstein, Trevor James Bliss
  • Patent number: 11748209
    Abstract: A system described herein may provide a technique for the remote backup of a User Equipment (“UE”). An initiating device may be registered as being associated with the UE, and may initiate remote backups of the UE, without requiring user interaction at the UE. Different network backup policies may be specified in the request, such as a “Wi-Fi only” network backup request. If the UE is in a “lost” mode, a “damaged” mode, and/or is otherwise unusable or inaccessible, the specified network backup policy may be overridden, to ensure that the UE is backed up and the relevant device data may be recovered.
    Type: Grant
    Filed: February 24, 2022
    Date of Patent: September 5, 2023
    Assignee: Verizon Patent and Licensing Inc.
    Inventors: Alexander Kvache, Nikunj Marvania
  • Patent number: 11734164
    Abstract: A method for testing a, in particular safety-relevant, technical system, in particular encompassing software. The system is represented by a model encompassing at least two or more components. An assumption of a respective component regarding the safety-relevant system, and a guarantee of a respective component to the safety-relevant technical system, are specified by a safety contract. Executable program code is generated based on at least one assumption and based on at least one guarantee. The safety-relevant technical system is tested by executing the program code.
    Type: Grant
    Filed: June 22, 2021
    Date of Patent: August 22, 2023
    Assignee: ROBERT BOSCH GMBH
    Inventors: Arne Nordmann, Peter Munk, Andreas-Juergen Rohatschek, Eike Martin Thaden, Lydia Gauerhof, Markus Schweizer