Abstract: A voltage regulator circuit included in a computer system may generate a voltage level on a power supply signal using a source power supply signal and based initial values of one or more operation parameters derived from wafer-level test data. One or more operation characteristics of the voltage regulator circuit may be sampled, by a measurement circuit, at multiple time points to generated measurement data. A control circuit may adapt operation of the voltage regulator circuit based on the measurement data.

Abstract: Methods, systems, apparatuses, and computer-readable storage mediums described herein are configured to dynamically configure a baseboard management controller to monitor a state of a server. For example, a configuration schema may be provided to the baseboard management controller. The configuration schema specifies each of the devices of the server that is to be monitored by the baseboard management controller. The configuration schema also specifies additional configuration details with respect to each of the devices. Based on the configuration information included in the configuration schema, the baseboard management controller performs a discovery sequence with respect to each of the devices to verify that such devices are communicatively coupled to the baseboard management controller. If the discovery sequence is successful, the baseboard management controller begins monitoring the devices.

Abstract: A processing apparatus is provided which includes memory configured to store hardware parameter settings for each of a plurality of applications. The processing apparatus also includes a processor in communication with the memory configured to store, in the memory, the hardware parameter settings, identify one of the plurality of applications as a currently executing application and control an operation of hardware by tuning a plurality of hardware parameters according to the stored hardware parameter settings for the identified application.

Abstract: A method for managing information handling system includes obtaining, by a zone-leading information handling system of the set of information handling systems, a first hardware resource information entry from a first information handling system in a first zone, obtaining a second hardware resource information entry from a second information handling system in the first zone, performing a stackable system role (SSR) entry analysis based on the first hardware resource information entry and the second hardware resource information entry, determining a set of SSRs, wherein each SSR in the set of SSRs corresponds to each of: the first information handling system, the second information handling system, and the zone-leading information handling system, initiating a SSR distribution of SSR entries based on the set of SSRs.

Abstract: A method to provide flexible access to an internal data of an regulated system, the method comprising receiving, by a data access component of the regulated system, a loadable configuration file defining a set of triggering events and a set of memory, determining the occurrence of a single triggering event, accessing at least a subset of memory that contain the internal data of the avionics system to retrieve data associated with the one or more memory of the set of memory, and outputting the retrieved data to a receiving component.

Abstract: On-chip spread spectrum synchronization between spread spectrum sources is provided. A spread spectrum amplitude of a signal of a spread spectrum reference clock is obtained using one or more delay lines of one or more delay elements in a skitter circuit. A spread width of the spread spectrum amplitude of the signal is determined, using one or more sticky latches in the skitter circuit, based on one or more edges of the signal. A delay line of the one or more delay elements corresponding to a falling edge of the spread width of the signal is identified using combinational circuitry of the skitter circuit. A spread spectrum signal of a spread spectrum slave clock is synchronized with the signal of the spread spectrum reference clock based on the delay line.

Abstract: A method and apparatus for synchronizing a timebase is disclosed. A timebase management circuit includes limit circuitry, in a first clock domain, which generates, based on a global timebase, an initial timebase limit. The timebase management circuit includes, in a second clock domain, adjustment circuitry that generates an adjusted timebase limit based on the initial timebase limit. A storage circuit in the second clock domain stores a local timebase. Update circuitry, coupled to an output of the storage circuit, generates an updated local timebase using a clock signal in the second clock domain, wherein the updated local timebase is subject to the adjusted timebase limit.

Abstract: The present invention provides a hardware setting device and hardware setting method thereof. The hardware setting device is configured to: boot an operating system; retrieve at least one hardware setting corresponding to a peripheral device from a pre-boot memory; and configure the peripheral device according to the at least one hardware setting.

Abstract: Power management includes receiving power supply unit (PSU) power capacity data and PSU power consumption data from each PSU in a set of PSUs. A priority table is updated with controlled device power consumption data received from a set of controlled devices. If the PSU power consumption data of any PSU exceeds an associated threshold calculated based on the PSU power capacity data for the PSU, then one or more controlled devices are selected based on the controlled device power consumption data in the priority table. When power consumption data of any PSU exceeds the associated threshold, a power response procedure powers off at least one of the selected one or more controlled devices, reduces power supplied to at least one of the selected one or more controlled devices, or reduces an output voltage of any of the PSU for which the PSU power consumption data exceeds the associated threshold.

Abstract: A power management approach for a mobile device includes comparing a battery provided power supply voltage to a reference voltage in order to generate an alarm signal. In response to the alarm signal the frequency of an operating clock applied to a system-on-chip is changed.

Abstract: Systems, devices, and methods discussed herein are directed to modifying aspects of a compute instance. A user may request a change to the compute instance. The system may derive a state object indicating a future state of the compute instance were the change to be applied. A hash of a subset of the state object's attributes may be computed and provided to the requesting computing component. The system may subsequently proceed with applying the change. A current state object indicating a current state of the compute instance may be derived based on applying the change. An additional hash of the subset of the current state object's attributes may be computed and provided to the requesting computing component. The two hashes may be configured to enable the requesting computing component to verify the change to the compute instance has been implemented.

Abstract: A processing unit includes a plurality of components configured to execute instructions and a controller. The controller is configured to determine a power consumption of the processing unit, determine a waiting status of the processing unit based on waiting statuses of components, and selectively modify an operating state of the processing unit based on the waiting status and the power consumption of the processing unit. In some cases, the operating state is modified in response to a percentage of the components that are waiting for an action to complete being below a threshold percentage and the power consumption of the processing unit being below a power limit. In some cases, the controller identifies a pattern in the power consumption by the processing unit and modifies the operating state of the processing unit to increase the power consumption of the processing unit based on the pattern identified by the controller.

Abstract: Examples of computing devices for cutting-off power supply of an electronic device in a standby mode are described herein. In an example, a computing device may include a battery and an embedded controller. The embedded controller may determine a charge stored in the battery at a time interval when the computing device is in a standby mode. Upon determining that the charge stored in the battery is below by a threshold value, the embedded controller may retrieve activity data from a memory of the computing device. The activity data may include a list of electronic devices that draw power from the battery of the computing device. The embedded controller may cut-off power supply of an active electronic device from the list of electronic devices.

Abstract: In some examples, an electronic device includes a display panel comprising a plurality of pixels; and a controller to select a theme from a plurality of themes that specify respective different display characteristics of displayed content, and based on the selected theme, change a display resolution of the displayed content.

Abstract: Disclosed herein is a dynamic backup battery for updating the firmware of a media device. The media device includes a memory device that is electrically coupled to a port. The port of the media device is configured to receive a first power. The media device also includes a battery that is electrically coupled to the port and is configured to supply a second power to the port. The media device includes a processor electrically coupled to the battery and is configured to monitor the power level of the first power received and based on the power level of the first power received falling below a threshold value, the battery supplies a second power to the port of the media device. The processor is further configured to activate a low power mode, detect an event while in low power mode, deactivate low power mode, perform a task, and reactivate low power mode.

Abstract: Method and apparatus for synchronizing and locking clocks identifies entangled pairs of photons by comparing a first and second list of measured state values of single photons, wherein the first list is compiled by photon arrival times measured using a first clock and the second list is compiled by photon arrival times measured using a second clock. Entangled pairs of photons are identified by a match of the measured state values of single photons in their respective lists. Elapsed times of the first and second clocks are determined by taking the difference between arrival times of respective identified entangled pairs of photons measured using their respective clocks. A rate of one of the first and second clocks is changed based on a difference between the elapsed times, thereby synchronizing the first and second clocks. Clocks are locked by repeating.

Abstract: Systems and methods for maintaining knowledge of a network address (e.g., a MAC address) for a playback device while changing power states are disclosed. In one embodiment, a method for maintaining knowledge of the network identity of a playback device while changing power states includes determining that a playback device is entering a sleep state, sending state information from the playback device to a central data repository over a network responsive to the determination that the playback device is entering sleep state, where state information includes a MAC address, receiving the state information about the playback device at a waking device from the central data repository, waking the playback device periodically at predetermined time intervals while in sleep state to listen for messages addressed to the MAC address, and receiving a wake-up message at the playback device from the waking device and responding by changing from sleep to active state.

Abstract: A method of generating a verification code includes generating a plurality of first photons and a plurality of second photons that are entangled in a first basis, which is time, and entangled in a second basis comprising a first and second state. The plurality of first photons are provided to a first device where the arrival time and an associated first or second state of the plurality of first photons are measured. An ordered list of the measured time of arrival of the plurality of first photons are generated at the first device. The plurality of second photons are provided to a second device. A time of arrival and an associated first or second state of the plurality of second photons are measured at the second device. An ordered list of the measured time of arrival of the plurality of second photons are generated at the second device.

Abstract: An application management apparatus (103) acquires a use application program from a storage region when either one of an information processing apparatus (1)(101) and an information processing apparatus (2)(102) starts a startup process, the use application program being an application program to be used by a user of a start-up information processing apparatus being the information processing apparatus which starts the startup process. The application management apparatus (103) transmits the acquired use application program to the start-up information processing apparatus. Each of the information processing apparatus (1)(101) and the information processing apparatus (2)(102) receives the us application program which is transmitted from the application management apparatus (103), and start the received use application program and complete the startup process.

Abstract: An electronic device comprises a first processor, a second processor and a communication interface. The first processor operates according to a first clock, and comprises a first time-stamp counter to count the first clock to obtain a first count value. The second processor operates according to a second clock, and comprises a second time-stamp counter to count the second clock to obtain a second count value. The communication interface is coupled between the first processor and the second processor. The first processor periodically sends the first count value to the second processor through the communication interface. When the second processor receives the first count value, the second processor adds a preset deviation value to the first count value to obtain a synchronization value, resets the second count value, and the sum of the synchronization value and the second count value is read by the second processor.