Abstract: An improved PWM amplifier is disclosed that uses multiple integrators in the loop filter to provide high loop gain across the frequency band-of-interest. The frequency characteristics of the loop filter are optimized to distribute large loop gains across the entire band to provide large suppression of noise and distortions generated in the modulation and output stages.

Abstract: A constant current bias approach that receives an input bias voltage and maintains a temperature independent constant current bias in a linear amplifier device. Integrated sense circuitry protects against unacceptable input voltages to guarantee bias stability. Fabrication in multiple semiconductor technologies and assembly into a single package allows for optimum cost and performance of DC bias and RF amplifier sections.

Abstract: An improved PWM amplifier is disclosed that uses multiple integrators in the loop filter to provide high loop gain across the frequency band-of-interest. The frequency characteristics of the loop filter are optimized to distribute large loop gains across the entire band to provide large suppression of noise and distortions generated in the modulation and output stages.

Abstract: An improved PWM amplifier is disclosed that uses multiple integrators in the loop filter to provide high loop gain across the frequency band-of-interest. The frequency characteristics of the loop filter are optimized to distribute large loop gains across the entire band to provide large suppression of noise and distortions generated in the modulation and output stages.

Abstract: A variable attenuation system includes a steering core that continuously steers a signal to an attenuator having multiple inputs. An embodiment having an attenuator constructed from discrete components continuously interpolates a signal between the individual inputs of the attenuator. Continuous interpolation between discrete inputs can also be used with attenuators having continuous structures. A fully integrated embodiment achieves continuous input steering by moving a carrier domain along a continuous attenuator. A separate output stage utilizes adaptive biasing to reduce unnecessary current consumption.

Abstract: Methods and systems for vector combining power amplification are disclosed herein. In one embodiment, a plurality of signals are individually amplified, then summed to form a desired time-varying complex envelope signal. Phase and/or frequency characteristics of one or more of the signals are controlled to provide the desired phase, frequency, and/or amplitude characteristics of the desired time-varying complex envelope signal. In another embodiment, a time-varying complex envelope signal is decomposed into a plurality of constant envelope constituent signals. The constituent signals are amplified equally or substantially equally, and then summed to construct an amplified version of the original time-varying envelope signal. Embodiments also perform frequency up-conversion.

Abstract: A class AD audio amplifier system (10) with reduced noise capability in muting and unmuting events is disclosed. The amplifier system (10) includes multiple audio channels (20), each of which can be constructed to include a pulse-width-modulator (PWM) (24). The PWM modulator (24) includes a pair of comparators (39A, 39B; 52+, 52?) that generate complementary PWM output signals based upon the comparison between a filtered difference signal and a reference waveform. When the system is muted, a common mode voltage (CM_RAMP) is applied to the inputs of the comparators (39A, 39B; 52+ 52?) to suppress the duty cycle at the amplifier output, preferably to a zero duty cycle. In the transition from a muted state to an unmuted state, the common mode voltage (CM_RAMP) is ramped from the suppressing voltage to zero common mode voltage, permitting the duty cycle of the complementary PWM signals to gradually increase, thus reducing clicks and pops.

Abstract: A current-saving differential wideband driver circuit comprises a differential input amplifier for amplifying a differential input signal to produce a differential intermediate signal being comprised of a first intermediate signal and a second intermediate signal, a first transimpedance amplifier comprising a first inverting input, a first non-inverting input, and a first output, and a second transimpedance amplifier comprising a second inverting input, a second non-inverting input, and a second output. The first intermediate signal is applied to the first non-inverting input, the first output is connected to the first inverting input of the first transimpedance amplifier via a first feedback resistor for negative current feedback, the second intermediate signal is applied to the second non-inverting input, and the second output is connected to the second inverting input of the second transimpedance amplifier via a second feedback resistor for negative current feedback.

Abstract: A pre-distorter that compensates for amplitude and phase distortion created by an amplifier. During a training session, the amplifier is stimulated with input signals of pre-selected amplitude and phase at various temperatures and the amplifier output is captured and converted into data sets. Polynomials are then fitted to the data sets and inverses of the polynomials are determined. The coefficients of the inverse polynomials are then saved for each temperature. During operation, the amplifier temperature is predicted based on the amplifier input signal and the coefficients associated with the predicted temperature are selected to be applied to the input signal to compensate for amplitude and phase distortion caused by the amplifier.

Abstract: A variable gain amplifier of such configuration that can yield continuously and log-linearly variable gains in relation to control voltage and, at the same time, that does not use an attenuator, an element which otherwise would entail cause of increased noise. The amplifier includes a plurality of gm amplifiers connected in parallel with input signal, exponential multipliers connected respectively to the gm amplifiers, a control section to vary the multiplication coefficient of the exponential multipliers according to the external gain control signal, and an I-V converter circuit to aggregate current output after multiplication and convert the aggregated current output to voltage. A continuously variable gain characteristic can be obtained without the use of an attenuator but by varying multiplication coefficient according to control voltage.

Abstract: A feedback circuit disposed across input and output terminals of an amplifier is adapted so as not inject DC current back into the input terminal of the amplifier. The feedback circuit includes, in part, first and second current sources, a transistor, and a resistive load. The first current source supplies current to one of the terminals of the transistor in communication with an input terminal of the amplifier. The second current source receives this current and diverts it to a voltage supply. The transistor is maintained in the active region of operation. The resistive load has a first terminal in communication with an output terminal of the amplifier and a second terminal in communication with the transistor. The DC voltages at the two terminals of the resistive load are substantially equal so as to inhibit DC current flow therethrough.

Abstract: Embodiments of the present invention include circuits and methods with wide bandwidths. In one embodiment, parasitic capacitances of the output of a first stage and the input of a second stage are included in a network. The output of the first stage is coupled to the input of the network, and the input of the second stage is coupled to an intermediate node of the network. In one embodiment, the parasitic capacitance of the second stage is the largest capacitance in the network.

Abstract: A small-sized on-chip complementary metal-oxide semiconductor (CMOS) Power Amplifier having improved efficiency is provided herein. The on-chip CMOS power amplifier is capable of improving efficiency and maximizing output thereof by enhancing a K factor, which may cause a problem in a power amplifier having a distributed active transformer structure. The on-chip CMOS power amplifier having an improved efficiency and being fabricated in a small size, the on-chip CMOS power amplifier includes a primary winding located at a first layer, secondary windings located at a second layer, which is an upper part of the first layer, the secondary windings being located corresponding to a position of the primary winding, and a cross section for coupling the second windings with each other.

Abstract: A power transistor, having: a semiconductor having an electrode formed thereon, wherein the electrode comprises a plurality of interdigitated transistors each having input and output terminals; a first output blocking capacitor having a first terminal electrically coupled to the output terminals of the interdigitated transistors of the semiconductor and a second terminal electrically coupled to ground; and a second output blocking capacitor having a first terminal electrically coupled to the first terminal of the first output blocking capacitor and a second terminal electrically coupled to ground.

Abstract: A method of filtering a differential signal. The method includes receiving the differential signal. Transitions of the differential signal are accelerated after the differential signal has passed through a cross-over point to create an accelerated differential signal. A delayed differential signal is created that is a delayed version of the accelerated differential signal delayed by a predetermined amount of time with respect to the accelerated differential signal. The accelerated differential signal is amplified to create an amplified accelerated differential signal. The delayed differential signal is amplified to create an amplified delayed differential signal. The amplified delayed differential signal and the amplified accelerated differential signal are combined to create an output signal.

Abstract: A low voltage, high bandwidth, enhanced transconductance, source follower circuit constructed from MOS FET devices, which operates in a class AB mode. The drain current of the source follower is sensed with a folded cascode device. The sensed current is multiplied by a common source device of same type (NMOS or PMOS) as the source follower, and directed to the output load. Over limit current load at the source follower drain is sensed by a common source device of the opposite type (NMOS or PMOS), which also supplies the necessary extra current to the output load. This allows the device to supply significantly more than the quiescent current in both sourcing and sinking the output. Average power consumption for driving a given load is significantly reduced, while maintaining the large bandwidth of traditional source follower designs, and the capability for use in either voltage regulators or in a current conveyor.

Abstract: In a base-bias-control-type high-frequency power amplifier with a plural stage configuration, a rising voltage of a base bias current supplied to an initial stage transistor is made lower than a rising voltage of a base bias current supplied to a second stage transistor by a bias circuit, and a difference between the both voltages is set to be smaller than a base-emitter voltage of an amplifying stage transistor. Also, a rising voltage of a base bias current supplied to a third stage transistor is made equal to the rising voltage of the base bias current supplied to an initial stage transistor. Accordingly, a technology capable of improving the power control linearity can be provided in a high-frequency power amplifier used in a polar-loop transmitter or the like.

Abstract: An amplifier for amplifying a signal which is applied to a signal input having a first pair of transistors (10), which is connected to the signal input and which contains two transistors (10-1, 10-2), currents flowing through the two transistors (10-1, 10-2) which have a specific operating current ratio (m) in relation to one another, a second pair of transistors (4), which is connected to the first pair of transistors (10) and which contains two transistors (4-1, 4-2), currents flowing through the two transistors (4-1, 4-2) which have the same operating current ratio (m) in relation to one another, and a signal output (3) of the amplifier (1) being provided between the first pair of transistors (10) and the second pair of transistors (4).

Abstract: A differential amplification circuit includes a differential amplifier and common mode control circuitry configured to control output common mode of the differential amplifier. However, this control circuitry does not use feedback. The circuitry controls the output common mode in either, or in a combination of two ways, neither of which employs feedback from the output common mode. One control technique uses a dummy circuit and comparator to cancel out the effect of variations in process, temperature and supply voltage on output common mode. Another control technique measures input common mode voltage, compares the measured common mode to a reference, and based on the difference, applies a current to the output that compensates for the variation in output common mode that a given input common mode would otherwise cause.

Abstract: A power amplifier circuit amplifying an input signal to an output signal and a method thereof. The power amplifier circuit comprises a ramp controller, a current source, and a first amplification stage. The ramp controller receives an enable signal to generate a ramp signal. The current source is coupled to the ramp controller, produces a ramp current by the ramp signal. The first amplification stage is coupled to the current source, comprises a first supply voltage input coupled to a fixed supply voltage, and is biased by the ramp current to amplify the input signal such that an envelope of the output signal is a ramp.