Patents Examined by Khiem Nguyen
  • Patent number: 9990320
    Abstract: A plug connector includes an insulating body defining a mating cavity opening forwardly and a cable-load portion, a row of upper terminals, a row of lower terminals and a special terminal. The special terminal includes a contacting piece and a soldering piece discrete from each other. The contacting piece unitarily includes a contacting portion located at the upper inside of the mating cavity and an upper connecting portion, and the soldering piece unitarily includes a soldering leg exposed upon the lower loading face of the cable-loading portion and a lower connecting portion extending forward from the soldering leg. The upper connecting portion and the lower connecting portion electrically connect to each other so as to establish an electrical connection of the special terminal.
    Type: Grant
    Filed: August 21, 2017
    Date of Patent: June 5, 2018
    Assignee: FOXCONN INTERCONNECT TECHNOLOGY LIMITED
    Inventors: Chih-Pi Cheng, Wen He, Quan Wang, Feng Zeng, Fu-You Yang
  • Patent number: 9985367
    Abstract: A cable bypass assembly is disclosed for use in providing a high frequency transmission line that connect a chip package on a circuit board to connector spaced apart from the chip package. The bypass cable assembly has a structure that allows for low loss between the chip package and the connector. Multiple cables can be used to provide a number of differentially coupled channels.
    Type: Grant
    Filed: August 11, 2017
    Date of Patent: May 29, 2018
    Assignee: Molex, LLC
    Inventors: Christopher D. Wanha, Brian Keith Lloyd, Ebrahim Abunasrah, Rehan Khan, Javier Resendez, Michael Rost
  • Patent number: 9985589
    Abstract: A voltage-to-current converter includes a first differential pair of transistors, a second differential pair of transistors, and a first resistor. The first differential pair of transistors includes a first transistor and a second transistor. An emitter of the first transistor is directly connected to an emitter of the second transistor. The second differential pair of transistors includes a third transistor and a fourth transistor. An emitter of the third transistor is directly connected to an emitter of the fourth transistor. The first resistor is connected to the emitter of the first transistor, the emitter of the second transistor, the emitter of the third transistor, and the emitter of the fourth transistor.
    Type: Grant
    Filed: August 19, 2016
    Date of Patent: May 29, 2018
    Assignee: Texas Instruments Incorporated
    Inventors: Srinivas K. Pulijala, Steven G. Brantley, Bharath K. Vasan
  • Patent number: 9979144
    Abstract: A connector-and-cable assembly, including an electronic connector, such as a HDMI connector, having an outlet section and a multiplicity of elastic conductive stripes. Each of the elastic conductive stripes is conductively connected, at a first end, to a respective preconfigured outlet pin of the electronic connector. The second end of each of the elastic conductive stripes is preconfigured to operatively attach to a respective sensor, such as a textile electrode of a smart garment. Typically, at least one of the elastic conductive stripes is a textile based conductive stripe.
    Type: Grant
    Filed: April 16, 2015
    Date of Patent: May 22, 2018
    Assignee: HEALTHWATCH LTD.
    Inventors: Uri Amir, Boaz Shoshani
  • Patent number: 9979120
    Abstract: A connector includes a connector housing 10 provided with cavities 13 for accommodating terminal fittings and connectable to a mating connector, a cover 50 configured to cover wires pulled out from the connector housing 10 by being mounted on a cover mounting surface 10A side of the connector housing 10 opposite to a connection surface, locking pieces 55 deflectably provided on both side surfaces of the cover 50 and configured to lock the cover 50 to the connector housing 10 by projecting toward the connector housing 10, and protection walls 37 provided on the connector housing 10, the other locking piece 55 coming into contact with the protection wall 37 when being pushed in an unlocking direction when one of the locking pieces 55 is unlocked and the cover 50 is inclined with respect to the connector housing 10.
    Type: Grant
    Filed: December 24, 2015
    Date of Patent: May 22, 2018
    Assignee: Sumitomo Wiring Systems, Ltd.
    Inventor: Mizuho Fujimura
  • Patent number: 9979098
    Abstract: An electrical connector used to make electrical connection to a heating system or to an antenna system on a glazing comprises a substantially planar foot, suitable for soldering, an angled portion, permanently connected to the foot and substantially at right angles to the plane of the foot and a holding portion, connected to the angled portion and suitable for holding a cable, wherein the foot has a substantially circular or oval shape. A glazing comprising such an electrical connector further comprises a sheet of glazing material, an electrical conductor on a surface of the sheet of glazing material and a solder layer between the electrical conductor and the foot wherein the solder layer comprises lead-free solder. The angled portion may be a male portion of a button connector, also known as a snap connector. The holding portion may be a washer soldered or welded to the angled portion.
    Type: Grant
    Filed: September 19, 2014
    Date of Patent: May 22, 2018
    Assignee: PILKINGTON GROUP LIMITED
    Inventors: Michael Lyon, Julie Houghton
  • Patent number: 9973145
    Abstract: An envelope tracking amplifier having stacked transistors is presented. The envelope tracking amplifier uses dynamic bias voltages at one or more gates of the stacked transistors in addition to a dynamic bias voltage at a drain of a transistor.
    Type: Grant
    Filed: December 3, 2015
    Date of Patent: May 15, 2018
    Assignee: pSemi Corporation
    Inventors: Dan William Nobbe, Jeffrey A. Dykstra, Chris Olson, James S. Cable
  • Patent number: 9973165
    Abstract: A driver that drives an optical device, such as laser diode (LD) and/or optical modulator, is disclosed. The driver includes a variable gain amplifier (VGA) and a post amplifier. The post amplifier amplifies an output of the VGA to a preset amplifier as varying the gain of the VGA. The VGA includes two differential pairs each amplify the input signal oppositely in phases thereof and outputs of the differential pairs are compositely provided to the post amplifier. The gain of the VGA is varied by adjusting contribution of the second differential pair to the output of the VGA.
    Type: Grant
    Filed: October 19, 2016
    Date of Patent: May 15, 2018
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Keiji Tanaka
  • Patent number: 9973152
    Abstract: One example includes an amplifier system. The system includes a gain stage configured to conduct a gain current in response to an input voltage. The system also includes a current limit stage coupled to the gain stage and being configured to one of source and sink the gain current and to define a limit amplitude of the gain current during a current limit condition. The system further includes an output stage coupled to the gain stage and configured to conduct an output current through an output node in response to the gain current, the output current having a maximum amplitude during the current limit condition that is proportional to the limit amplitude.
    Type: Grant
    Filed: November 14, 2016
    Date of Patent: May 15, 2018
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Daijiro Otani, Keita Ikai
  • Patent number: 9966902
    Abstract: An apparatus includes a Doherty PA having an input, an output manifold, and peaking and main amplifier paths. The peaking amplifier path includes peaking amplifier(s) configured to amplify signals over multiple frequency bands. A main amplifier path is separate from the peaking amplifier path until the main amplifier path terminates in the output manifold. The main amplifier path includes main amplifier(s), configured to amplify signals over the multiple frequency bands, and a multiple-band matching network coupled to the output of the main amplifier(s) and terminating in the output manifold. The multiple-band matching network includes multiple signal paths, one for each of the multiple frequency bands. Each signal path includes circuitry configured to pass signals to the output manifold from only a unique one of the multiple frequency bands and to reject signals from others of the multiple frequency bands. The circuitry for each signal path includes a resonant tank.
    Type: Grant
    Filed: September 29, 2016
    Date of Patent: May 8, 2018
    Assignee: Nokia Solutions and Networks Oy
    Inventor: Chia Sam Wey
  • Patent number: 9966714
    Abstract: A system including a support structure, a plurality of terminal bases mounted to the support structure, a plurality of migration adapters, each migration adapter mounted to a respective terminal base and having first and second adapter connector structures and including first and second backplane connectors for mating with corresponding backplane connectors of one or more adjacent migration adapters mounted to respective adjacent terminal bases for forming a backplane electrically coupling the plurality of migration adapters, and a plurality of I/O modules mounted to the plurality of migration adapters.
    Type: Grant
    Filed: July 5, 2017
    Date of Patent: May 8, 2018
    Assignee: Rockwell Automation Asia Pacific Business Ctr. Pte., Ltd.
    Inventors: Rosh Chathoth Sreedharan, Srinivasan Melkote, Siva Iyyamperumal, Rajiv Chakraborty, Soon Seng Kang
  • Patent number: 9966913
    Abstract: A Programmable-Gain Amplifier (PGA) has programming steps that are linear when expressed in Decibels (linear-in-dB). A Recursive Current Division (RCD) resistor network generates currents that are selected by programmable switches to connect to a summing node input of an amplifier. A feedback resistor is connected across the summing node and the amplifier output. The resistor network has only three resistance values regardless of the number of currents selectable as programming steps. The value of a third resistor is set equal to the equivalent resistance of a second resistor in parallel with a series connection of a first resistor and the third resistors. Each final cell in the resistor network is equivalent to the third resistor, allowing recursive division of adjacent currents. The ratio of adjacent currents remains constant for all cells. Recursive Current Division (RCD) produces linear-in-dB programming steps. Floating switches are avoided since switches connect to ground.
    Type: Grant
    Filed: August 24, 2016
    Date of Patent: May 8, 2018
    Assignee: Hong Kong Applied Science and Technology Research Institute Company, Limited
    Inventors: Chi Hong Chan, Bun Go Yau, Gordon Chung
  • Patent number: 9960522
    Abstract: A connector includes a first insulator, contacts joined to the first insulator, a contact insulator integrally holding the contacts in a vicinity of rear end portions thereof, a ground plate which extends along the contacts, a metal peripheral shell placed over the first insulator so as to surround a periphery of front end portions of the contacts and a front end portion of the ground plate and electrically connected to the ground plate, and a second insulator that is formed so as to cover a rear part of the first insulator, a rear part of the peripheral shell, central parts of the contacts and a central part of the ground plate, with the rear end portions of the contacts, the contact insulator and a rear end portion of the ground plate being exposed.
    Type: Grant
    Filed: August 16, 2017
    Date of Patent: May 1, 2018
    Assignee: Japan Aviation Electronics Industry, Limited
    Inventors: Takashi Tada, Katsumi Arai, Toshiyuki Shimoda
  • Patent number: 9958174
    Abstract: A HVAC unit manufacturing method and a HVAC system are disclosed herein. In one embodiment, the HVAC system includes: a controller having control board terminals, a parallel wiring harness having a first and a second connection header, the first connection header coupled to the control board terminals, and a switch having terminals. The terminals of the switch including: a pair of functional terminals configured to indicate a status of the switch and a pair of jumpered terminals independent of the pair of functional terminals and internally connected together within the switch, wherein designated combinations of the terminals indicate a circuit configuration for employing the switch in the HVAC system with each of the terminals having a particular design that dictates a specific corresponding connection header be used for each of the designated combinations, wherein a single one of the designated combinations of the terminals corresponds to the second connection header.
    Type: Grant
    Filed: November 1, 2016
    Date of Patent: May 1, 2018
    Assignee: Lennox Industries Inc.
    Inventor: Randall L. Lisbona
  • Patent number: 9960554
    Abstract: In various implementations, a raceway system may provide power and/or data connectivity to one or more locations. The raceway system may include modular receptacles. The modular receptacles may include power sockets and/or modular communication sockets. In some implementations, the raceway may be coupled to a floor of a structure and provide connectivity to one or more locations proximate the raceway.
    Type: Grant
    Filed: March 13, 2014
    Date of Patent: May 1, 2018
    Inventor: Clinton Strong
  • Patent number: 9960740
    Abstract: A circuit having an amplifier, comprising: a depletion mode transistor having a source electrode coupled to a reference potential; a drain electrode coupled to a potential more positive than the reference potential; and a gate electrode for coupling to an input signal. The circuit includes a bias circuit, comprising: a current source; and biasing circuitry coupled to the current source and between the potential more positive than the reference potential and a potential more negative than the reference potential. A control circuit is connected to the current source for controlling the amount of current produced by the current source to the biasing circuitry.
    Type: Grant
    Filed: June 7, 2016
    Date of Patent: May 1, 2018
    Assignee: Raytheon Company
    Inventors: John P. Bettencourt, Alan J. Bielunis, Istvan Rodriguez, Zhaoyang C. Wang
  • Patent number: 9954318
    Abstract: Combined connector receptacles that provide isolation between individual connector receptacles and have structures arranged to reduce or eliminate damage to through-hole contact portions during insertion of the combined connector into a board.
    Type: Grant
    Filed: September 3, 2015
    Date of Patent: April 24, 2018
    Assignee: APPLE INC.
    Inventors: Jae Hwang Lee, James M. Jeon, Mahmoud R. Amini
  • Patent number: 9948033
    Abstract: A patch panel structure includes a first jack row including a plurality of first network ports each having RJ-45 jack ends aligned in a first direction and arranged in a first row; a second jack row including a plurality of second network ports each having RJ-45 jack ends aligned in a second direction and arranged in a second row, wherein the first jack row and the second jack row are parallel, whereas the first direction and the second direction are opposite. Minimal alien crosstalk occurs between the network ports of the patch panel structure, thereby meeting strict transmission standards.
    Type: Grant
    Filed: July 5, 2017
    Date of Patent: April 17, 2018
    Assignee: HSING CHAU INDUSTRIAL CO., LTD.
    Inventor: Kei-Wei Wu
  • Patent number: 9941852
    Abstract: A semiconductor device includes an operational transconductance amplifier (OTA) with a matched pair of transistors including a first transistor and a second transistor, and configuration units that include a first set of switches, a second set of switches, and an input transistor. Gain adjustment circuitry is coupled to adjust gain of the OTA. Measurement circuitry is coupled to measure offset in the OTA. Control logic is configured to operate the first and second sets of switches to couple input transistors of a first group of the configuration units to the first transistor of the matched pair of transistors, and to couple input transistors of a remaining group of the configuration units to the second transistor of the matched pair of transistors. Settings of the first and second sets of switches are selected to minimize the offset.
    Type: Grant
    Filed: September 28, 2016
    Date of Patent: April 10, 2018
    Assignee: NXP USA, Inc.
    Inventor: Firas N. Abughazaleh
  • Patent number: 9941843
    Abstract: An envelope tracking amplifier having stacked transistors is presented. The envelope tracking amplifier uses dynamic bias voltages at one or more gates of the stacked transistors in addition to a dynamic bias voltage at a drain of a transistor.
    Type: Grant
    Filed: February 10, 2016
    Date of Patent: April 10, 2018
    Assignee: pSemi Corporation
    Inventors: Dan William Nobbe, Jeffrey A. Dykstra, Chris Olson, James S. Cable