Patents Examined by Kyle J. Choi
  • Patent number: 6304853
    Abstract: An automated gemstone evaluation system for producing a gemstone evaluation report and method for doing the same. The automated gemstone evaluation system receives gemstone data unique to the gemstone being evaluated from the user via an input device, like a keyboard for a computer. The automated gemstone evaluation system further includes a processor, which determines a pricing estimate and generates an evaluation report. The evaluation report is communicated to the user via an output device, and preferably includes a summary description of the qualities of the gemstone. The system and method further allow for the input to be received from a user located remotely and for the output to be returned to the remotely located user.
    Type: Grant
    Filed: September 21, 1998
    Date of Patent: October 16, 2001
    Inventor: Peter J. Malnekoff
  • Patent number: 6304838
    Abstract: The present invention includes methods of increasing the power handling capability of a power line. One method of the present invention includes providing a conductor configured to transmit energy intermediate plural locations; supporting the conductor at a plurality of positions intermediate the locations, the supporting at a plurality of positions defining a plurality of spans of the conductor; creating a model of the conductor; identifying a critical span; altering the modelled conductor responsive to the identifying; and analyzing the modelled an conductor following the altering.
    Type: Grant
    Filed: January 27, 1998
    Date of Patent: October 16, 2001
    Assignee: LineSoft Corporation
    Inventor: Fred A. Brown
  • Patent number: 6285969
    Abstract: The single scatter Monte Carlo code CREEP models precise microscopic interactions of electrons with matter to enhance physical understanding of radiation sciences. It is designed to simulate electrons in any medium, including materials important for biological studies. It simulates each interaction individually by sampling from a library which contains accurate information over a broad range of energies.
    Type: Grant
    Filed: May 22, 1998
    Date of Patent: September 4, 2001
    Assignee: The Regents of the University of California
    Inventor: Michelle M. Svatos
  • Patent number: 6282502
    Abstract: A method of producing uniform motion, vibration-free spur gears useful in rotary processes includes determining gearmesh frequency and its (m) multiples and comparing each to a corresponding (k) multiple of the process frequency. Gear designs with non-matching (m) and (k) multiples are selectable for analysis as to load bearing capability and conformance with predetermined contact ratios.
    Type: Grant
    Filed: March 31, 1998
    Date of Patent: August 28, 2001
    Assignee: Eastman Kodak Company
    Inventors: Sivakumar Sundaresan, Todd C. Rose
  • Patent number: 6278964
    Abstract: An approach for simulating hot carrier effects in an integrated circuit (IC) at the circuit level includes generating a hot carrier library of delay data for each cell in the IC, using the hot carrier library data to generate a set of scaled timing data for the IC and using the scaled timing data with a IC performance simulator to simulate the IC operation. The scaled timing data is based upon the cell delay data and time-based switching activity of each cell in the IC.
    Type: Grant
    Filed: May 29, 1998
    Date of Patent: August 21, 2001
    Assignees: Matsushita Electric Industrial Co., Ltd., BTA Technology Inc.
    Inventors: Jingkun Fang, Hirokazu Yonezawa, Lifeng Wu, Yoshiyuki Kawakami, Nobufusa Iwanishi, Alvin I-Hsien Chen, Norio Koike, Ping Chen, Chune-Sin Yeh, Zhihong Liu
  • Patent number: 6236955
    Abstract: A management training simulation system and method are disclosed. A method in accordance with one aspect of the invention is implemented on a computer and develops the decision-making skills of a user in a defined, simulated situation which includes one or more firms controlled by participants in the simulation which cause particular object designs to be injected into the simulation. Each object design is defined through an attribute-characteristic representation. A multipeaked value function is used to process the designs throughout the simulation instead of a distance-value function as in conventional simulations. The participant is selectively provided with information about at least some of the objects in the simulation, preferably at a cost, as well as a valuation of those objects and is also apprized of the current state of his or her firm. The participant digests this information and creates revised object designs which are sent to the simulation and processed using the multipeaked value function.
    Type: Grant
    Filed: July 30, 1999
    Date of Patent: May 22, 2001
    Inventor: Gary J. Summers
  • Patent number: 6230115
    Abstract: A simulator includes a timing simulation section executing timing simulation for a logic circuit of an electronic component, a time management section extracting logical operation time at an output terminal of the electronic component from a result of the simulation, a transmission line simulation section executing simulation of a transmission line connected to the output terminal from the logical operation time extracted by the time management section, and a simulation result processing section combining the result of the simulation by the timing simulation section and a result of the transmission line simulation by the transmission line simulation section.
    Type: Grant
    Filed: December 15, 1998
    Date of Patent: May 8, 2001
    Assignees: Mitsubishi Denki Kabushiki Kaisha, Mitsubishi Electric System LSI Design Corporation
    Inventors: Hidefumi Ohsaki, Yoshiki Nakamura, Yoshifumi Sasaki, Tomoo Ishida, Yasunori Shibayama
  • Patent number: 6230113
    Abstract: A method for verifying the design of piezoelectric devices includes expressing attributes of such piezoelectric device or subsystem thereof in terms of an elastic property or properties of a different subsystem or device component of the piezoelectric device. Such piezoelectric device may include a layer of piezoelectric material and one or more electrodes affixed to one or more faces of such layer. Computational complexity of models of the design are reduced by modeling displacement of the electrodes as being equal to displacement of the layer of piezoelectric material during operation of such piezoelectric device. Further reduction in computational complexity is achieved by modeling electrode displacement as being uniform within each electrode. Stress in the piezoelectric device or subsystem thereof is expressed in terms of elastic properties of a different subsystem of the piezoelectric device.
    Type: Grant
    Filed: December 16, 1998
    Date of Patent: May 8, 2001
    Assignee: Seiko Epson Corporation
    Inventors: Ji Wang, Yook-Kong Yong, Tsutomu Imai
  • Patent number: 6226603
    Abstract: A computer-based method for the identification of binding targets in proteins and other macromolecules. More particularly, the invention includes an algorithm aimed at predicting binding targets in proteins. This algorithm, named Woolford, requires knowledge of the high resolution structure of the protein but no knowledge of the location or identity of natural binding sites or ligands. Binding targets in the protein are identified and classified according to their expected optimal affinities. Binding targets can be located at the protein surface or at internal surfaces that become exposed as a result of partial unfolding, conformational changes, subunit dissociation, or other events. The entire protein is mapped according to the binding potential of its constituent atoms. Once binding targets are identified, optimal ligands are designed and progressively built by the addition of individual atoms that complement structurally and energetically the selected target.
    Type: Grant
    Filed: June 2, 1998
    Date of Patent: May 1, 2001
    Assignee: The Johns Hopkins University
    Inventors: Ernesto Freire, Irene Luque
  • Patent number: 6223143
    Abstract: A quantitative risk assessment system (QRAS) builds a risk model of a system for which risk of failure is being assessed, then analyzes the risk of the system corresponding to the risk model. The QRAS performs sensitivity analysis of the risk model by altering fundamental components and quantifications built into the risk model, then re-analyzes the risk of the system using the modifications. More particularly, the risk model is built by building a hierarchy, creating a mission timeline, quantifying failure modes, and building/editing event sequence diagrams. Multiplicities, dependencies, and redundancies of the system are included in the risk model. For analysis runs, a fixed baseline is first constructed and stored. This baseline contains the lowest level scenarios, preserved in event tree structure. The analysis runs, at any level of the hierarchy and below, access this baseline for risk quantitative computation as well as ranking of particular risks.
    Type: Grant
    Filed: August 31, 1998
    Date of Patent: April 24, 2001
    Assignee: The United States Government as represented by the Administrator of the National Aeronautics and Space Administration
    Inventors: Robert M Weinstock, Carol S Smidts, Ali Mosleh, Yung-Hsien Chang, Sankaran Swaminathan, Francisco J Groen, Zhibin Tan
  • Patent number: 6212490
    Abstract: A system and method for analyzing timing and noise effects in a hybrid circuit which contains a plurality of electrical components. The timing and noise effects for the hybrid circuit are generated by simulating electrical conditions within a hybrid circuit model. The hybrid circuit model is constructed by creating and integrating analog and behavioral models from the plurality of electrical components. The timing and noise effects remain accurate even at high printed circuit board/multi-chip module clock speeds, thereby ensuring that a user is able to construct an optimal design for any one of the plurality of electrical components.
    Type: Grant
    Filed: June 24, 1998
    Date of Patent: April 3, 2001
    Assignee: S3 Incorporated
    Inventors: Ken-Ming Li, Chi-Jung Huang
  • Patent number: 6212493
    Abstract: A technique for verification of a complex integrated circuit design, such as a microprocessor, using a randomly generated test program to simulate internal events and to determine the timing of external events. The simulation proceeds in two passes. During a first pass, the randomly generated test program and data vectors are applied to a simulation model of the design being verified. During this first pass, an internal agent collects profile data about internal events such as addresses and program counter contents as they occur. During a second pass of the process, the profile data is used to generate directed external events based upon the data observed during the first pass. In this manner, the advantages of rapid test vector generation provided through random schemes is achieved at the same time that a more directed external event correlation is accomplished.
    Type: Grant
    Filed: December 1, 1998
    Date of Patent: April 3, 2001
    Assignee: Compaq Computer Corporation
    Inventors: James D. Huggins, David H. Asher, James B. Keller
  • Patent number: 6202043
    Abstract: A computer system for analyzing and automatically modifying existing process system models that includes (i) an Initial Data stage that prompts the user to enter qualitative and quantitative objectives in designing or re-designing a Process System, (ii) a Component Model stage that displays an image of the sequence of components produced or added during the process and that allows the user to edit or complete the Component Model display that includes components, which are produced during the process, operations that produce them, and functions, each consisting of an element or tool that causes an action and an element or tool that receives the action, (iii) a Process (Functional) Analysis stage that includes functional and interaction relationships of the functions and operations designating each function as harmful or useful, and ranking each useful function according to the value of its contribution to the respective operation, and performing a value link analysis of each function including the level of the
    Type: Grant
    Filed: February 8, 1999
    Date of Patent: March 13, 2001
    Assignee: Invention Machine Corporation
    Inventors: Igor G. Devoino, Oleg E. Koshevoy, Simon S. Litvin, Valery Tsourikov
  • Patent number: 6199033
    Abstract: A spare one of a plurality of LAN emulation servers subscribes as a LAN emulation client for an operational one of the LAN emulation servers and supervises a condition of the operational server. If an abnormal condition of the operational server is detected, then the spare server issues an operational/spare changing over request to the operational server and is changed over to an operational server whereas the former operational server is changed over to a spare server. When the operational server is changed over to a spare LAN emulation server, it releases LAN emulation clients which have been subscribed for the operational LAN emulation server till then, and the released LAN emulation clients subscribe for the new operational LAN emulation server.
    Type: Grant
    Filed: August 7, 1998
    Date of Patent: March 6, 2001
    Assignee: NEC Corporation
    Inventor: Yumi Tanaka
  • Patent number: 6195623
    Abstract: A time-frequency method and apparatus are disclosed for simulating the initial transient response of quartz oscillators. An original system of differential algebraic equations that characterize a quartz oscillator are reformulated using a system of well-defined partial differential equations (PDEs). The quartz oscillator is initially represented by a system of ordinary differential algebraic equations that are then reformulated using an artificial system of partial differential algebraic equations. The artificial system represents the behavior of the quartz oscillator with two artificial time axes, t1 and t2, at least one of which has periodic boundary conditions. The artificial system is solved numerically using an integration technique along a strip of the artificial system, defined by [0, T(t2)[×[0, ∞[. Thereafter, the time behavior of the signal is calculated from the numerical solution of the artificial system.
    Type: Grant
    Filed: September 15, 1998
    Date of Patent: February 27, 2001
    Assignee: Lucent Technologies Inc.
    Inventor: Hans Georg Brachtendorf
  • Patent number: 6185519
    Abstract: Methods and systems disclosed efficiently detect potential interactions between features in a telecommunications network. The methods and systems specify AIN (Advanced Intelligent Network) and switch-based features and detect their interactions when present within a feature package provided to a single subscriber. The methodology supports the assumption that each feature is created without the knowledge of other features, and that each feature is specified as a “black box,” i.e., nothing is known about its internal logic except its input/output behaviors. The invention models a call environment, models two or more features, and combines the call variable usage for each feature. Methods then compare the combined call variable usages to detect potential feature interactions.
    Type: Grant
    Filed: December 1, 1998
    Date of Patent: February 6, 2001
    Assignee: Telcordia Technologies, Inc.
    Inventors: Fuchun Joseph Lin, Abhrajit Ghosh, Hong Liu
  • Patent number: 6185522
    Abstract: A method for emulating a non-bond-out version of a microcontroller that has a standard port, a microcontroller allowing such emulating, and a system for executing the emulation. For emulating a non-bond-out version of a microcontroller, a standard port is used to multiplex among user data and program store addresses. An external register is connected to the port for latching therein program store addresses. The microcontroller is synchronized according to a machine cycle that has a plurality of states, each of which comprises at least two clock pulses. The standard port is used for outputting mutually exclusive parts of a program store address in contiguous sections of a machine state of external parallel evaluation.
    Type: Grant
    Filed: May 18, 1998
    Date of Patent: February 6, 2001
    Assignee: U.S. Philips Corporation
    Inventor: Jacobus M. Bakker
  • Patent number: 6178394
    Abstract: A verification of the protocol between the various communicating elements of a concurrent system may be performed directly using the actual code that implements the element when it is actually operating. This is achieved by combining stateless search techniques with partial order methods, namely, persistent set and sleep set methods. In particular, the code of each element of a system is exercised by a scheduler in such a way that global states of the system are visited according to a stateless search, which is a search that does not use an explicit representation of the global states. A global state is a state in which the next operation to be executed by every element of the system is a visible operation. The set of visible operations includes at least those operations related to communication between the elements.
    Type: Grant
    Filed: December 9, 1996
    Date of Patent: January 23, 2001
    Assignee: Lucent Technologies Inc.
    Inventor: Patrice Ismael Godefroid
  • Patent number: 6178544
    Abstract: A method, computer system, and a computer readable medium is disclosed for generating triangular meshes for the purpose of performing high-speed generation of triangular meshes with boundary protection layers. One use for the invention is in simulations such as for semiconductor process and device simulations. The invention provides a way to suppress the volume of triangular meshes generated, by limiting the domains that destroy the boundary protection layer, thus, improving the speed of shape analysis. First, shape data is received and then, the next step is defining a boundary protection layer comprising orthogonal meshes matched locally with boundary line segments. After that, mesh points are placed inside domains separated by at least a reference distance from the boundary protection layer.
    Type: Grant
    Filed: July 24, 1998
    Date of Patent: January 23, 2001
    Assignee: NEC Corporation
    Inventor: Toshiyuki Syo
  • Patent number: 6173240
    Abstract: Method and system for determining the effects of variation of N statistically distributed variables (N≧1) in a fabrication process for semiconductor and other electronic devices by constructing and using an N-variable model function G(x1, . . . ,xN) to model the process. A sequence of orthogonal polynomials is associated with each probability density function Pi(xi) for each variable xi. These orthogonal polynomials, and products of these polynomials, are used to construct the model function G(x1, . . . ,xN), having undetermined coefficients. Coefficient values are estimated by results of measurements or simulations with variable input values determined by the zeroes (collocation points) of selected orthogonal polynomials. A Monte Carlo process is applied to estimate a probability density function associated with the process or device. Coefficients whose magnitudes are very small are used to identify regions of (x1, . . . ,xN)-space where subsequent Monte Carlo sampling may be substantially reduced.
    Type: Grant
    Filed: November 2, 1998
    Date of Patent: January 9, 2001
    Assignee: ISE Integrated Systems Engineering AG
    Inventors: Marcos Sepulveda, Roland R{umlaut over (u)}hl