Abstract: A touch display device is provided. At least one touch electrode includes a first part corresponding to each of at least one additional function area and a second part corresponding to a normal display area. Length and width of at least one trace of a connecting part between each adjacent two of touch sensing parts in the first part are increased to reduce capacitance difference between the first part and the second part. Areas without any pixel unit in each of the at least one additional function area form light transmissive areas, respectively. Thus, a transmission percentage is increased. Touch and display functions of each of at least one additional function area are ensured to be normal, and the transmission percentage is increased at the same time.

Abstract: A method of fabricating a multijunction solar cell panel by providing a plurality of multijunction solar cells; dispensing out uncured silicone coating on the solar cells using an automated process with visual recognition, and curing the silicone coating on the solar cell to complete the Cell-Interconnect-Cover Glass (CIC) assembly.

Abstract: An image sensor and a method for fabricating the same are provided. The image sensor includes a substrate including a first surface opposite a second surface that is incident to light, a first photoelectric conversion layer in the substrate, a wiring structure including a plurality of wiring layers on the first surface of the substrate, an interlayer insulating film on the second surface of the substrate, a capacitor structure in the interlayer insulating film, and a first wiring on the interlayer insulating film. The capacitor structure includes a first conductive pattern, a dielectric pattern, and a second conductive pattern sequentially stacked on the second surface of the substrate. The second conductive pattern is connected to the first wiring.

Abstract: The disclosed embodiments concern index oligonucleotides configured to identify sources of samples of nucleic acids and methods, apparatus, systems and computer program products for identifying and making the index oligonucleotides. In some implementations, the index oligonucleotides include a set of index sequences, a Hamming distance between any two index sequences of the set of index sequences meeting one or more criteria. System, apparatus, and computer program products are also provided for determining a sequence of interest using the index oligonucleotides.

Abstract: A method includes forming a transistor, which includes forming a gate dielectric on a semiconductor region, forming a gate electrode over the gate dielectric, and forming a source/drain region extending into the semiconductor region. The method further includes forming a source/drain contact plug over and electrically coupling to the source/drain region, and forming a gate contact plug over and in contact with the gate electrode. At least one of the forming the gate electrode, the forming the source/drain contact plug, and the forming the gate contact plug includes forming a metal nitride barrier layer, and depositing a metal-containing layer over and in contact with the metal nitride barrier layer. The metal-containing layer includes at least one of a cobalt layer and a metal silicide layer.

Abstract: A chip package structure is provided. The chip package structure includes a first chip structure including a substrate and an interconnect layer over the substrate. The chip package structure includes a second chip structure over the interconnect layer. The chip package structure includes a first conductive bump connected between the interconnect layer and the second chip structure. The chip package structure includes a conductive pillar over the interconnect layer. The chip package structure includes a molding layer over the interconnect layer and surrounding the second chip structure, the first conductive bump, and the conductive pillar. The chip package structure includes a second conductive bump over a first surface of the conductive pillar. The first surface faces away from the first chip structure.

Abstract: Some embodiments include a structure having an opening extending into an integrated configuration. A first material is within the opening, and is configured to create an undulating topography relative to a sidewall of the opening. The undulating topography has a surface roughness characterized by a mean roughness parameter Rmean which is the mean peak-to-valley distance along the undulating topography. The Rmean is at least about 4 nm. A second material is within the opening and along at least a portion of the undulating topography. The first and second materials are compositionally different from one another. Some embodiments include integrated assemblies. Some embodiments include methods of forming integrated assemblies.

Abstract: A display device includes a plurality of signal lines disposed on the upper surface of the first substrate and electrically connected to the display unit, a plurality of link lines disposed below the first substrate, and a plurality of side lines which is disposed on a side surface of the first substrate and connecting the plurality of signal lines and the plurality of link lines, and each of the plurality of side lines includes a first conductive layer which is disposed on the side surface of the first substrate and is formed of first conductive particles and a second conductive layer which covers the first conductive layer and is formed of second conductive particles having a particle size larger than that of the first conductive particles. Accordingly, the contact resistance of the side line is lowered and the mechanical property is improved while minimizing a bezel area.

Abstract: One or more embodiments described herein include systems, and/or methods that facilitate fabrication of a semiconductor device using a spacer lithography-etch process. According to an embodiment, a method can comprise performing a first lithography exposure and etch over a first layer of a semiconductor device, where the first lithography exposure and etch comprises forming one or more mandrels on a first region of a second layer by employing a first photoresist layer. The method can further comprise forming one or more spacers on a sidewall of the one or more mandrels and covering a second region of the second layer, where the second region is adjacent to the one or more mandrels. The method can further comprise forming a cut over a third region of the second layer and filling the third region with first material.

Abstract: The present disclosure provides an array substrate, a stretchable display device, and a method for manufacturing an array substrate. The array substrate includes: a display area; a circuit area configured to provide an electrical signal to the display area; and a protection area including a plurality of island-shaped protection blocks, a plurality of first connection bridges and a plurality of second connection bridges, wherein each of the plurality of first connection bridges is configured to connect two adjacent island-shaped protection blocks of the plurality of island-shaped protection blocks, and the plurality of second connection bridges are configured to connect the protection area and the circuit area, and wherein the plurality of first connection bridges include a first flexible substrate, and the plurality of second connection bridges include a second flexible substrate.

Abstract: The disclosed embodiments concern index oligonucleotides configured to identify sources of samples of nucleic acids and methods, apparatus, systems and computer program products for identifying and making the index oligonucleotides. In some implementations, the index oligonucleotides include a set of index sequences, a Hamming distance between any two index sequences of the set of index sequences meeting one or more criteria. System, apparatus, and computer program products are also provided for determining a sequence of interest using the index oligonucleotides.

Abstract: A display panel includes a light emitting element and an encapsulation layer on the light emitting element. The encapsulation layer covers the light emitting element. The encapsulation layer includes a plurality of polymer layers including a block copolymer. The plurality of polymer layers includes a plurality of first polymer layers, each of which has a first refractive index, and a plurality of second polymer layers, each of which has a second refractive index greater than the first refractive index. A difference between the first refractive index and the second refractive index is in a range of about 0.1 to about 0.6.

Abstract: A display apparatus includes: a display panel comprising a transmission area, a display area, and a middle area that includes at least one groove and is located between the transmission area and the display area; an input sensing layer stacked on the display panel, wherein a metal layer that overlaps the at least one groove in a plan view is in one of the display panel and the input sensing layer.

Abstract: An organic light-emitting device (OLED) display is provided. The OLED display includes a thin-film transistor (TFT) substrate having a plurality of TFTs and a plurality of data lines that control the plurality of TFTs. The OLED display also includes a conductive shielding layer disposed over the TFT substrate and an OLED layer disposed over the conductive shielding layer. The OLED layer includes a plurality of OLEDs that are driven by the plurality of TFTs. The OLED layer also includes a touch panel layer disposed over the OLED layer. The conductive shielding layer is configured to reduce noise coupling between the TFT substrate and the touch panel layer.

Abstract: Connection pads are formed in interlayer films provided respectively in interconnection layers of a sensor substrate on which a sensor surface having pixels is formed and a signal processing substrate configured to perform signal processing on the sensor substrate to make an electrical connection between the sensor substrate and the signal processing substrate. Then, a metal oxide film is formed between the interlayer films of the sensor substrate and the signal processing substrate, between the connection pad formed on a side toward the sensor substrate and the interlayer film on a side toward the signal processing substrate, and between the connection pad formed on the side toward the signal processing substrate and the interlayer film on the side toward the sensor substrate. The present technology can be applied to a laminated-type CMOS image sensor, for example.

Abstract: A laminate includes a colored layer and a light attenuating layer, in which the colored layer and the light attenuating layer are laminated, and a difference ?T1 between a maximum value and a minimum value of light transmittance of the light attenuating layer in a wavelength range of 400 to 700 nm is 10% or less.

Abstract: A semiconductor device includes a semiconductor layer of a first conductivity type. A well region that is a second conductivity type well region is formed on a surface layer portion of the semiconductor layer and has a channel region defined therein. A source region that is a first conductivity type source region is formed on a surface layer portion of the well region. A gate insulating film is formed on the semiconductor layer and has a multilayer structure. A gate electrode is opposed to the channel region of the well region where a channel is formed through the gate insulating film.

Abstract: A foldable display device includes a display area having a plurality of unit pixels and a non-display area surrounding the display area, and a folding area defined in the display area and the non-display area, and non-folding areas on both sides of the folding area. The foldable display device can further include a first substrate, a second substrate corresponding to the first substrate and including the plurality of unit pixels, a thin film transistor disposed on the second substrate, an organic light emitting diode disposed on the thin film transistor, and a mesh pattern disposed between the first substrate and the second substrate and having a plurality of openings. Openings of the mesh pattern in the folding area are smaller in size than openings of the mesh pattern in the non-folding areas.

Abstract: A system and method for reducing particle contamination on substrates during a deposition process using a particle control system is disclosed here. In one embodiment, a film deposition system includes: a processing chamber sealable to create a pressurized environment and configured to contain a plasma, a target and a substrate in the pressurized environment; and a particle control unit, wherein the particle control unit is configured to provide an external force to each of at least one charged atom and at least one contamination particle in the plasma, wherein the at least one charged atom and the at last one contamination particle are generated by the target when it is in direct contact with the plasma, wherein the external force is configured to direct the at least one charged atom to a top surface of the substrate and to direct the at least one contamination particle away from the top surface of the substrate.

Abstract: A semiconductor package includes a lower redistribution layer having a plurality of lower ball pads forming a plurality of lower ball pad groups, a semiconductor chip on the lower redistribution layer, an expanded layer surrounding the semiconductor chip on the lower redistribution layer, and an upper redistribution layer on the semiconductor chip and the expanded layer and having a plurality of upper ball pads forming a plurality of upper ball pad groups. The number of the plurality of upper ball pad groups may be the same as the number of the of the plurality lower ball pad groups. Each of the upper ball pads in one of the plurality of upper ball pad groups, from among the plurality of upper ball pads, may be a dummy ball pad.