Patents Examined by Leonard Chang
  • Patent number: 8578756
    Abstract: In a PM detection sensor with a sensor element having a pair of detection electrodes formed on a substrate, quantity of PM accumulated in the detection electrode is calculated on the basis of a resistance change between the detection electrodes. A series circuit composed of a temperature detection resistance and a capacitor connected in series is formed on a conductive path in the sensor element. A microcomputer in an ECU instructs a power source to supply a DC voltage to the resistance and the capacitor to make a first state in which no current flows in the resistance when a quantity of PM accumulated in the sensor element is detected. The microcomputer instructs the power source to supply an AC voltage to the resistance and the capacitor to make a second state in which a current flows in the resistance when a temperature of the sensor element is detected.
    Type: Grant
    Filed: May 24, 2011
    Date of Patent: November 12, 2013
    Assignee: Denso Corporation
    Inventor: Toshiyuki Suzuki
  • Patent number: 8574980
    Abstract: A method of forming fully silicided NMOS and PMOS semiconductor devices having independent polysilicon gate thicknesses, and related device. At least some of the illustrative embodiments are methods comprising forming an N-type gate over a semiconductor substrate (the N-type gate having a first thickness), forming a P-type gate over the semiconductor substrate (the P-type gate having a second thickness different than the first thickness), and performing a simultaneous silicidation of the N-type gate and the P-type gate.
    Type: Grant
    Filed: April 27, 2007
    Date of Patent: November 5, 2013
    Assignee: Texas Instruments Incorporated
    Inventors: Freidoon Mehrad, Shaofeng Yu, Steven A. Vitale, Craig H. Huffman
  • Patent number: 8569100
    Abstract: Forming an impurity diffusion layer of the second conductivity type and an antireflective film on one surface side of a semiconductor substrate of the first conductivity type; applying the first electrode material onto the antireflective film; forming a passivation film on the other surface side of the semiconductor substrate; forming openings in the passivation film to reach the other surface side; applying a second electrode material containing impurity elements of the first conductive type to fill the openings and not to be in contact with the second electrode material of adjacent openings; applying a third electrode material onto the passivation film to be in contact with the entire second electrode material; forming at a time, by heating the semiconductor substrate at a predetermined temperature after applying the first electrode material and the third electrode material, the first electrodes, a high-concentration region, and the second electrodes and third electrode.
    Type: Grant
    Filed: June 26, 2008
    Date of Patent: October 29, 2013
    Assignee: Mitsubishi Electric Corporation
    Inventors: Atsuro Hama, Hiroaki Morikawa
  • Patent number: 8567243
    Abstract: A method for a fill level measurement in which a first and/or a second fill substance can be located. A rest position can be ascertained, when the entire amount of each fill substance in the container forms a single layer containing only this fill substance, wherein the first fill substance has a smaller specific weight than the second fill substance, and the two fill substances have different dielectric constants. An electromagnetic signal is sent into the container, wherein a part of the signal is reflected. A capacitance between a capacitive probe and a reference electrode is measured, dependent on the amounts of the fill substances located in the container, and, on the basis of the measured capacitance and the measured travel times for each fill substance present in the container, the rest position of its fill substance upper surface is ascertained.
    Type: Grant
    Filed: December 12, 2008
    Date of Patent: October 29, 2013
    Assignee: Endress + Hauser GmbH + Co. KG
    Inventors: Alexey Malinovskiy, Herbert Schroth, Dietmar Spanke
  • Patent number: 8561459
    Abstract: Several aspects of the volume gauge may be implemented with a pressure sensing system and/or a motion sensing system. The pressure sensing system for volume measurements may include a chamber, a pressure changing device, a pressure sensing device, and a processor. The motion sensing system for volume measurements may include a container, a flexible seal, a heating device, a sensing device, and a processor.
    Type: Grant
    Filed: May 6, 2010
    Date of Patent: October 22, 2013
    Assignee: Stratec Biomedical USA, Inc.
    Inventors: Walt Caldwell, Clark A. Pentico, Lee M. Lee
  • Patent number: 8561487
    Abstract: A testing apparatus includes a support mechanism, a pushing device, and a clamping device secured to the driving member. The clamping device secures a product. The pushing device includes a guiding pipe, a driving member moveably attached to the guiding pipe, and an elastic member received in the guiding pipe. The elastic member is connected to a first end of the driving member. The first end of the driving member is received in the guiding pipe. The clamping device is secured to the driving member. Wherein the guiding pipe is adapted to receive air, the driving member is adapted to be driven by air to move along a first direction, and the elastic member is adapted to rebound to pull the driving member to move along a second direction opposite to the first direction.
    Type: Grant
    Filed: June 24, 2011
    Date of Patent: October 22, 2013
    Assignees: Hong Fu Jin Precision Industry (ShenZhen) Co., Ltd., Hon Hai Precision Industry Co., Ltd.
    Inventors: Fang-Yuan Chen, Shu-Qi Wu, Yang Chen, Yu-Lin Liu
  • Patent number: 8561460
    Abstract: A volume sensing system for use in determining a volume of a variable volume reservoir can include a lower plunger that can have a first end adapted to move with a bottom of the reservoir. An upper plunger can be slidable relative to the lower plunger. A lower biasing member can be positioned substantially between a base of the reservoir and the upper plunger, and the upper biasing member can be positioned between the upper plunger and an interference member. The upper biasing member can have a predetermined stiffness relative to the lower biasing member such that upon movement of the lower plunger, the upper plunger can move at a predetermined fraction of the amount of movement of the lower plunger, where the predetermined fraction can be determined at least in part by the predetermined stiffness of the upper biasing member relative to the lower biasing member.
    Type: Grant
    Filed: October 7, 2011
    Date of Patent: October 22, 2013
    Assignee: Medtronic, Inc.
    Inventor: Keith A. Miesel
  • Patent number: 8557704
    Abstract: Single spacer processes for multiplying pitch by a factor greater than two are provided. In one embodiment, n, where n?2, tiers of stacked mandrels are formed over a substrate, each of the n tiers comprising a plurality of mandrels substantially parallel to one another. Mandrels at tier n are over and parallel to mandrels at tier n?1, and the distance between adjoining mandrels at tier n is greater than the distance between adjoining mandrels at tier n?1. Spacers are simultaneously formed on sidewalls of the mandrels. Exposed portions of the mandrels are etched away and a pattern of lines defined by the spacers is transferred to the substrate.
    Type: Grant
    Filed: October 12, 2009
    Date of Patent: October 15, 2013
    Assignee: Micron Technology, Inc.
    Inventors: David H Wells, Mirzafer K Abatchev
  • Patent number: 8557682
    Abstract: Methods of dicing substrates having a plurality of ICs. A method includes forming a multi-layered mask comprising a first mask material layer soluble in a solvent over the semiconductor substrate and a second mask material layer, insoluble in the solvent, over the first mask material layer. The multi-layered mask is patterned with a laser scribing process to provide a patterned mask with gaps. The patterning exposes regions of the substrate between the ICs. The substrate is then plasma etched through the gaps in the patterned mask to singulate the IC with the second mask material layer protecting the first mask material layer for at least a portion of the plasma etch. The soluble material layer is dissolved subsequent to singulation to remove the multi-layered mask.
    Type: Grant
    Filed: June 15, 2011
    Date of Patent: October 15, 2013
    Assignee: Applied Materials, Inc.
    Inventors: James M. Holden, Wei-Sheng Lei, Brad Eaton, Todd Egan, Saravjeet Singh
  • Patent number: 8541700
    Abstract: A weight scale includes weight measurement means, storage means for storing a weight measurement value along with a measurement day and time, determination means for determining whether a fluctuation range of the weight measurement value in the same day is within a predetermined reference range, and display means for displaying a percentage of days determined that the daily weight fluctuation is within the reference range. In this manner, a trend in weight change can be grasped even with the measurement of a relatively short period.
    Type: Grant
    Filed: June 3, 2008
    Date of Patent: September 24, 2013
    Assignee: Omron Healthcare Co., Ltd.
    Inventors: Tetsuya Sato, Feilang Tseng, Tadashi Koike
  • Patent number: 8530332
    Abstract: An object is to provide an SOI substrate with excellent characteristics even in the case where a single crystal semiconductor substrate having crystal defects is used. Another object is to provide a semiconductor device using such an SOI substrate. A single crystal semiconductor layer is formed by an epitaxial growth method over a surface of a single crystal semiconductor substrate. The single crystal semiconductor layer is subjected to first thermal oxidation treatment to form a first oxide film. A surface of the first oxide film is irradiated with ions, whereby the ions are introduced to the single crystal semiconductor layer. The single crystal semiconductor layer and a base substrate are bonded with the first oxide film interposed therebetween. The single crystal semiconductor layer is divided at a region where the ions are introduced by performing thermal treatment, so that the single crystal semiconductor layer is partly left over the base substrate.
    Type: Grant
    Filed: March 25, 2009
    Date of Patent: September 10, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Eriko Nishida, Takashi Shimazu
  • Patent number: 8530329
    Abstract: A method of fabricating a semiconductor device includes forming a first trench and a second trench in a semiconductor substrate, forming a first insulator to completely fill the first trench, the first insulator covering a bottom surface and lower sidewalls of the second trench and exposing upper sidewalls of the second trench, and forming a second insulator on the first insulator in the second trench.
    Type: Grant
    Filed: June 16, 2011
    Date of Patent: September 10, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yong-Soon Choi, Jun-Won Lee, Gil-Heyun Choi, Eun-Kee Hong, Hong-Gun Kim, Ha-Young Yi
  • Patent number: 8525051
    Abstract: The invention relates to a sealing mechanism for a scale, in which a connection element connected to a moving lifting element seals or opens an annular gap, wherein, for an opened annular gap, the connection element and lifting element form a biasing load for the weighing sensor of the scale.
    Type: Grant
    Filed: March 18, 2010
    Date of Patent: September 3, 2013
    Assignee: Wipotec Wiege-und Positioniersysteme GmbH
    Inventors: Timo Hauck, Bernd Zinke
  • Patent number: 8522604
    Abstract: An apparatus and a method for detection of wear particles in a lubricant are disclosed. The apparatus includes a microfluidic device including a microchannel sized for a lubricant containing wear particles to pass therethrough and first and second electrodes extending into the microchannel. A detection system is coupled with the electrodes for detection of wear particles passing through the microchannel, based on a change in capacitance of the electrodes.
    Type: Grant
    Filed: October 30, 2009
    Date of Patent: September 3, 2013
    Assignee: The University of Akron
    Inventors: Jiang Zhe, Li Du, Joan E. Carletta, Robert J. Veillette
  • Patent number: 8518179
    Abstract: Systems and methods for producing crystalline materials by atomic layer deposition, allowing for high control of localized doping. Such materials may be fibers or films suitable for use in optoelectronics and lasers.
    Type: Grant
    Filed: February 29, 2012
    Date of Patent: August 27, 2013
    Assignee: UChicago Argonne, LLC
    Inventors: Thomas Proslier, Nicholas G. Becker, Michael J. Pellin, Jeffrey Klug, Jeffrey W. Elam
  • Patent number: 8511184
    Abstract: Device for taking samples from the bottom boundary layer of a water body, consisting of compact bottom sediments, overlying water-saturated mud layer, and near-bottom water layer directly connected with the latter, belongs among oceanographic devices. Disturbance of the probes' structure is avoided by the construction of the device with several shorter tubes with their inlet holes being located at different heights, instead of one long sampling tube. There are distinctive tubes for taking samples from layers at different heights from the bottom. The sampling tube divided into sections is furnished with isolating valves that divide the interior of the tube into layers isolated from each other. Soft and regulated drop of the device is achieved using the inflatable contact belt. Using an upper inflatable balloon avoids the vertical stability of the device and raising it to the surface without cabling.
    Type: Grant
    Filed: September 8, 2010
    Date of Patent: August 20, 2013
    Assignee: OÜ Dimentio
    Inventors: Martin Voll, Ants Erm, Andres Voll, Mehis Voll
  • Patent number: 8507310
    Abstract: A method for manufacturing a thin-film photoelectric conversion device includes forming a first electrode layer, a photoelectric conversion layer having three conductive semiconductor layers laminated thereon, and a second electrode layer sequentially laminated in this order on a translucent insulating substrate, such that adjacent thin-film photoelectric conversion cells are electrically connected in series, isolating a thin-film photoelectric conversion cell into a plurality of thin-film photoelectric conversion cells by forming isolation trenches that reach from the second electrode layer to the first electrode layer, removing a part of sidewalls at an external periphery of the thin-film photoelectric conversion cells positioned at an external peripheral edge of the thin-film photoelectric conversion device, along with the external periphery, and modifying into insulation layers by performing an oxidation process on all of the sidewalls of the isolation trenches of the photoelectric conversion layer and al
    Type: Grant
    Filed: November 20, 2009
    Date of Patent: August 13, 2013
    Assignee: Mitsubishi Electric Corporation
    Inventors: Hidetada Tokioka, Hiroya Yamarin, Tae Orita
  • Patent number: 8507363
    Abstract: Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. A method includes forming a mask above the semiconductor wafer. The semiconductor wafer is disposed on a water-soluble die attach film. The mask covers and protects the integrated circuits. The mask is patterned with a laser scribing process to provide a patterned mask with gaps. The patterning exposes regions of the semiconductor wafer between the integrated circuits. The semiconductor wafer is then etched through the gaps in the patterned mask to form singulated integrated circuits. The water-soluble die attach film is then patterned with an aqueous solution.
    Type: Grant
    Filed: June 15, 2011
    Date of Patent: August 13, 2013
    Assignee: Applied Materials, Inc.
    Inventors: Wei-Sheng Lei, Madhava Rao Yalamanchili, Brad Eaton, Saravjeet Singh, Ajay Kumar
  • Patent number: 8502197
    Abstract: A device including a locally modified buried first layer. A second layer is arranged on top of the first layer. The first layer includes at least one modified section and at least one unmodified section. The modified material of the locally modified buried first layer changes or induces mechanical strain in a portion of the second layer which is arranged above the at least one modified section. At least one nanostructure is placed on top of the second layer in an area, which is located above the at least one unmodified section of the first layer or adjacent thereto, said at least one nanostructure being formed by a strain-sensitive third material deposited on the locally strained second layer.
    Type: Grant
    Filed: December 11, 2012
    Date of Patent: August 6, 2013
    Assignee: Technische Universitat Berlin
    Inventors: André Strittmatter, Andrei Schliwa, Tim David Germann, Udo W. Pohl, Vladimir Gaysler, Jan-Hindrik Schulze
  • Patent number: 8501615
    Abstract: A system and method for forming metal bumps is provided. An embodiment comprises attaching conductive material to a carrier medium and then contacting the conductive material to conductive regions of a substrate. Portions of the conductive material are then bonded to the conductive regions using a bonding process to form conductive caps on the conductive regions, and residual conductive material and the carrier medium are removed. A reflow process is used to reflow the conductive caps into conductive bumps.
    Type: Grant
    Filed: June 15, 2011
    Date of Patent: August 6, 2013
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ming-Da Cheng, Chih-Wei Lin, Hsiu-Jen Lin, Tzong-Hann Yang, Wen-Hsiung Lu, Zheng-Yi Lim, Yi-Wen Wu, Chung-Shi Liu