Abstract: There is provided a substrate support of a plasma processing apparatus. The substrate support includes a wafer placement surface and a ring placement surface on which a first ring and a second ring disposed at an outer peripheral side of the first ring without overlapping with the first ring in a vertical direction are placed, with a hole at a boundary between the first ring and the second ring. The substrate support further includes a lifter pin having a first holding portion and a second holding portion, the second holding portion being unitary with and extending axially from a base end of the first holding portion and having a protruding portion protruding from an outer circumference of the first holding portion, and a driving mechanism configured to raise and lower the lifter pin.
Abstract: Exemplary methods of semiconductor processing may include forming a plasma of a carbon-containing precursor in a processing region of a semiconductor processing chamber. The methods may include depositing a carbon-containing material on a substrate housed in the processing region of the semiconductor processing chamber. The methods may include halting a flow of the carbon-containing precursor into the processing region of the semiconductor processing chamber. The methods may include contacting the carbon-containing material with plasma effluents of an oxidizing material. The methods may include forming volatile materials from a surface of the carbon-containing material.
Type:
Grant
Filed:
August 26, 2021
Date of Patent:
February 6, 2024
Assignee:
Applied Materials, Inc.
Inventors:
Sudha S. Rathi, Ganesh Balasubramanian, Nagarajan Rajagopalan, Abdul Aziz Khaja, Prashanthi Para, Hiral D. Tailor
Abstract: A memory device includes an alternating stack of insulating layers and electrically conductive layers located over a substrate, a memory opening vertically extending through the alternating stack, and a memory opening fill structure located in the memory opening and including a vertical semiconductor channel and a memory material layer. A vertical stack of insulating material portions can be provided at levels of the insulating layers to provide a laterally-undulating profile to the memory material layer. Alternatively, a combination of inner insulating spacers and outer insulating spacers can be employed to provide a laterally-undulating profile to the memory material layer.
Abstract: A semiconductor memory device according to an embodiment includes: a first interlayer insulating layer and a second interlayer insulating layer that are arranged in a first direction; a gate electrode layer provided between the first interlayer insulating layer and the second interlayer insulating layer; a semiconductor layer extending in the first direction and facing the gate electrode layer in a second direction intersecting the first direction; a first insulating layer provided between the gate electrode layer and the semiconductor layer; a charge storage layer provided between the gate electrode layer and the first insulating layer and containing a metal element; a second insulating layer provided between the gate electrode layer and the charge storage layer; and a first region provided between the charge storage layer and the first insulating layer and containing manganese (Mn), silicon (Si), and oxygen (O).
Abstract: A display device includes a lower electrode extending in a first direction and a first active layer disposed on the lower electrode and extending in a second direction perpendicular to the first direction. The first active layer includes a first area having a first width in the first direction, a second area having a second width wider than the first width in the first direction, and overlapping the lower electrode and a third area between the first area and the second area and connecting the first area to the second area.
Type:
Grant
Filed:
August 24, 2021
Date of Patent:
August 1, 2023
Assignee:
SAMSUNG DISPLAY CO., LTD.
Inventors:
Hui-Won Yang, Kyumin Kim, Jaeseol Cho, Jongmoo Huh