Patents Examined by Linda J. Fleck
  • Patent number: 5496766
    Abstract: Disclosure is a process for producing a luminous element of III-group nitride semiconductor having a crystal layer (Al.sub.x Ga.sub.1-x).sub.1-y In.sub.y N (0.ltoreq.x.ltoreq.1, 0.ltoreq.y.ltoreq.1) to which a II-group element is added, comprising the steps of forming a crystal layer (Al.sub.x Ga.sub.1-x).sub.1-y In.sub.y N (0.ltoreq.x.ltoreq.1, 0.ltoreq.y.ltoreq.1) to which a II-group element is added; irradiating a low energy electron beam onto a topmost surface of the crystal layer to reform only the crystal layer; forming a thin film for absorbing optical energy on the topmost surface of the crystal layer; and pulse-heating the thin film for absorbing optical energy by heating means to reform only the crystal layer, thereby to produce a bluish green, blue or UV light emitting diode or a semiconductor laser diode with a high precision color purity.
    Type: Grant
    Filed: March 28, 1995
    Date of Patent: March 5, 1996
    Assignee: Pioneer Electronic Corporation
    Inventors: Hiroshi Amano, Isamu Akasaki, Toshiyuki Tanaka, Teruo Tohma, Katsuhide Manabe
  • Patent number: 5495823
    Abstract: Disclosed is a semiconductor apparatus in which a single-crystalline thin film can be formed on a semiconductor substrate at a low temperature not higher than 800.degree. C. and a method of manufacturing such a semiconductor apparatus. In this semiconductor apparatus and the manufacturing method thereof, a silane gas is supplied onto a single-crystalline silicon substrate under condition of a temperature not higher than approximately 540.degree. C. and an amorphous silicon thin film is formed on a surface of the silicon substrate. At the same time, the amorphous silicon thin film is single-crystallized to form a single crystal silicon thin film, and single crystal silicon thin films are successively epitaxially grown. This enables those single crystal silicon thin films to be formed directly on the surface of the single-crystalline silicon substrate at a temperature lower than or equal to 800.degree. C.
    Type: Grant
    Filed: July 14, 1994
    Date of Patent: March 5, 1996
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Kiyoteru Kobayashi
  • Patent number: 5492860
    Abstract: A method of growing a layer of a III-V compound semiconductor on a silicon substrate comprises an oxide layer removing step of removing an oxide layer on a surface of the silicon substrate at a first temperature, a low-temperature grown layer forming step of forming a low-temperature grown layer of the III-V compound semiconductor on the silicon substrate while introducing a source gas for Group III and a source gas for Group V at a second temperature lower than the first temperature, and a single crystal layer growing step of growing a single crystal layer of the Group III-V compound semiconductor on the low-temperature grown layer while introducing the source gas for Group III and the source gas for Group V at a third temperature higher than the second temperature and lower than the first temperature.
    Type: Grant
    Filed: April 16, 1993
    Date of Patent: February 20, 1996
    Assignee: Fujitsu Limited
    Inventors: Satoshi Ohkubo, Shinji Miyagaki
  • Patent number: 5491108
    Abstract: A method which can markedly improve the flatness of a semiconductor integrated circuit device by forming selectively a layer insulating film on an underlying substrate having level differences is disclosed. First, a Ti--W alloy film is formed on a member which brings about level differences due to wirings or the like, then a PECVD silicon oxide film is formed followed by a plasma treatment using CF.sub.4 gas. Further, a silicon oxide film is deposited by atmospheric pressure CVD using ozone and tetraethoxysilane. Then, the surface is flattened by etchback using an organic SOG film, and a silicon oxide film is formed by plasma excited CVD.
    Type: Grant
    Filed: December 10, 1993
    Date of Patent: February 13, 1996
    Assignee: NEC Corporation
    Inventors: Mieko Suzuki, Tetsuya Homma, Yukinobu Murao, Takaho Tanigawa, Hiroki Koga
  • Patent number: 5486489
    Abstract: In the method, a doped semiconductor coating is to be deposited on a disturbed surface (S) of a semiconductor base (9) doped with a dopant having the same conductivity type as the coating. According to the invention, prior to depositing a main layer (28) of the coating (10), a superdoped layer (24) is deposited, which superdoped layer has a dopant concentration that is greater than twice the mean concentration of the coating. The invention applies in particular to manufacturing a semiconductor laser for an optical fiber telecommunications system.
    Type: Grant
    Filed: February 3, 1994
    Date of Patent: January 23, 1996
    Assignee: Alcatel N.V.
    Inventors: Leon Goldstein, Dominique Bonnevie
  • Patent number: 5486264
    Abstract: A laser-based technique for rapid etching of a semi-insulating substrate is described wherein a vertically suspended semiconductive sample is placed in an etchant solution. An intermittent laser beam is applied thereto whereby gas bubbles formed during the application of the laser beam to the laser reaction zone are displaced during the dark period of the intermittent laser beam.
    Type: Grant
    Filed: April 22, 1994
    Date of Patent: January 23, 1996
    Assignee: The Trustees of Columbia University
    Inventor: Osman A. Ghandour
  • Patent number: 5486490
    Abstract: A method of making a semiconductor laser includes forming spaced apart insulating films on a semiconductor substrate of a first conductivity type defining a central groove and two regions transverse to, contiguous to, and continuous with the central groove, the semiconductor substrate being exposed in the groove and the two regions; successively, epitaxially growing a first cladding layer of a first conductivity type, an active layer including a multiple quantum well structure having alternating well and barrier layers, a second cladding layer of a second conductivity type, opposite the first conductivity type, and a contact layer of the second conductivity type on the semiconductor substrate using a process producing thicker well layers in the groove than in the two regions; and forming first and second electrodes on the substrate and the contact layer, respectively.
    Type: Grant
    Filed: September 2, 1994
    Date of Patent: January 23, 1996
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Syoichi Kakimoto
  • Patent number: 5484749
    Abstract: The present invention provides a method of manufacturing a semiconductor device, characterized in that, after a surface of a substrate is reformed by high frequency plasma irradiation while the substrate is heated, an organic silane and ozone are reacted to form a silicon oxide film on the substrate under normal pressure or reduced pressure. The present invention also provides a method of manufacturing a semiconductor device, characterized in that, after a surface of a substrate is reformed by high frequency plasma irradiation while heating the substrate, organic silane, gas containing dopants such as phosphorus or boron and ozone are mixed, and a PSG film, a BSG film, a BPSG film or the like is formed on the substrate under normal pressure or reduced pressure.
    Type: Grant
    Filed: April 4, 1995
    Date of Patent: January 16, 1996
    Assignees: Alcan-Tech Co., Inc., Semiconductor Process Laboratory Co., Ltd., Canon Sales Co., Inc.
    Inventors: Kazuo Maeda, Noboru Tokumasu, Yuko Nishimoto
  • Patent number: 5478775
    Abstract: A semiconductor laser diode of a ridge type includes a double heterostructure in which a cladding layer is formed in a mesa stripe form and a current block layer which selectively buries mesa side and bottom surfaces of the cladding layer. For fabrication, a first step is to grow, sequentially above a substrate, a second cladding layer, an active layer, a first cladding layer and a cap layer. A second step is to etch the first cladding layer and the cap layer respectively in mesa stripe forms. A third step is to selectively grow current blocking layer on the first cladding layer by a metalorganic vapor phase epitaxy process. A fourth step is to grow contact layers respectively on surfaces of the current blocking layer and the cap layer. In the third step, a gas in which HCl is mixed in a concentration within a range of 0.2.about.2 in a (HCl)/(III gas) ratio is used, which enhances re-evaporation of material on a selective mask.
    Type: Grant
    Filed: December 7, 1994
    Date of Patent: December 26, 1995
    Assignee: NEC Corporation
    Inventor: Hiroaki Fujii
  • Patent number: 5476812
    Abstract: A semiconductor heterojunction structure comprising a p-type diamond layer and an n-type cubic boron nitride layer on a surface of said p-type diamond layer. Such heterojunction structure is useful for a semiconductor device such as a diode, a transistor, a laser and a rectifier, particularly an element which emits light from blue light to ultraviolet light.
    Type: Grant
    Filed: October 20, 1994
    Date of Patent: December 19, 1995
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Tsunenobu Kimoto, Tadashi Tomikawa, Nobuhiko Fujita
  • Patent number: 5472907
    Abstract: A method of manufacturing an optoelectronic semiconductor device includes the step of providing two comparatively thin layers next to one another on a substrate by means of a non-selective growing process, an etching process, and a selective growing process, a cladding layer being present over said thin layers. In the known method, first the one thin layer and the cladding layer are grown, the latter is locally removed, and the other thin layer and the cladding layer are then grown in that position. This method has the disadvantage that unevennesses (steps or openings) often arise at the surface of the layer structure above the transition between the thin layers.
    Type: Grant
    Filed: December 15, 1993
    Date of Patent: December 5, 1995
    Assignee: U.S. Philips Corporation
    Inventors: Johannes J. M. Binsma, Johannes M. M. Van Der Heijden
  • Patent number: 5471948
    Abstract: A doped or undoped photoresponsive material having metallic precipitates, and a PiN photodiode utilizing the material for detecting light having a wavelength of 1.3 micrometers. The PiN photodiode includes a substrate having a first compound semiconductor layer disposed thereon. The PiN photodiode further includes an optically responsive compound semiconductor layer disposed above the first compound semiconductor layer. The optically responsive layer includes a plurality of buried Schottky barriers, each of which is associated with an inclusion within a crystal lattice of a Group III-V material. The PiN device also includes a further compound semiconductor layer disposed above the optically responsive layer. For a transversely illuminated embodiment, waveguiding layers may also be disposed above and below the PiN structure. In one example the optically responsive layer is comprised of GaAs:As.
    Type: Grant
    Filed: May 11, 1994
    Date of Patent: December 5, 1995
    Assignees: International Business Machines Corporation, Purdue Research Foundation
    Inventors: Jeremy Burroughes, Rodney T. Hodgson, David T. McInturff, Michael R. Melloch, Nobuo Otsuka, Paul M. Solomon, Alan C. Warren, Jerry M. Woodall
  • Patent number: 5470800
    Abstract: A process for forming an interlayer membrane by chemical vapor deposition comprises the steps of supplying gaseous materials to a reaction chamber in which a wafer to be deposited is installed, supplying a catalyst gas to the reaction chamber separately from but concurrently with the gaseous materials are supplied, and allowing the gaseous materials to react with the catalyst gas adjacent the surface of the wafer to form a membrane being laid on the wafer. The gaseous materials may include at least one organic silicone compound. The catalyst may be selected from water soluble catalysts having basicity, preferably, compounds having amino groups or hydrazine derivatives. The catalyst may be dissolved with water to a solution prior to supply.
    Type: Grant
    Filed: March 26, 1993
    Date of Patent: November 28, 1995
    Assignee: Sony Corporation
    Inventor: Masakazu Muroyama
  • Patent number: 5467732
    Abstract: A method for fabricating a semiconductor device, which involves a technique for monitoring the temperature of the semiconductor substrate in which the device is formed, is disclosed. In accordance with the inventive technique, light, to which the substrate is substantially transparent, is impinged upon the substrate, and the intensity of either the reflected or transmitted light is monitored. If, for example, the intensity of the reflected light is monitored, then this intensity will be due to an interference between the light reflected from the upper surface of the semiconductor substrate and the light transmitted through the substrate and reflected upwardly from the lower surface of the substrate. If the temperature of the substrate varies, then the optical path length of the light within the substrate will vary, resulting in a change in the detected intensity.
    Type: Grant
    Filed: May 21, 1993
    Date of Patent: November 21, 1995
    Assignee: AT&T Corp.
    Inventors: Vincent M. Donnelly, Jr., James A. McCaulley
  • Patent number: 5468653
    Abstract: A photoelectric conversion device has a non-single-crystal semiconductor laminate member formed on a substrate having a conductive surface, and a conductive layer formed on the non-single-crystal semiconductor laminate member. The non-single-crystal semiconductor laminate member has such a structure that a first non-single-crystal semiconductor layer having a P or N first conductivity type, an I-type second non-single-crystal semiconductor layer and a third non-single-crystal semiconductor layer having a second conductivity type opposite the first conductivity type are laminated in this order. The first (or third) non-single-crystal semiconductor layer is disposed on the side on which light is incident, and is P-type. The I-type non-single-crystal semiconductor layer has introduced thereinto a P-type impurity, such as boron which is distributed so that its concentration decreases towards the third (or first) non-single-crystal semiconductor layer in the thickwise direction of the I-type layer.
    Type: Grant
    Filed: December 13, 1993
    Date of Patent: November 21, 1995
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Shunpei Yamazaki
  • Patent number: 5466633
    Abstract: An article and method for manufacturing an optical reading head (400,500) including an optically transparent substrate (100) with a first surface (103) and a second surface (116), wherein the first surface (103) and the second surface (116) are .joined at an angle. Depositing a plurality of layers having an upper portion (114), a middle portion 111, 112, 113), and a lower portion (101) that are optically active on the first and second surfaces (103, 116) of the optically transparent substrate (100). Forming light emitting devices (406, 407) in the plurality of layers on the second surface (116), thereby generating light emitting devices (406, 407) on the angle in the plurality of layers on the second surface (116). Positioning a detection device (402) in a normal plane to the first surface (103).
    Type: Grant
    Filed: April 25, 1994
    Date of Patent: November 14, 1995
    Assignee: Motorola
    Inventors: Donald E. Ackley, Michael S. Lebby, Gary F. Witting
  • Patent number: 5463978
    Abstract: A method of controlling the amount of impurity incorporation in a crystal grown by a chemical vapor deposition process. Conducted in a growth chamber, the method includes the controlling of the concentration of the crystal growing components in the growth chamber to affect the demand of particular growth sites within the growing crystal thereby controlling impurity incorporation into the growth sites.
    Type: Grant
    Filed: July 18, 1994
    Date of Patent: November 7, 1995
    Assignee: Ohio Aerospace Institute
    Inventors: David J. Larkin, Philip G. Neudeck, J. Anthony Powell, Lawrence G. Matus
  • Patent number: 5462008
    Abstract: Semiconductor films of the formula (InP).sub.1-x (TlP.sub.3).sub.x on InP substrates which cover the bandgap of 2-12 .mu.m for use with long wavelength infrared detector and laser applications are disclosed.
    Type: Grant
    Filed: December 12, 1994
    Date of Patent: October 31, 1995
    Assignee: Northwestern University
    Inventor: Manijeh Razeghi
  • Patent number: 5459082
    Abstract: A semiconductor device and a method of making the same capable of simplifying the process of making and reducing the cost of making. In the method a first layer is formed which has a plurality of conductors at its edge portion. Thereafter, a second layer is formed on the first layer which is to be selectively etched to form a pattern. During the etching, current is detected from the conductors and the etching is stopped dependent on the current detected from the conductors. The semiconductor device includes a transparent electrode on a substrate the transparent electrode having protrusions which have a top surface. A first insulation layer exists between the protrusions. There is a color emitting layer on the top surfaces of the protrusions and the insulation layer.
    Type: Grant
    Filed: August 9, 1994
    Date of Patent: October 17, 1995
    Assignee: Goldstar Co., Ltd.
    Inventor: Jae S. Jeong
  • Patent number: 5459097
    Abstract: In accordance with the invention, aluminum-containing layers are grown by molecular beam processes using as an arsenic precursor phenylarsine (PhAs). Because PhAs is more reactive than arsine and less reactive than arsenic, it decomposes selectively on III-V surfaces but not on mask materials. Thus in contrast to conventional processes, growth using PhAs permits selective growth on unmasked gallium arsenide surfaces but inhibits growth on typical mask materials such as silicon nitride.
    Type: Grant
    Filed: October 7, 1993
    Date of Patent: October 17, 1995
    Assignee: AT&T Corp.
    Inventors: Cammy R. Abernathy, Stephen J. Pearton, Fan Ren, Patrick W. Wisk