Abstract: A digital-analog converter of the disclosure converts digital image data to generate analog data signals. The digital-analog converter includes a voltage divider which generates a plurality of gamma reference voltages based on a first reference voltage and a second reference voltage; a global ramp including a plurality of gamma decoders which generates a plurality of global gamma voltages based on the gamma reference voltages; a decoder which selects one of the global gamma voltages according to the digital image data to generate the analog data signals; and a ramp controller which turns off at least some of the gamma decoders based on the digital image data.

Abstract: Disclosed are a display apparatus capable of changing a refresh period to improve response characteristics under a low-speed operation mode, and a method for operating the apparatus. The display apparatus includes a display panel; and a panel driving circuit configured to drive the display panel, wherein in a low-speed operation mode, the apparatus is configured to control the panel driving circuit to: perform multiple refreshes during an initial period of the first frame; and, after the multiple refreshes, change a refresh period and perform refreshes based on the changed refresh period.

Abstract: A display substrate and a manufacturing method thereof, and a display device are provided. The display substrate includes a base substrate, including a pixel array region and a peripheral region; and a first scan driving circuit, a plurality of power lines, a first signal line group, and a second signal line group, which are in the peripheral region and located on a first side of the base substrate. The first scan driving circuit includes a plurality of cascaded first shift registers; the plurality of power lines are configured to provide a plurality of power voltages to the plurality of cascaded first shift registers in the first scan driving circuit; the first signal line group includes at least one timing signal line; and the second signal line group is on a side of the plurality of power lines and the first signal line group away from the pixel array region.

Abstract: A pixel driving circuit, a display panel, and a display device. The pixel driving circuit includes a driving transistor, a data-writing sub-circuit; and a voltage stabilization sub-circuit. The voltage stabilization sub-circuit is coupled to a first control terminal of the driving transistor and is configured to keep a voltage at the first control terminal of the driving transistor to be stable in a reset stage. The voltage at the first control terminal of the driving transistor is kept stable through the voltage stabilization sub-circuit in the reset stage, so that the voltage at the output of the driving transistor is relatively constant, characteristics of a switching element of the driving transistor is ensured, an effect of homogeneous luminance is realized, and a display effect and a stability of displaying of the display panel are improved.

Abstract: An OLED drive circuit and an OLED display device. The OLED drive circuit includes a sub-drive circuit, a sub-switch circuit, a sub-detection circuit and a sub-compensation circuit; the sub-drive circuit is configured to output a driving voltage to an OLED; the sub-detection circuit is configured to detect the driving voltage of the sub-drive circuit when a circuit path between the sub-drive circuit and the OLED is disconnected; and the sub-compensation circuit is configured to output a data voltage output by the data line according to the driving voltage detected by the sub-detection circuit. According to the OLED drive circuit, a change of the driving current flowing into the OLED can be reduced, and an image quality of the OLED display device can be improved accordingly.

Abstract: A display device includes a timing controller for supplying a clock training signal through a data clock signal line in a first period of one frame period, and supplying image data through the data clock signal line in a second period of the one frame period, a data driver for generating a clock signal, based on the clock training signal in a clock training period in the first period, and generating a data signal, based on the clock signal and the image data in the second period, and a pixel unit for displaying an image, based on the data signal. The clock training signal includes a plurality of signal levels, and the data driver determines the clock training period, based on the signal levels of the clock training signal.

Abstract: A driving controller divides a display panel into first and second display areas according to an operation mode, outputs a start signal indicating a start of one frame and a masking signal for indicating a start of the second display area, sets a basic driving frequency to a normal frequency when the operation mode is a normal frequency mode, sets the basic driving frequency to a frequency lower than the normal frequency when the operation mode is a multi-frequency mode, and outputs the start signal and the masking signal. The first display area operates at a first driving frequency and the second display area operates at a second driving frequency, and the scan driving circuit sequentially drives scan lines in synchronization with the start signal, and stops, in response to the masking signal, driving of some of the scan lines corresponding to the second display area.

Abstract: A display device includes a reference voltage line electrically connected with a first node and receiving a sensing voltage reflecting a characteristic value of at least one subpixel and an analog-to-digital converter including a second node, receiving the sensing voltage, and outputting a digital value corresponding to the sensing voltage, wherein a voltage level of a driving reference voltage applied to the first node and a voltage level of an analog-to-digital converting reference voltage applied to the second node are changed depending on a level of the sensing voltage, thereby compensating for changes in the characteristic values of subpixels even when abnormal subpixels for which appropriate compensation for changes in characteristic values of subpixels is limited.

Abstract: A device including a display screen including display pixels arranged in rows and in columns, including a first row and a first column. The device further includes a display screen control circuit configured to, in a first mode, start the display of a first image on the first row and on the first column and, in a second mode, start the display of a second image on one of the rows different from the first row and/or on one of the columns different from the first column.

Abstract: A data driver includes a buffer module and at least two data processing paths. The buffer module is configured to synchronously output image data corresponding to at least two rows of sub-pixels. Each of the at least two data processing paths is connected to the buffer module and a set of data lines and is configured to synchronously output a data signal corresponding to the image data to the at least two rows of sub-pixels.

Abstract: A pixel driving circuit, a display panel and a display device. The pixel driving circuit includes a driving and compensation sub-circuit; a data writing sub-circuit; and a coupling capacitance. A ratio of a capacitance value of the coupling capacitance to the sum of the capacitance value of the coupling capacitance and the capacitance value of the storage capacitance is configured to be greater than a preset value. The preset value is determined based on the preset maximum luminance fluctuation of the display panel. In the present application, the luminance fluctuation is adjusted by adjusting the correlation relationship between the capacitance value of the coupling capacitance and the capacitance value of the storage capacitance. Thus, a new capacitance configuration is provided, the panel can be adjusted at a capacitance level, and a better display effect is provided.

Abstract: According to an aspect of the present disclosure, a display device includes a display panel which includes sub pixels configured by an upper sub pixel and a lower sub pixel which share a data line and are adjacent to each other; and a data driver which converts only image data corresponding to any one of even-numbered grayscale levels and odd-numbered grayscale levels among 10-bit image data into a data voltage to supply the converted data voltage to the sub pixel, in which when the data driver converts only the even-numbered grayscale levels of image data into the data voltage and the sub pixel displays an X (X is an odd number) grayscale level, the data driver supplies an X?1 grayscale level of data voltage to the upper sub pixel and supplies an X+1 grayscale level of data voltage to the lower sub pixel.

Abstract: A display device includes a display panel, a luminance compensator, and a data driver. The display panel includes a plurality of pixels. The luminance compensator is configured to calculate a scaling factor based on a target current, a black image current, and a sensing current. The target current is calculated based on an input current input to the display panel. The sensing current is measured from the display panel. The data driver is configured to generate a data voltage based on input image data to supply the data voltage to the pixels. The data voltage has a voltage level adjusted based on the scaling factor.

Abstract: A display device may include a display panel and a driver circuit. The display panel may include subpixels, data lines, and reference voltage lines. The driver circuit may drive the data lines. A first subpixel may be connected to a first data line and a first reference voltage line. A driving time of the first subpixel may include a first initialization time in which a reference voltage is applied to the first reference voltage line and a first tracking time in which a voltage of the first reference voltage line increases from the reference voltage. During the first tracking time, a first data signal transferred to the first subpixel through the first data line may be changed from a first voltage value to a reference driving voltage value. The first voltage value may be higher than the reference driving voltage value. The display device may reduce a sensing time.

Abstract: From a back side of an insulating substrate 90, a laser beam is applied to a spot where an initialization line Vini is superimposed on the semiconductor layer SI that serves as a first conductive terminal of a second initialization transistor T7 while sandwiching an insulating film therebetween. Thus, a gate insulating film 91 and a first interlayer insulating film 92, which are sandwiched between the semiconductor layer SI and the initialization line Vini, disappear by evaporation, and a laser irradiation area LA of the semiconductor layer SI is connected to the initialization line Vini, by which a connection portion CP is formed. As a result, a voltage to be applied to the organic EL element OLED becomes equal to or less than a threshold voltage. Therefore, the organic EL element OLED is constantly in a lighting-off state, and the pixel circuit 11 is constantly kept black.

Abstract: A display device includes a scan write line, a PWM emission line, a PAM emission line, a sweep signal line, a first data line, a second data line, and a subpixel connected thereto, and including a light emitting element, a first pixel driver to supply a control current to a node according to the first data voltage in response to the PWM emission signal, a second pixel driver to generate a driving current according to the second data voltage in response to the PWM emission signal, and a third pixel driver to supply the driving current to the light emitting element according to the PAM emission signal and a voltage of the node, wherein the PWM emission signal includes a plurality of PWM pulses, the PAM emission signal includes a plurality of PAM pulses, and a number of the PWM pulses is greater than a number of the PAM pulses.

Abstract: A gate driving circuit that minimizes output characteristic deviation between a plurality of scan output buffer units, and a display device comprising the gate driving circuit, are discussed. An Nth stage of the gate driving circuit, N being a natural number, can include a node controller configured to control voltages of a first node and a second node according to a set signal and a reset signal, a carry pulse output unit configured to receive a carry clock and output the carry clock as a carry pulse according to voltages of the first node and the second node, and a plurality of scan pulse output units configured to receive a plurality of scan clocks and output each of the scan clocks as a scan pulse according to voltages of the first node and the second node.

Abstract: A pixel structure, a display substrate and a driving method therefor, and a display device. The pixel structure includes a plurality of pixel units; each pixel unit comprises a first sub-pixel, a second sub-pixel, a third sub-pixel, and a central sub-pixel; the central sub-pixel is located in an area enclosed by the first sub-pixel, the second sub-pixel, and the third sub-pixel; the minimum distance from the central sub-pixel to at least one of the first sub-pixel, the second sub-pixel, and the third sub-pixel in a same pixel unit is less than the distance between two adjacent pixel units.

Abstract: The present invention provides a full grayscale subjective consistency optical data obtaining method and a splicing display panel, an initial splicing display panel includes splicing and disposing first display panel (liquid crystal display panel) and second display panel in different types. The method includes: obtaining a plurality of bonding point colors, sets of reference bonding point optical parameters and sets of bonding point optical parameters of the first display panel and the second display panel corresponding to the bonding point colors respectively, and determining non-bonding point optical parameters in the second display panel corresponding to non-bonding point colors between adjacent two of the bonding point colors. A display image of the second display panel under effect of each set of the bonding point optical parameters is subjectively consistent with a display image of the first display panel under effect of a set of the reference bonding point optical parameters.

Abstract: A circuit board assembly includes a main board and a connection board attached to the main board. The connection board includes a base board including a connecting pad area and a mounting area, wherein the connection board is attached to the main board in the connecting pad area, and wherein the mounting area is spaced apart from the connecting pad area in a first direction and includes a driving chip mounted thereon. The connection board further includes first connection pads disposed on the connecting pad area of the base board, and second connection pads disposed on the connecting pad area of the base board. The main board includes first main pads connected to the first connection pads in a one-to-one connection and a second main pad connected to the second connection pads in a many-to-one connection.