Abstract: A method of efficient library characterization of a circuit of a logic gate having a plurality of transistors and a plurality of nodes defining interconnection points in the circuit is disclosed. The method includes determining a plurality of vectors for a plurality of arcs. Each of the plurality of vectors represents possible data bits to inputs and nodes of the logic gate. The method performs circuit pruning for each of distinct vectors. The circuit pruning includes identifying an active circuit for each vector. Then, the circuit simulations limited to a plurality of transistors in the active circuit are performed. The circuit pruning and circuit simulations are repeated for remaining ones of the plurality of substantially distinct vectors. The results of the circuit simulations are then stored on a non-volatile compute readable media, for each active circuit corresponding to each of the plurality of substantially distinct vectors.
Abstract: Method and system to configure a common set of electronic components using software in order to simulate different electronic, mechanical and/or electro-mechanical instruments or instrument functions. For each instrument function or traditional mode of operation to be simulated, software models are created which when directed to the electronic components, cause the electronic components to respond to input in the same manner that the actual, traditional physical instrument would respond to satisfy the same test requirement input. The software models are preferably stored in a model repository which is searchable to enable a user to select the instrument function or traditional mode of operation to be simulated with the corresponding model being provided to the electronic components. Once the model, i.e., a function for each synthetic element, is downloaded and the electronic components configured according to the model functions, testing of the assemblies or other UUTs can begin.
Type:
Grant
Filed:
September 1, 2006
Date of Patent:
March 6, 2012
Assignee:
Advanced Testing Technologies Inc.
Inventors:
Robert Spinner, Eli Levi, William Harold Leippe, Emery Korpi, Michael Lai, James Kuveikis, Richard E. Chalmers, Richard Engel, Peter F. Britch, William Biagiotti, David Howell
Abstract: A circuit is simulated by using system or network tearing to obtain a real solution. The circuit may be an entire integrated circuit, portion of an integrated circuit, or a circuit block. A circuit simulation technique of the invention generates a system graph, finds a tree, and partitions the tree into two or more subtrees. The technique identifies global links and local links in the graph. Each subtree may be solved individually using distributed, parallel computing. Using the results for the subtrees, the technique obtains a real solution, branch voltages and currents, for the circuit.
Abstract: Generating transactional level bus simulation instructions from a bus protocol description is disclosed. A bus protocol description is accessed. From the bus protocol description, a finite state machine is generated. Transactional level bus simulation instructions are generated from the finite state machine. Then, the transaction level bus simulation instructions are stored in computer readable medium.
Abstract: A design modelling system for operating on disparate data models in a single application is provided. The design modelling system comprises at least one source file defining a source data model, a modelling development environment module for consuming source files, and an internal generic data model transformed from the source data model in accordance with direction provided by elements of consumed source files.
Type:
Grant
Filed:
May 21, 2004
Date of Patent:
October 11, 2011
Assignee:
International Business Machines Corporation
Abstract: A method and apparatus for utilizing a bridged peripheral system within a bridged computer system having a host computer and a remote computer. The host computer executes peripheral driver software that initiates at least one communication. The host computer also executes a peripheral emulation that represents a peripheral of the remote client computer, where the at least one communication is processed by the peripheral emulation. In one embodiment, the peripheral is an audio codec.
Type:
Grant
Filed:
March 28, 2008
Date of Patent:
October 4, 2011
Assignee:
Teradici Corporation
Inventors:
Charles Peter Baron, Noha Kafafi, Kevin Mlazgar, Bradley Reginald Quinton
Abstract: A particle behavior analysis method uses plural computers connected via a network to analyze particle behavior considering an interaction force with a different substance acting on a particle. The method includes analyzing the particle behavior by using a force decomposition paralleling algorithm using a force matrix considering at least two or more types of interaction forces.
Abstract: A required payload volume of a Blended Wing Body air vehicle is determined and analyzed for a list of corner points that is passed to a Loft Module as keep-out points to be enclosed by a body portion established using a faceted minimum volume. Trapezoidal wing shape and size are determined, a leading edge of the body portion and trapezoidal wing leading edge are trimmed and a trailing edge of the body portion and trapezoidal wing trailing edge are blended. A leading edge elevation is established and with leading edge radius as an input smoothly encloses the payload volume in a first set of defined aerodynamic sections. A second set of aerodynamic sections and transition sections between the body portion and the trapezoidal wing are defined. The blended wing body is then lofted based on the defined sections.
Type:
Grant
Filed:
December 17, 2007
Date of Patent:
September 13, 2011
Assignee:
The Boeing Company
Inventors:
Thomas Allen Hogan, Christopher K. Droney, Dino Roman
Abstract: A modeller for a system for determining a residual error probability. The modeller includes a component modeller, which is adapted to receive an error probability and to model a change of the error probability due to a behaviour of a system component, in order to output a changed error probability as residual error probability.
Abstract: Computer implemented method, system, and computer usable program code for simulating processor operation in a data processing system. An instruction trace is generated, wherein the instruction trace includes markers specified by a user for identifying interval boundaries for at least one interval of the instruction trace. The instruction trace is divided into a plurality of intervals in consideration of the markers, and the plurality of intervals are formed into a plurality of interval clusters, wherein each interval cluster represents one phase of execution of the instruction trace. At least one interval from each of the plurality of interval clusters is selected as a trace sample to provide a plurality of trace samples, wherein each selected interval is of at least a minimum size, a simulation is performed using the plurality of trace samples, and a result of the simulation is provided to the user.
Type:
Grant
Filed:
August 21, 2007
Date of Patent:
August 16, 2011
Assignee:
International Business Machines Corporation
Inventors:
Robert H. Bell, Jr., Wen-Tzer Thomas Chen, Pattabi R. Seshadri, John-David Wellman
Abstract: The drift region for increasing the breakdown voltage in an LDMOSFET is regarded as a resistive element. The potential distribution of the overall device is calculated by obtaining a potential distribution considering the resistance by iterative calculation. A capacitance generated in the drift region is analytically calculated assuming a linear potential distribution. A capacitance generated in the overlap region between the gate electrode and the drift region is calculated by considering the potential from the depletion region to the accumulation region.
Type:
Grant
Filed:
May 30, 2008
Date of Patent:
July 19, 2011
Assignee:
Semiconductor Technology Academic Research Center
Abstract: Methods and systems for updating and/or predicting statistical reliability for downhole devices. In some embodiments, the statistical reliability for a device may be predicted prior to using the device to ensure the statistical reliability stays above a preset threshold. In other embodiments, the statistical reliability for a device is tracked substantially simultaneously with use, again to ensure its statistical reliability stays above a predetermined threshold.
Abstract: Methods are provided for fitting a curve to a set of data values using a least absolute value (LAV) cost function. The set of data values may comprise m sets of data values. The method takes advantage of contraction mapping to determine a number n<m of individual equations which are interpolated by the curve to be fitted, where n corresponds to the number of parameters x1, x2, . . . , xn to be ascertained for the curve to be fitted. The method then involves solving the n selected equations to determine the n parameters x1, x2, . . . , xn of the curve to be fitted. Selection of these parameters ensures that the curve to be fitted minimizes the LAV cost function.
Type:
Grant
Filed:
January 10, 2008
Date of Patent:
June 14, 2011
Assignee:
Simon Fraser University
Inventors:
Gustav Christensen, Penelope Janet Christensen, legal representative
Abstract: The invention is a method for simulating sandstone deposition. The sandstone is simulated by estimating the grain size distribution and mineral composition of grains in the sandstone, simulating sedimentation of grains from the grain size distribution and mineral composition of the grains, simulating compaction of the grains, and simulating cementation of the grains. Properties of the sandstone such as porosity and permeability may be estimated from the simulated sandstone. The method permits multiple mineralogies to be simulated during the burial history of sedimentation, compaction and cementation.
Abstract: A method and system for modeling uncertainties in integrated circuits, systems and fabrication processes may include defining interval values for each uncertain component or parameter in a circuit or system. The method may also include replacing scalar operations with interval operations in an algorithm and discontinuing interval operations in the algorithm in response to a predetermined condition. The method may also include generating a plurality of scalar samples from a plurality of intervals and determine a distribution of each uncertain component or parameter from the scalar samples of the intervals.
Type:
Grant
Filed:
March 8, 2006
Date of Patent:
April 5, 2011
Assignee:
Carnegie Mellon University
Inventors:
Rob A. Rutenbar, James D. Ma, Claire F. Fang, Amith Singhee
Abstract: A method and article for designing dual-mode adapters in a joint press kit. A plurality of ball joints for use with the adapters are selected. An adapter design is created by defining a first variable representative of a physical characteristic of the adapter design; defining a second variable representing a quantity of ball joints that are not compatible with the adapter design in a second operational mode; generating data sets including the first and second variables; and utilizing the data sets to determine a value for a characteristic of the adapter.
Abstract: A computer determines a subsequent state of a steel volume, based on an instantaneous initial state of said steel volume and at least one volumetric surface, the temporary influence quantities acting on said steel volume, by resolution of an equation of thermal condition and phase change. The states include for at least one volumetric element of the steel volume, a local distribution in concentration of a alloy element mobile in the steel, the local proportions of the modeled phases of the steel and a quantity describing a local energy content of the steel. The phases include austenite and another phase, generally, ferrite or cementite. In the context of the change equation, the concentration levels of the mobile alloy element, which are located on either side of the phase boundary, between the austenite and the other phase are determined by resolution of a Stephan problem.
Type:
Grant
Filed:
December 27, 2004
Date of Patent:
January 4, 2011
Assignee:
Siemens Aktiengesellschaft
Inventors:
Wolfgang Borchers, Klaus Franz, Klaus Weinzierl
Abstract: A system and method for matching the hardware resource requirements of a user module with the available resources of an underlying integrated circuit is shown. Databases are utilized to describe the requirements of a particular user module and the resources of a particular chip. A graphical interface is utilized to relate a selected user module with potentially appropriate resources, and to illustrate alternative placements. This graphical interface utilizes highlights of both the module and the associated resource in patterns, grayscales, or colors to graphically illustrate the relationship between the module and the associated resource.
Type:
Grant
Filed:
November 19, 2001
Date of Patent:
November 30, 2010
Assignee:
Cypress Semiconductor Corporation
Inventors:
Kenneth Y. Ogami, Frederick R. Hood, III
Abstract: A computer implemented method for determining an alternative representation of an optimization model reduces model input through compact representation of model parameters. Model generation is performed at varying levels of complexity (approximation) depending on pre-defined, business approved thresholds. The computer receives a set of functions representing a set of events where each function includes sets of first and second axis coordinate values. Each of the functions are transformed to a compacted function which includes a set of pieces including an anchor point, break points, and slopes. Successive pieces having the same slope value are removed. Alternate optimization models are generated based on the set of pieces representing a compacted function and on a predetermined accuracy value.
Type:
Grant
Filed:
March 13, 2008
Date of Patent:
November 16, 2010
Assignee:
International Business Machines Corporation
Inventors:
Tarun Kumar, Gyana Ranjan Parija, Haifeng Xi
Abstract: Methods and apparatus, including computer program products, for receiving in a Computer Aided Design (CAD) tool result information and load information from a first analysis program, the result information determined by performing an analysis of a plurality of physical elements in a CAD model. And providing one or more of the result information or the load information from the CAD tool to a second analysis program.