Abstract: An asynchronous stack apparatus and method is provided that reduces power consumption that maintains a constant response time regardless of the number of stored items. The asynchronous stack apparatus uses a token and control circuits to indicate a current tope of stack and process data input/output. The asynchronous stack apparatus includes a communication device, a plurality of storage units and a token control circuit.

Abstract: A device for bus-networked operation of an electronic unit having microcontroller has a semiconductor circuit which is supplied from a superordinate potential, and is connected between a bus protocol module of the microcontroller and the cores of a two core bus. The semiconductor circuit, which has at least two operating modes, "transmission and reception" (NORMAL) and "sleep" (SLEEP), compromises: a receiving circuit connected to the two bus cores, whose output communicates with a reception input of the bus protocol; a transmitting circuit coupled to receive the transmission output of the bus protocol function; a wake-up identification circuit connected to the cores of the two core bus, and having a wake-up input and switching means for providing, at a control output, a switch-on signal after identification of a wake-up signal from the wake-up input or from the bus, and for emitting a switch-off signal in the SLEEP mode.