Abstract: A semiconductor module, including a metal-oxide-semiconductor field effect transistor (MOSFET) made of a SiC semiconductor material, and an insulated gate bipolar transistor (IGBT) that is made of a Si semiconductor material and is connected in parallel with the MOSFET. The MOSFET having a body diode. The IGBT is a reverse conductive-IGBT (RC-IGBT), and includes a free wheeling diode. A forward voltage of the free wheeling diode is so set that a current in the body diode of the MOSFET, which is connected in parallel with the RC-IGBT, is equal to or below a current value that causes lattice defects to grow in the MOSFET.

Abstract: A power module includes a metal frame having a first and second device attach pads, first and second semiconductor packages each having an encapsulant body, a die pad exposed at a lower surface of the encapsulant body, a plurality of leads protruding out from the encapsulant body, and a potting compound that encapsulates both of the first and second semiconductor packages and partially covers the metal frame. The first semiconductor package is mounted on the metal frame such that the die pad of the first semiconductor package faces and electrically contacts the first device attach pad. The second semiconductor package is mounted on the metal frame such that the die pad of the second semiconductor package faces and electrically contacts the second device attach pad. The plurality of leads from each of the first and second semiconductor packages are electrically accessible from outside of the potting compound.

Abstract: An electronic device includes a bond wire with a first end bonded by a ball bond to a planar side of a first conductive plate, and a second end bonded by a stitch bond to a conductive stud bump at an angle greater than or equal to 60 degrees. A wirebonding method includes bonding the first end of the conductive bond wire to the first conductive plate includes forming a ball bond to join the first end of the conductive bond wire to a planar side of the first conductive plate by a ball bond, and bonding the second end of the conductive bond wire to the conductive stud bump includes forming a stitch bond to join the second end of the conductive bond wire to the conductive stud bump.

Abstract: A semiconductor power module is configured in such a way that a protruding portion of a heat sink is inserted into a penetration hole of a jacket, that an end face portion of the protruding portion and a cooling fin are exposed in a flow path, that a front-end portion of the cooling fin abuts on an inner wall surface of the flow path, that a packing is mounted in a groove portion formed between an inner wall portion of the penetration hole and a side wall portion, of the protruding portion of the heat sink, that faces the inner wall portion, that the inner wall portion of the penetration hole and the side wall portion of the protruding portion press the packing in the radial direction thereof, that a spring member presses the front-end portion of the cooling fin to the inner wall surface of the flow path.

Abstract: A semiconductor module includes a conductive substrate, a semiconductor element, a control terminal, and a sealing resin. The conductive substrate has an obverse surface and a reverse surface that are spaced apart from each other in a thickness direction. The semiconductor element is electrically bonded to the obverse surface and has a switching function. The control terminal is configured to control the semiconductor element. The sealing resin has a resin obverse surface and a resin reverse surface, and covers the conductive substrate, the semiconductor element, and a part of the control terminal. The control terminal protrudes from the resin obverse surface, and extends along the thickness direction.

Abstract: A semiconductor module includes a conductive substrate, a semiconductor element, a control terminal, and a sealing resin. The conductive substrate has an obverse surface and a reverse surface that are spaced apart from each other in a thickness direction. The semiconductor element is electrically bonded to the obverse surface and has a switching function. The control terminal is configured to control the semiconductor element. The sealing resin has a resin obverse surface and a resin reverse surface, and covers the conductive substrate, the semiconductor element, and a part of the control terminal. The control terminal protrudes from the resin obverse surface, and extends along the thickness direction.

Abstract: A radar system for determining a distance to another radar system includes a transceiver. The transceiver transmits a first Frequency Modulated Continuous Wave, FMCW, radar signal. The first FMCW radar signal includes a first sweep profile. The transceiver is receives a second FMCW radar signal. The second FMCW radar signal includes a second sweep profile which differs from the first sweep profile. The radar system further includes a mixer which generates a beat signal based on the first and second FMCW radar signals. The radar system further comprises a deskewing unit which deskews the beat signal by matching the sweep profiles of the first and second FMCW radar signals. Further a method for determining a distance between radar systems, a system for determining a distance between first and second radar systems and a method for determining a distance between first and second radar systems.

Abstract: A measurement setup for measuring attenuation through an irregular surface of a device under test is described. The measurement setup includes a positioning system, a reference reflector, and a three dimensional imaging system. The measurement setup has a reference state and a measurement state, wherein respective images are taken in the different states. The imaging system is configured to compare the images taken in the reference state and the measurement state to determine the attenuation of the device under test. Further, a reference reflector as well as a method for measuring attenuation are described.

Abstract: In one aspect of the semiconductor module, the sealing material on the lower side of the die stage is thinner than the sealing material on the upper side of the semiconductor element, a bent portion that forms a step with respect to vertical direction in the first lead is provided in a region sealed by the sealing material in the first lead, the side where the die stage is present of the step is positioned below the side where the die stage is not present of the step due to the step, the side where the die stage is not present of the step in the first lead protrudes from one end side of the sealing material, and a groove is provided on an upper side surface, a lower side surface, or both of them of the bent portion of the first lead.

Abstract: This disclosure relates to a discrete half bridge semiconductor device including a first cascode arrangement and a second cascode arrangement. Each of the first cascode and second cascode arrangements include a high voltage FET device die and a low voltage FET device die; and the source of the high voltage FET device die is mounted on and connected to a drain of the low voltage FET device die. The source of the low voltage FET device die and gate of the high voltage FET device die are connected to a drain terminal of the high voltage FET device die of the second cascode arrangement at a common connection pad.

Abstract: A semiconductor arrangement includes a controllable semiconductor element having an active region, and bonding wires arranged in parallel to each other in a first horizontal direction. The active region has a first length in the first horizontal direction and a first width in a second horizontal direction perpendicular to the first horizontal direction. Each bonding wire is electrically and mechanically coupled to the controllable semiconductor element by a first number of bond connections arranged above the active region. A first bond connection of each bonding wire is arranged at a first distance from a first edge of the active region. A second bond connection of each bonding wire is arranged at a second distance from a second edge of the active region opposite the first edge. The first and second distances are both less than the first length divided by twice the first number of bond connections.

Abstract: A radar apparatus for use in a vehicle (1) comprises a radar housing (6) which houses a radar sensor (7), a first 3-axis accelerometer (8) fixed so it cannot move relative to the radar sensor (7); a movable support (9) that comprises a first part (10), a second part (12), and an actuator (13) in which in use the first part (10) is fixed relative to the body (11) of the vehicle, the second part (12) is fixed relative to the radar housing (6), and the actuator is operable to move the second part relative to the first part around an axis that is fixed relative to the vehicle body by an actuator, and a signal processing apparatus (15) configured in use to determine a misalignment of the radar sensor from one or more of the signals output from the first 3-axis accelerometer (8) and one or more signals output from a second 3-axis accelerometer (16) fitted to the vehicle (1), in which the signals used are captured at different moments in time when the second part of the movable support is in two different positions.

Abstract: An assembly (1) comprises at least one base plate (2), a counter plate (3) connected thereto, and an electro-optical element (4). The base plate (2) is provided with at least one conductor track (7) for connecting the electro-optical element (4), and with at least one heat transfer element (5) for dissipating heat from the electro-optical element (4). The heat transfer element (5) is a heat-conductive operative connection between the electro-optical element (4) and the counter plate (3).

Abstract: A radiation emitting semiconductor chip may include a radiation emitting surface, an epitaxial semiconductor layer sequence having active regions, and a mounting surface facing the radiation emitting surface. The mounting surface may include a plurality of first and second solderable contact surfaces. Each active region may be suppliable with current with a respective first and second solderable contact surface. The first solderable contact surfaces may be arranged in an inner region of the mounting surface. The second solderable contact surface may be arranged in an edge region of the mounting surface. Furthermore, a radiation emitting semiconductor device and a head lamp having such a semiconductor chip may also be useful.

Abstract: An integrated circuit structure includes a first metal feature formed into a first dielectric layer, a second metal feature formed into a second dielectric layer, the second dielectric layer being disposed on said first dielectric layer, and a via connecting the first metal feature to the second metal feature, wherein a top portion of the via is offset from a bottom portion of the via.

Abstract: A semiconductor device includes a conductive support member, a first semiconductor element, and a second semiconductor element. The conductive support member includes a first die pad and a second die pad separated from each other in a first direction. The first die pad and the second die pad overlap each other when viewed along the first direction. The first die pad has a first main surface mounting the first semiconductor element, and a first back surface opposing the first main surface. The second die pad has a second main surface mounting the second semiconductor element, and a second back surface opposing the second main surface. When viewed along a second direction, a distance in the first direction between the first back surface and the second back surface is larger than a distance in the first direction between the first main surface and the second main surface.

Abstract: A semiconductor module includes a semiconductor device and bus bar. The device includes an insulating substrate, conductive member, switching elements, and first/second input terminals. The substrate has main/back surfaces opposite in a thickness direction, with the conductive member disposed on the main surface. The switching elements are connected to the conductive member. The first input terminal, including a first terminal portion, is connected to the conductive member. The second input terminal, including a second terminal portion overlapping with the first terminal portion in the thickness direction, is connected to the switching elements. The second input terminal is separate from the first input terminal and conductive member in the thickness direction. The bus bar includes first/second terminals. The second terminal, separate from the first terminal in the thickness direction, partially overlaps with the first terminal in the thickness direction.

Abstract: In at least one embodiment, the optoelectronic semiconductor chip comprises a semiconductor layer sequence with a radiation side, a first semiconductor layer of a first conductivity type, an active layer, a second semiconductor layer of a second conductivity type, and a rear side, which are arranged one above the other in this order. The active layer generates or absorbs primary electromagnetic radiation in the intended operation. Further, the optoelectronic semiconductor chip comprises a first contact structure and a second contact structure for electrically contacting the semiconductor layer sequence. The second contact structure is arranged on the rear side and is in electrical contact with the second semiconductor layer. The radiation side is configured for coupling in or coupling out primary radiation into or out of the semiconductor layer sequence. The rear side is structured and includes scattering structures configured to scatter and redirect the primary radiation.

Abstract: A display device includes a first electrode and a second electrode that are spaced apart from and facing each other; a light-blocking layer disposed above the first electrode and the second electrode; and at least one light-emitting element disposed between the first electrode and the second electrode. The light-blocking layer includes a light-blocking portion absorbing light and an opening pattern. The light-blocking portion includes an area partially overlapping the first electrode and the second electrode. The at least one opening pattern exposes portions of the first and second electrodes facing each other and at least a portion of an area between the first and second electrodes facing each other. The at least one light-emitting element overlaps the at least one opening pattern.

Abstract: A semiconductor device of the present disclosure includes: a semiconductor substrate having a first main surface; a first aluminum electrode having a first surface facing the first main surface and a second surface opposite to the first surface, the first aluminum electrode being disposed on the semiconductor substrate; a passivation film that covers a peripheral edge of the second surface and that is provided with an opening from which a portion of the second surface is exposed; and a copper film. The second surface exposed from the opening is provided with a recess that is depressed toward the first surface. The copper film is disposed in the recess.