Patents Examined by Marion McCarmish
  • Patent number: 5951879
    Abstract: A highly reliable semiconductor IC circuit can be produced by this etching method: A resist layer is formed on a polysilicon layer which is formed on a silicon dioxide layer on a silicon substrate. The resist layer is used as a mask, and silicon oxide layer deposits thereon while polysilicon layer is being etched. Carbon emission out of the resist layer is thus restrained, and thereby a selectivity, an etching speed ratio of polysilicon layer vs. silicon dioxide layer, is substantially raised.
    Type: Grant
    Filed: April 12, 1996
    Date of Patent: September 14, 1999
    Assignee: Matsushita Electronics Corporation
    Inventors: Kyoko Miyamoto, Satoshi Nakagawa
  • Patent number: 5885269
    Abstract: A diaper construction is provided with an external porous reinforcement strip at the front part of the outside of the diaper, which strip provides reinforcement against an adhesive fastening tab and provides an oil-contamination tolerant adhesion surface.
    Type: Grant
    Filed: December 18, 1996
    Date of Patent: March 23, 1999
    Assignee: Minnesota Mining and Manufacturing Co.
    Inventors: Charles E. Boyer, III, Robert J. Kinney, Ramsis Gobran, Ruben E. Velasquez Urey, Roland R. Midgley