Abstract: Provided are a computer program product, system, and method for determining tracks to prestage into cache from a storage. Information is provided related to determining tracks to prestage from the storage to the cache in a stage group of sequential tracks including a trigger track comprising a track number in the stage group at which to start prestaging tracks and Input/Output (I/O) activity information to a machine learning module. A new trigger track in the stage group at which to start prestaging tracks is received from the machine learning module having processed the provided information. The trigger track is set to the new trigger track. Tracks are prestaged in response to processing an access request to the trigger track in the stage group.

Abstract: Trace recording based on data influxes to an outer-level cache and cache coherence protocol (CCP) transitions between inner caches. Example computing device(s) include a plurality of processing units, a plurality of (N-1)-level caches, and an N-level cache that is associated with two or more of the (N-1)-level caches and that is a backing store for the two or more (N-1)-level caches. Based at least on detecting influx(es) of data to a location in the N-level cache during execution across the processing units, the computing device(s) causes the influx(es) of data to be logged. The computing device(s) also causes one or more (N-1)-level CCP transitions between the two or more (N-1)-level caches to be logged. The (N-1)-level CCP transitions result from the location being accessed by two or more of the processing units.

Abstract: A partition command from one of a plurality of write partition command queues or a plurality of read partition command queues is received. The received partition command is issued to a command processor of the sequencer component to be applied to one of the one or more memory devices. Responsive to receiving the partition command of the plurality of write partition command queues, whether a timeout threshold criterion pertaining to the plurality of read partition command queues is satisfied is determined. Responsive to determining that the timeout threshold criterion pertaining to the plurality of read partition command queues is not satisfied, whether a write threshold criterion pertaining to the plurality of write partition command queues is satisfied is determined.

Abstract: Disclosed are systems and methods for providing read-modify-writes during relocation of overlapping of logical blocks. A method includes receiving a host write command from a host interface. The method also includes translating a logical block address for the host write command to a physical address on a device memory. The physical address corresponds to a plurality of indirection units. The method also includes, in accordance with a determination that the physical address does not correspond to an aligned address, processing a read-modify-write operation for one or more indirection units of the plurality of indirection units during a relocation, in accordance with a determination that a relocation block has an overlapping indirection unit with the one or more indirection units.

Abstract: A nonvolatile memory device comprising: a first block comprising multiple single level cells (SLCs), a second block comprising multiple multi-level cells (MLCs), and an operation controller is suitable to perform, in response to a read command applied from an outside: a read operation using an SLC method on first data stored in the first block or a read operation using an MLC method on second data stored in the second block in a normal mode, and a read operation using the MLC method on the first data or a read operation using the SLC method on the second data in a protection mode.

Abstract: A system includes one or more memory devices storing instructions, and one or more processors configured to execute the instructions to perform steps of a method for providing customer data access during a migration process. The system may initiate a transfer of customer data from a source data server to a system platform and transfer a subset of the customer data to a temporary data storage. The system may modify the temporary copy of customer data and generate an instruction to modify the permanent copy of customer data. In response to the completion of the transfer of customer data from the source data server to the system mainframe, the system may then transfer and execute the instruction to modify the permanent copy of customer data.

Abstract: A memory system includes a non-volatile memory in which data is stored in a plurality of pages including a first page and a second page and a memory controller. The controller is configured to perform a first write operation on the first page at a first time, perform a second write operation on the second page at a second time after the first time, perform a first read operation on the first page at a time after the first time using a first parameter and store a first index value in association with the first page and the first parameter, and determine a second parameter for a second read operation to be performed on the second page using a time difference between the first time and the second time and the first index value stored in association with the first page.

Abstract: Worker threads allocate at least some recycled cache slots of a local portion of a shared memory to the compute node to which the memory portion is local. More specifically, the recycled cache slots are allocated prior to receipt of the IO that the recycled cache slot will be used to service. The allocated recycled cache slots are added to primary queues of each compute node. If a primary queue is full then the worker thread adds the recycled cache slot, unallocated, to a secondary queue. Cache slots in the secondary queue can be claimed by any compute node associated with the shared memory. Cache slots in the primary queue can be used by the local compute node without sending test and set messages via the fabric that interconnects the compute nodes, thereby improving IO latency.

Abstract: A method for performing data access management of a memory device with aid of randomness-property control and associated apparatus are provided. The method may include: receiving a plurality of host commands from a host device and performing data access on the NV memory according to the plurality of host commands, for example, in response to at least one host write command, programming data into at least one single level cell (SLC) block to be first stored data corresponding to a data reception stage; and performing a seed-aware garbage collection (GC) procedure to collect valid data among the first stored data of the at least one SLC block into at least one non-SLC block to be second stored data corresponding to a data storage stage, for example, performing a randomness-property checking operation on multiple seeds to selectively determine respective data of multiple pages within the SLC block as target data.

Abstract: Example implementations described herein are directed to a method and a system for storage allocation from a storage pool, the method involving, for receipt of a request for storage through an orchestrator communicatively coupled to a management system managing the storage pool, the request comprising user information and request characteristics information, the request characteristics information indicative of a use type for the request, determining a storage tier from the storage pool for the request based on the user information and the request characteristics information; and allocating a pool name and the storage tier in response to the request.

Abstract: A storage system and an operating method thereof are disclosed. The storage system includes a nonvolatile memory that stores data; a computing device to perform data processing on input data provided from the nonvolatile memory or a host outside the storage system; and a controller to control a writing operation and a reading operation of the nonvolatile memory, monitor an operating state of the computing device while the computing device is performing the data processing, and dynamically manage power of the computing device according to a monitoring result.

Abstract: A method of programming data to a storage device including a nonvolatile memory device includes receiving first to third barrier commands from a host, receiving first to third data corresponding to the first to third barrier commands from the host, merging the first and second barrier commands and programming the first and second data to the nonvolatile memory device sequentially based on an order of the first and second barrier commands, verifying program completion of both the first and second data, mapping in mapping information of the first and second data when the programming of the first and second data is completed, and mapping out the information of both the first and second data when the programming of at least one of the first and second data is not complete, and programming the third data to the nonvolatile memory device after the mapping in or the mapping out.

Abstract: Examples of the present disclosure generally relate to integrated circuits, such as a system-on-chip (SoC), that include a memory subsystem. In some examples, an integrated circuit includes a first master circuit in a first power domain on a chip; a second master circuit in a second power domain on the chip; and a first memory controller in a third power domain on the chip. The first master circuit and the second master circuit each are configured to access memory via the first memory controller. The first power domain and the second power domain each are separate and independent from the third power domain.

Abstract: A garbage data scrubbing method includes obtaining an input/output (IO) busy/idle status of a terminal at a current moment, where the IO busy/idle status includes a busy state and an idle state. When the IO busy/idle status of the terminal at the current moment is the idle state, a discard message is delivered to a storage device, where the discard message includes an initial address and a size of to-be-scrubbed physical space in the storage device, and where the discard message is used to unbind a mapping relationship between a physical address of the to-be-scrubbed physical space and a corresponding logical address.

Abstract: A system and a method are disclosed that efficiently supports an append operation in an object storage system. A size of data received with a request for an append operation from an application is determined based on a data-alignment characteristic of a storage medium. Data that is not aligned with the data-alignment characteristic is stored in persistent memory and aggregated with other data from the application that is not aligned with the data-alignment characteristic, while data that is aligned with the data-alignment characteristic is stored directly in the storage medium. Aggregated data that becomes aligned with the data-alignment characteristic as additional requests for append operations are received are migrated to the storage medium.

Abstract: A system for managing storage of data in composed information handling systems includes a system control processor manager that identifies a compute resource set having compute resources specified by a composition request, identifies a hardware resource set having hardware resources specified by the composition request including a local data processor that services writes using a local device and a remote device, sets up storage management services for managing writes of data to the hardware resource set using a control resource set and the compute resource set to obtain logical hardware in which the local data processor preferentially services writes of the data using the local device rather than the remote device, and presents the logical hardware resources using the control resource set to the compute resource set as bare metal resources to instantiate a composed information handling system to service the composition request.

Abstract: A method to determine an extreme value of a plurality of data candidates includes storing each data candidate of a plurality of data candidates in a separate column of an associative memory, initializing a row of marker bits by setting each marker bit to a value of 1, computing a subsequent row of marker bits by performing in parallel a Boolean AND operation between a previous row of marker bits and a row of bits of the data candidates, starting with the row of most significant bits of the data candidates, performing a Boolean OR operation between the marker bits in the subsequent row of marker bits to generate a subsequent RSP value, identifying the extreme value from among the plurality of data candidates when there is only one marker bit having a value of 1 in the subsequent row of marker bits coinciding with when said subsequent RSP value is a 1, and if the identifying is false, repeating the computing on a row of next most significant bits, performing and identifying until the identifying is true.

Abstract: A method begins by a processing module of a storage network analyzing storage network memory for a level of usability and based on the analyzing, selecting alternative memory available for receipt of encoded data slices stored in current memory, where a data object is segmented into a plurality of data segments and a data segment of the plurality of data segments is dispersed error encoded in accordance with dispersed error encoding parameters to produce a set of encoded data slices. The method continues with the processing module determining whether to move encoded data slices from current memory to alternative memory and based on a determination to move slices, allocating alternative memory. Finally, the processing module moves at least some encoded data slices from a current memory to alternate memory and updates a memory assignment mechanism for the at least some encoded data slices.

Abstract: Provided are a computer program product, system, and method for determining tracks to prestage into cache from a storage. Information is provided related to determining tracks to prestage from the storage to the cache in a stage group of sequential tracks including a trigger track comprising a track number in the stage group at which to start prestaging tracks and Input/Output (I/O) activity information to a machine learning module. A new trigger track in the stage group at which to start prestaging tracks is received from the machine learning module having processed the provided information. The trigger track is set to the new trigger track. Tracks are prestaged in response to processing an access request to the trigger track in the stage group.

Abstract: There are provided a memory system and an operating method thereof. The memory system includes: a memory device for storing data in a program operation, and reading stored data and temporarily store the read data in a read operation; and a controller for transmitting data to the memory device, wherein the controller includes: a flash direct memory access (DMA) for reading and outputting the data temporarily stored in the memory device in the read operation; a buffer memory for storing the data output from the flash DMA; and a host DMA for reading the data stored in the buffer memory and outputting the read data to a host, wherein a first operation of storing the data temporarily stored in the memory device in the buffer memory and a second operation of outputting the data stored in the buffer memory to the host are performed in parallel.