Patents Examined by Minh Dinh
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Patent number: 11972794Abstract: An electronic device includes a substrate and a layer of superconducting material disposed over the substrate. The layer of superconducting material includes a first wire and a loop that is (1) distinct and separate from the first wire and (ii) capacitively coupled to the first wire while the loop and the first wire are in a superconducting state.Type: GrantFiled: October 17, 2022Date of Patent: April 30, 2024Assignee: PSIQUANTUM CORP.Inventor: Faraz Najafi
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Patent number: 11972806Abstract: The memory device includes a memory block with a plurality of memory cells, which are programmed to multiple bits per memory cell, arranged in a plurality of word lines. Control circuitry is provided and is configured to read the memory cells of a selected word line. The control circuitry separates the memory cells of the selected word line into a first group of memory cells, which are located on a side of the word line are near a voltage driver, and a second group of memory cells, which are located on an opposite side of the word line from the voltage driver. The control circuitry reads the memory cells of the first group using a first read mode and reads the memory cells of the second group using a second read mode that is different than the first read mode to reduce a fail bit count during read.Type: GrantFiled: June 10, 2022Date of Patent: April 30, 2024Assignee: SanDisk Technologies, LLCInventors: Jiacen Guo, Xiang Yang
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Patent number: 11966475Abstract: A method includes accessing an input representing a software component list for a software product. The software component list contains information for a given software component. The method includes accessing a knowledge base to determine security level parameters and trust parameters for the given software component based on the information. A security level of the given software component is determined based on an evaluation of the security level parameters. A trust of a source of the given software component is determined based on an evaluation of the trust parameters. The method includes determining a security context of the software product. Based on the security level, the trust and the security context, the method includes providing a recommendation for the given software component.Type: GrantFiled: October 26, 2020Date of Patent: April 23, 2024Assignee: Hewlett Packard Enterprise Development LPInventors: Suhas Shivanna, Matthew Yang, Craig Rubin
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Patent number: 11956364Abstract: A settlement processing device, which is an example of an information processing device, includes an acquisition unit, a verification unit, and a providing unit. The acquisition unit acquires, from a user terminal used by a user who is a request source for a service, proof information that is for proving, by zero knowledge proof, that a user is an identity verified user, and that is generated by using secret information that only the identity verified user is allowed to know. A verification unit executes a verification process of proof information acquired by an acquisition unit by using encrypted information of identity verification information used in an identity verification process of the identity verified user managed in a block chain system, where the encrypted information is encrypted using secret information.Type: GrantFiled: May 29, 2020Date of Patent: April 9, 2024Assignee: SONY GROUP CORPORATIONInventors: Shinya Maruyama, Yuichi Kageyama
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Patent number: 11934524Abstract: Herein disclosed are approaches for protecting sensitive information within a fingerprint authentication system that can be snooped and utilized to access the device, secured information, or a secured application. The approaches can utilize encryption keys and hash functions that are unique to the device in which the fingerprint authentication is being performed to protect the sensitive information that can be snooped.Type: GrantFiled: June 19, 2020Date of Patent: March 19, 2024Assignee: Analog Devices, Inc.Inventors: Patrick Riehl, Tze Lei Poo
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Patent number: 11923021Abstract: A memory sub-system to receive a request to execute a read operation associated with data of a memory unit of a memory sub-system. A time after program associated with the data is determined. A temperature level associated with the memory unit is determined. Based on the time after program and the temperature level, a set of read offset values to apply in executing the read operation is determined. The read operation is executed using the set of read offset values.Type: GrantFiled: January 5, 2023Date of Patent: March 5, 2024Assignee: Micron Technology, Inc.Inventors: Kishore Kumar Muchherla, Vamsi Pavan Rayaprolu, Larry J. Koudele
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Patent number: 11925014Abstract: A method of forming an apparatus comprises forming pillar structures extending from a base material. Upper portions of the pillar structures may exhibit a lateral width that is relatively greater than a lateral width of lower portions of the pillar structures. The method also comprises forming access lines laterally adjacent to the lower portions of the pillar structures and forming digit lines above upper surfaces of the pillar structures. Memory devices and electronic systems are also described.Type: GrantFiled: December 8, 2021Date of Patent: March 5, 2024Assignee: Micron Technology, Inc.Inventors: Song Guo, Sanh D. Tang, Shen Hu, Yan Li, Nicholas R. Tapias
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Patent number: 11921645Abstract: The present disclosure includes systems and methods for securing data direct I/O (DDIO) for a secure accelerator interface, in accordance with various embodiments. Historically, DDIO has enabled performance advantages that have outweighed its security risks. DDIO circuitry may be configured to secure DDIO data by using encryption circuitry that is manufactured for use in communications with main memory along the direct memory access (DMA) path. DDIO circuitry may be configured to secure DDIO data by using DDIO encryption circuitry manufactured for use by or manufactured within the DDIO circuitry. Enabling encryption and decryption in the DDIO path by the DDIO circuitry has the potential to close a security gap in modern data central processor units (CPUs).Type: GrantFiled: September 16, 2022Date of Patent: March 5, 2024Assignee: Intel CorporationInventors: Siddhartha Chhabra, Prashant Dewan, Abhishek Basak, David M. Durham
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Patent number: 11909883Abstract: A method for identification and authentication of objects includes providing a central electronic system, including a database; providing at least one electronic user device; and providing one or more physical entities, each physical entity being equipped with a message reception and transmission system comprising a secure chipset storing digital identifiers and encryption keys of said physical entity. The at least one user device interrogates the central electronic system in order to receive authentication data of one or more of the physical entities, entered in said database. In reply, the at least one user device receives the authentication data and sends authentication request messages to the one or more physical entities.Type: GrantFiled: June 29, 2021Date of Patent: February 20, 2024Assignee: Krupteia S.R.L.Inventor: Alessandro Capuzzello
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Patent number: 11909862Abstract: A method including configuring, by an infrastructure device, a first device to determine a symmetric sharing encryption key based at least in part on a content access private key of a content access key pair associated with encrypted content and an assigned public key associated with a second device; configuring, by the infrastructure device, the first device to encrypt the content access private key of the content access key pair associated with the encrypted content utilizing the sharing encryption key; and configuring, by the infrastructure device, the first device to transmit the encrypted content access private key to enable the second device to access the encrypted content is disclosed. Various other aspects are contemplated.Type: GrantFiled: April 5, 2023Date of Patent: February 20, 2024Assignee: UAB 360 ITInventor: Mindaugas Valkaitis
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Patent number: 11902412Abstract: Described herein are systems and methods that prevent against fault injection attacks. In various embodiments this is accomplished by taking advantage of the fact that an attacker cannot utilize a result that has been faulted to recover a secret. By using infective computation, an error is propagated in a loop such that the faulted value will provide to the attacker no useful information or information from which useful information may be extracted. Faults from a fault attack will be so large that a relatively large number of bits will change. As a result, practically no secret information can be extracted by restoring bits.Type: GrantFiled: May 26, 2022Date of Patent: February 13, 2024Assignee: Maxim Integrated Products, Inc.Inventors: Jeremy Dubeuf, Yann Yves Rene Loisel, Frank Lhermet
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Patent number: 11899761Abstract: The present invention extends to methods, systems, and computer program products for identifying and consenting to permissions for workflow and code execution. Aspects of the invention can be used to automatically scan a workflow or code definition to identify (potentially all) the actions/triggers a workflow or program intends to perform on behalf of a user. The user is shown the actions/triggers the workflow or program intends to perform (e.g., at a user interface) before consent to perform the actions/triggers is granted. As such, a user is aware of intended actions/triggers of a workflow or program before granting consent. Further, since actions/triggers are identified from the workflow or code definition (and not formulated by an author), permission requests better align with permissions that workflow or program functionality actually uses during execution.Type: GrantFiled: May 26, 2022Date of Patent: February 13, 2024Assignee: MICROSOFT TECHNOLOGY LICENSING, LLCInventors: Sunay Vaishnav, Merwan Vishnu Hade, Stephen Christopher Siciliano, David Nissimoff, Fnu Anubhav
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Patent number: 11887661Abstract: Methods, systems, and devices for a cross-point pillar architecture for memory arrays are described. Multiple selector devices may be configured to access or activate a pillar within a memory array, where the selector devices may each be or include a chalcogenide material. A pillar access line may be coupled with multiple selector devices, where each selector device may correspond to a pillar associated with the pillar access line. Pillar access lines on top and bottom of the pillars of the memory array may be aligned in a square or rectangle formation, or in a hexagonal formation. Pillars and corresponding selector devices on top and bottom of the pillars may be located at overlapping portions of the pillar access lines, thereby forming a cross point architecture for pillar selection or activation. The selector devices may act in pairs to select or activate a pillar upon application of a respective selection voltage.Type: GrantFiled: January 10, 2022Date of Patent: January 30, 2024Assignee: Micron Technology, Inc.Inventors: Innocenzo Tortorelli, Fabio Pellizzer, Mattia Robustelli, Alessandro Sebastiani
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Patent number: 11888850Abstract: A communal computing device, such as an interactive digital whiteboard, can become unlocked if a user is near the device. The communal computing device may use a sensor such as a camera to capture images of a person and obtain an identifier from a personal device such as a smartphone. A cloud-based provider that is trusted by both the communal computing device and the personal device may associate both the image and the identifier of the personal device with the same user identity. Obtaining the user identity from multiple, different sources provides a secure technique for the communal computing device to recognize a user without the user directly interacting with the communal computing device. If the sensor no longer detects the user or the personal device is no longer detected, then the communal computing device may log off the user. The personal device may be used to confirm log off.Type: GrantFiled: June 22, 2022Date of Patent: January 30, 2024Assignee: Microsoft Technology Licensing, LLCInventors: Raju Jain, Dipesh Bhattarai, Peter Gregory Davis, Jeffrey Johnson, Liang Zhang, Kiran Kumar
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Patent number: 11888996Abstract: This disclosure describes, in part, techniques for provisioning components. For instance, a component may be initially provisioned by a first system. To initially provision the component, the component may receive first data representing a uniform device type, a device identifier, a serial number, and/or a first certificate chain. The component may then store the first data in memory. Additionally, the component may be provisioned using a second system. To provision the component, the component may receive second data representing a product device type, a code, and a second certification chain. The second data received during the second provisioning may be associated with one more capabilities of a device. The component may then store the second data in the memory.Type: GrantFiled: January 6, 2023Date of Patent: January 30, 2024Assignee: Amazon Technologies, Inc.Inventors: Umesh Simkhada, Brandon Whitehead, Parthik Pradipkumar Teli, Thomas Gregory Hinman, David Isbister, Alejandro Steckler
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Patent number: 11881259Abstract: A neuromorphic device including an electrode including a first terminal connected to a bit line through a write drive transistor and a second terminal connected to a source line, a plurality of unit weighting elements having different resistance values, each of the unit weighting elements including a free layer arranged on the top of the electrode, a tunnel barrier layer arranged on the top of the free layer, and a fixed layer arranged on the top of the tunnel barrier layer, and corresponding to each bit of a synapse weight, and a plurality of control electrodes connected to the bit line through a plurality of read drive transistors, respectively, a control voltage being applied between the free layer and the fixed layer of each of the plurality of unit weighting elements through each of the plurality of control electrodes.Type: GrantFiled: April 14, 2022Date of Patent: January 23, 2024Assignee: KOREA INSTITUTE OF SCIENCE AND TECHNOLOGYInventor: Seung Heon Baek
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Patent number: 11876792Abstract: A mobile communication device includes a wireless local Access Network (WLAN) module, a personal area network (PAN) module, a timing module, a memory, an authentication module operably coupled to the WLAN module, the PAN module, the timing module and the memory and a processing module operably coupled to the authentication module. The WLAN module is configured to transmit a licensing request message to an authentication server and receive a licensing request response from the authentication server, while the personal area network (PAN) module is configured to receive a time limited licensing request message from a client computer and transmit a licensing request response to the client computer. The processing module is configured to control at least a portion of an authentication process executed on the authentication module.Type: GrantFiled: May 21, 2021Date of Patent: January 16, 2024Assignee: IHEARTMEDIA MANAGEMENT SERVICES, INC.Inventors: David C. Jellison, Jr., Philippe Generali
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Patent number: 11875041Abstract: A semiconductor device of an embodiment includes a seed generator circuit configured to generate a seed from inputted data by using first random number sequence data generated by an XorShift circuit; and a random number generator circuit configured to receive the seed as input to generate second random number sequence data by a second XorShift circuit.Type: GrantFiled: November 16, 2022Date of Patent: January 16, 2024Assignee: Kioxia CorporationInventors: Tsuyoshi Atsumi, Yasuhiko Kurosawa
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Patent number: 11874948Abstract: Methods, non-transitory computer readable media, and verifier and/or prover devices or query verification apparatuses are disclosed that generate a first commitment from received data and send the received data to a prover device for insertion into a table of a database. A query result and an overall proof are received from the prover device in response to a received query forwarded to the prover device and associated with the database table. The overall proof is generated from one or more partial proofs comprising one or more commitments generated from one or more intermediate values. The query result and an indication the query result was verified are returned in response to the received query after verifying the query result based on a second commitment to the query result generated using the first commitment and the overall proof.Type: GrantFiled: December 12, 2022Date of Patent: January 16, 2024Assignee: SPACE AND TIME LABS, INC.Inventors: Jay Thomas White, Scott Edward Daly Dykstra
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Patent number: 11875831Abstract: A controller of a non-volatile memory detects errors in data read from a particular physical page of the non-volatile memory. Based on detecting the errors, the controller performs a read voltage threshold calibration for a page group including the particular physical page and a multiple other physical pages. Performing the read voltage threshold calibration includes calibrating read voltage thresholds based on only the particular physical page of the page group. After the controller performs the read voltage threshold calibration, the controller optionally validates the calibration. Validating the calibration includes determining whether bit error rates diverge within the page group and, if so, mitigating the divergence. Mitigating the divergence includes relocating data from the page group to another block of the non-volatile memory.Type: GrantFiled: December 27, 2021Date of Patent: January 16, 2024Assignee: International Business Machines CorporationInventors: Roman Alexander Pletka, Radu Ioan Stoica, Nikolas Ioannou, Nikolaos Papandreou, Charalampos Pozidis, Timothy J. Fisher, Aaron Daniel Fry