Abstract: In method of manufacturing a semiconductor device, a source/drain epitaxial layer is formed, one or more dielectric layers are formed over the source/drain epitaxial layer, an opening is formed in the one or more dielectric layers to expose the source/drain epitaxial layer, a first silicide layer is formed on the exposed source/drain epitaxial layer, a second silicide layer different from the first silicide layer is formed on the first silicide layer, and a source/drain contact is formed over the second silicide layer.

Abstract: Disclosed are a white organic light emitting element, which may uniformize the color coordinates of white regardless of a change in current density by changing the configuration of different kinds of light emitting layers contacting each other, and a display device using the same.

Abstract: A packaged semiconductor chip includes a semiconductor sub strate having formed thereon: radio-frequency (RF) input and output contact pads, DC contact pads, and first and second amplifier stages. An input of the first amplifier stage is coupled with the RF input contact pad. An input and an output of the second amplifier stage are respectively coupled to an output of the first amplifier stage and the RF output contact pad. The DC contact pads and the input of the first amplifier stages are connected via an input bias coupling path. The outputs of the amplifier stages are connected via an output bias coupling path. The chip further includes a lead frame having RF input and output pins electrically coupled to the RF input and output contact pads, and input bias pins electrically coupled to the DC contact pad.

Abstract: An organic light emitting display device and a method for manufacturing the same are disclosed. The organic light emitting display device includes a substrate divided into an emission area and a non-emission area, an overcoat layer disposed on the substrate and including a plurality of micro lenses in the emission area, a first electrode disposed on the overcoat layer and disposed in the emission area, an organic emission layer disposed on the substrate and having at least one layer which is flatly formed in the emission area, and a second electrode disposed on the organic emission layer.

Abstract: A device comprising a gate pad, a source pad and a passive actuator arranged to form a reversible mechanical and electrical connection between the gate pad and the source pad only if the temperature in the passive actuator exceeds a threshold value.

Abstract: Discussed is an organic light emitting device in which a light emitting layer includes a host and different kinds of dopants, the fluorescent dopant is formed of a material having energy level properties facilitating thermally activated delayed fluorescence (TADF), and thus energy is concentratedly transferred to the fluorescent dopant so as to increase luminous efficacy of a single color.

Abstract: A display device includes a display panel and an integrated circuit chip configured with a plurality of first bonding terminals spaced apart from each other. The display panel is provided with a plurality of second bonding terminals, and a first insulating layer is disposed between the first bonding terminals and the second bonding terminals. A plurality of electrically conductive particles are provided on the second bonding terminals and penetrate the first insulating layer so that the electrically conductive particles are in contact with the first bonding terminals.

Abstract: A package structure and method of forming the same are provided. The package structure includes a polymer layer, a redistribution layer, a die, and an adhesion promoter layer. The redistribution layer is disposed over the polymer layer. The die is sandwiched between the polymer layer and the redistribution layer. The adhesion promoter layer, an oxide layer, a through via, and an encapsulant are sandwiched between the polymer layer and the redistribution layer. The encapsulant is laterally encapsulates the die. The through via extends through the encapsulant. The adhesion promoter layer and the oxide layer are laterally sandwiched between the through via and the encapsulant. A bottom portion of the encapsulant is longitudinally sandwiched between the adhesion promoter layer and the polymer layer.

Abstract: Embodiments of a glass wafer for semiconductor fabrication processes are described herein. In some embodiments, a glass wafer includes: a glass substrate comprising: a top surface, a bottom surface opposing the top surface, and an edge surface between the top surface and the bottom surface; a first coating disposed atop the glass substrate, wherein the first coating is a doped crystalline silicon coating having a sheet-resistance of 100 to 1,000,000 ohm per square; and a second coating having one or more layers disposed atop the glass substrate, wherein the second coating comprises a silicon containing coating, wherein the glass wafer has an average transmittance (T) of less than 50% over an entire wavelength range of 400 nm to 1000 nm.

Abstract: Electronic devices comprising a doped dielectric material adjacent to a source contact, tiers of alternating conductive materials and dielectric materials adjacent to the doped dielectric material, and pillars extending through the tiers, the doped dielectric material, and the source contact and into the source stack. Related methods and electronic systems are also disclosed.

Abstract: A device includes a thinned semiconductor substrate having a first side and a second side opposite to the first side; and at least one radio frequency device at the first side, wherein the second side of the thinned semiconductor substrate is processed to reduce leakage currents or to improve a radio frequency linearity of the at least one radio frequency device through Bosch etching.

Abstract: A mesa portion is formed on a substrate. An insulating film including an organic layer is disposed on the mesa portion. A conductor film is disposed on the insulating film. A cavity provided in the organic layer has side surfaces extending in a first direction. A shorter distance out of distances in a second direction perpendicular to the first direction from the mesa portion to the side surfaces of the cavity in plan view is defined as a first distance. A shorter distance out of distances in the first direction from the mesa portion to side surfaces of the cavity in plan view is defined as a second distance. A height of a first step of the mesa portion is defined as a first height. At least one of the first distance and the second distance is greater than or equal to the first height.

Abstract: A micro light-emitting diode is provided. The micro light-emitting diode includes a first-type semiconductor layer having a first doping type; a light-emitting layer over the first-type semiconductor layer; a first-type electrode over the first-type semiconductor layer; a second-type semiconductor layer having a second doping type over the light-emitting layer, wherein the second doping type is different from the first doping type; a second-type electrode over the second-type semiconductor layer; and a barrier layer under the first-type semiconductor layer and away from the first-type electrode and the second-type electrode, wherein the barrier layer includes a doped region having the second doping type.

Abstract: The present technology provides a semiconductor device. The semiconductor device includes a stack including insulating patterns and conductive patterns stacked alternately with each other, a channel layer including a first channel portion protruding out of the stack and a second channel portion in the stack, and passing through the stack, and a conductive line surrounding the first channel portion, and the first channel portion includes metal silicide.

Abstract: A semiconductor device is provided. The semiconductor device includes: a substrate and first gate structures and source/drain doped layers on the substrate. Each of the source/drain doped layers is located at two sides of one first gate structure. The semiconductor device further includes a dielectric layer on the substrate. The dielectric layer contains first grooves, exposing the source/drain doped layers, wherein each first groove includes a first-groove bottom part and a first-groove top part located above the first-groove bottom part, and a size of the first-groove top part is larger than a size of the first-groove bottom part. The semiconductor device further includes a first conductive structure located in the first-groove bottom part, an insulating layer located in the first-groove top part and on the first conductive structure, and a second conductive structure located in the dielectric layer and connected to the first gate structure.

Abstract: Some embodiments include apparatuses and methods forming the apparatuses. One of the apparatuses includes a first transistor including a first channel region, and a charge storage structure separated from the first channel region; a second transistor including a second channel region formed over the charge storage structure; and a data line formed over and contacting the first channel region and the second channel region, the data line including a portion adjacent the first channel region and separated from the first channel region by a dielectric material.

Abstract: Disclosed herein are a white organic light-emitting device. The white organic light-emitting device enables an overall improvement in characteristics such as color temperature, efficiency, luminance, and service life, by changing the configuration of different types of emission layers in contact with each other, and a display device using the same.

Abstract: Disclosed herein are quantum dot devices, as well as related computing devices and methods. For example, in some embodiments, a quantum dot device may include: a quantum well stack; a first gate above the quantum well stack, wherein the first gate includes a first gate metal and a first gate dielectric; and a second gate above the quantum well stack, wherein the second gate includes a second gate metal and a second gate dielectric, and the first gate is at least partially between a portion of the second gate and the quantum well stack.

Abstract: Discussed are a light-emitting device and a light-emitting display device having improved efficiency and increased lifespan. A plurality of stacks is provided between an anode and a cathode for at least a subpixel to emit a predetermined color, and emissive layers in different stacks include the same color-based materials having different luminous properties.

Abstract: The first region (RG1) contains a first organic material and a metal compound (a compound containing a metal element). The second region (RG2) contains the first organic material and the metal compound. The average intensity of the SIMS profile of the metal element in the second region (RG2) can be lower than the average intensity of the SIMS profile of the metal element in the first region (RG1). Specifically, the average intensity of the SIMS profile of the metal element in the second region (RG2) can be lower than 10%, preferably lower than 1.0%, of the average intensity of the SIMS profile of the metal element in the first region (RG1).