Abstract: A semiconductor device according to the present invention includes a first conductive-type semiconductor layer, a second conductive-type base region that is arranged in the front surface portion of the semiconductor layer, a plurality of trenches that extend from a front surface of the semiconductor layer beyond a bottom portion of the base region with an active region being defined therebetween, a plurality of first conductive-type emitter regions that are arranged in the active region, each connecting the trenches adjacent to each other, a gate electrode that is embedded in the trench, an embedding insulating film that is embedded in the trench on the gate electrode and that has an upper surface in the same height position as the front surface of the semiconductor layer or in a height position lower than the front surface and an emitter electrode that covers the active region and the embedding insulating film and that is electrically connected to the base region and the emitter region.
Abstract: An organic light-emitting display device with improved light efficiency includes a plurality of pixel electrodes each corresponding one of at least a first, second, or third pixel; a pixel-defining layer covering an edge and exposing a central portion of the pixel electrodes; an intermediate layer over the pixel electrode and including an emission layer; an opposite electrode over the intermediate layer; and a lens layer over the opposite electrode and including a plurality of condensing lenses each having a circular lower surface. An area of the portion of the pixel electrode exposed by the pixel-defining layer is A, and an area of the lower surface of the condensing lens is B. For the first pixel, a ratio B/A ranges from about 1.34 to about 2.63. For the second pixel, B/A ranges from about 1.43 to about 3.00, For the third pixel, B/A ranges from about 1.30 to about 2.43.
Type:
Grant
Filed:
January 31, 2019
Date of Patent:
July 14, 2020
Assignee:
Samsung Display Co., Ltd.
Inventors:
Sungkook Park, Minwoo Kim, Woongsik Kim
Abstract: A qualification apparatus for a photonic chip on a wafer that leaves undisturbed an edge coupler that provides an operating port for the photonic devices or circuits on the chip during normal operation in order to not introduce extra loss in the optical path of the final circuit. The qualification apparatus provides an optical path that is angled with regard to the surface of the chip, for example by using a grating coupler. The qualification apparatus can be removed after the chip is qualified. Optionally, the qualification apparatus can be left in communication with the chip and optionally employed as an input port for the chip after the chip has been separated from other chips on a common substrate.
Type:
Grant
Filed:
September 21, 2015
Date of Patent:
July 23, 2019
Assignee:
Elenion Technologies, LLC
Inventors:
Ari Novack, Matthew Akio Streshinsky, Michael J. Hochberg
Abstract: A method of arranging a diamagnetic rod includes levitating a diamagnetic rod above a contact line at which a first magnet contacts a second magnet, the first magnet and the second magnet having diametric magnetization in a direction perpendicular to the contact line.
Type:
Grant
Filed:
August 16, 2013
Date of Patent:
November 25, 2014
Assignee:
International Business Machines Corporation
Abstract: A technique for more efficiently forming conductive elements, such as conductive layers and electrodes, using chemical vapor deposition. A conductive precursor gas, such as a platinum precursor gas, having organic compounds to improve step coverage is introduced into a chemical vapor deposition chamber. A reactant is also introduced into the chamber that reacts with residue organic compounds on the conductive element so as to remove the organic compounds from the nucleating sites to thereby permit more efficient subsequent chemical vapor deposition of conductive elements.