Abstract: A ferroelectric thin film capacitor has smooth electrodes permitting comparatively stronger polarization, less fatigue, and less imprint, as the ferroelectric capacitor ages. The smooth electrode surfaces are produced by DC reactive sputtering.
Type:
Grant
Filed:
August 3, 1998
Date of Patent:
April 1, 2003
Assignee:
Matsushita Electric Industrial Co., Ltd.
Abstract: A method of forming non-volatile memory (e.g., an EEPROM device) and a CMOS device (e.g., a RAM), on a single die or chip, and a structure formed by the method. In one embodiment, the control gate of the storage transistor as well as the isolation gate of the isolation transistor may be formed during the same manufacturing process step, and thus may be formed of the same gate poly material and may have similar thickness.
Abstract: Anode and cathode regions at a principal surface of a semiconductor substrate have the same characteristics as source and drain regions of a P type MOS transistor. A cathode region is superposed partially on the anode region at the principal surface of the semiconductor substrate, the cathode region having the same characteristics as source and drain regions of an N type MOS transistor. The cathode and anode regions form a Zener diode. The Zener diode may be short-circuited by a large current flow, i.e., zapping, or used as a voltage regulator.