Patents Examined by P. Hassonzadeh
  • Patent number: 6339028
    Abstract: An improved vacuum plasma etching device for plasma etching semiconductor wafers that have a photo-resist pattern. The improved plasma etching device has a reaction chamber in which the plasma etching is performed during a process cycle, an entrance vacuum loadlock for holding the next semiconductor wafer to be plasma etched, an exit vacuum loadlock for transporting the semiconductor wafers out of the reaction chamber after the plasma etching process, and a source of ultraviolet light. Exposing the semiconductor wafer to the ultraviolet light cures the photo-resist patterns, thereby improving CD dispersion, enhancing pattern transfer, and preventing photo-resist reticulation. Curing the photo-resist patterns while the semiconductor wafer is being held during the process cycle in the entrance vacuum loadlock, increases efficiency and productivity.
    Type: Grant
    Filed: April 27, 1999
    Date of Patent: January 15, 2002
    Assignee: STMicroelectronics, Inc.
    Inventor: Mark R. Tesauro
  • Patent number: 6270622
    Abstract: The invention provides a process and apparatus for improving the accuracy of plasma etching processes such as trench and recess etch processes. In such processes, a trench or recess is etched into a layer of material which does not have a stop layer at the desired depth of the etched openings. Instead, the etching process is carried out for a set time period calculated to achieve a desired etch depth on the basis of measured or estimated etching rates. For example, the duration of etching to achieve a target depth may be based on statistical analysis or real-time measurements of etch depths by interferometry. However, use of estimated etching rates or interferometry to control when etching should be terminated to achieve a desired etch depth can result in defective structures due to etched openings which are too deep or too shallow.
    Type: Grant
    Filed: April 10, 2000
    Date of Patent: August 7, 2001
    Assignee: Lam Research Corporation
    Inventors: Walter E Klippert, II, Vikorn Martin Kadavanich
  • Patent number: 6210484
    Abstract: An apparatus for heat treating semiconductor wafers is disclosed. The apparatus includes a heating device which contains an assembly of light energy sources for emitting light energy onto a wafer. In particular, the present invention is directed to a heating device that contains at least one heating cone. The heating cone of the present invention includes a circular reflector that can be conically-shaped. A plurality of light energy sources are contained within the reflector. The light energy sources can be vertically oriented or can be tilted slightly towards the central axis of the heating cone. In this arrangement, it has been discovered that the heating cone produces a uniform irradiance distribution over a wafer being heated.
    Type: Grant
    Filed: September 9, 1998
    Date of Patent: April 3, 2001
    Assignee: Steag RTP Systems, Inc.
    Inventor: Kevin Hathaway