Patents Examined by Patrick Jewik
-
Patent number: 5504058Abstract: In a method of manufacturing a superconducting device which has a first thin film of oxide superconductor material formed on a substrate and a second thin film formed on the first thin film of oxide superconductor material, after the second thin film is deposited on the first thin film of oxide superconductor material, a multi-layer structure formed of the first and second thin films is patterned so that a side surface of the first thin film is exposed. In this condition, the whole of the substrate is heated in an O.sub.2 atmosphere or in an O.sub.3 atmosphere so that oxygen is entrapped into the first thin film of oxide superconductor material. Thereafter, the patterned multi-layer structure is preferably covered with a protection coating.Type: GrantFiled: April 20, 1994Date of Patent: April 2, 1996Assignee: Sumitomo Electric Industries, Ltd.Inventors: Sou Tanaka, Mitsuchika Saitoh, Michitomo Iiyama
-
Patent number: 5496798Abstract: A superconducting tube for shielding magnetic fields including a substrate having a tubular wall, a superconducting layer supported by the substrate, and at least two ring-shaped reinforcing members connected to the radially-outer surface of the tubular wall.Type: GrantFiled: January 18, 1995Date of Patent: March 5, 1996Assignee: NGK Insulators, Ltd.Inventors: Hitoshi Sakai, Hitoshi Yoshida
-
Patent number: 5492763Abstract: A medical device provided with a subsurface bacteriostatic/bactericidal stratum to a predetermined depth is disclosed. The bacteriostatic/bactericidal stratum is introduced into the medical device by ion implantation of sufficient concentration to impart thereto the desired bacteriostatic/bactericidal property. The acquired bacteriostatic/bactericidal property has a useful life coterminal with the device. The treated medical device remains biocompatible, is non-leaching and, depending on the specific device, also is thromboresistant.Type: GrantFiled: February 10, 1994Date of Patent: February 20, 1996Assignee: Spire CorporationInventors: John E. Barry, Piran Sioshansi
-
Patent number: 5484647Abstract: A connecting member of circuit substrates includes an organic porous base material provided with tackfree films on both sides, through-holes disposed at requested places which are filled with conductive resin compound up to the surface of the tackfree films. This structure enables inner-via-hole connection and can therefore attain a connecting member of circuit substrates and an electrical connector of high reliability and high quality.By using a connecting member of circuit substrates including the organic porous base material provided with tackfree films on both sides and through-holes disposed at requested places which are filled with conductive resin compound up to the surface of the tackfree films, it is possible to form a high-multilayer substrate easily from double sided boards or four-layer substrates which can be manufactured rather stably.Type: GrantFiled: September 20, 1994Date of Patent: January 16, 1996Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Seiichi Nakatani, Akihito Hatakeyama, Kouji Kawakita, Hirishi Sogou, Tatsuo Ogawa, Tamao Kojima
-
Patent number: 5474834Abstract: A circuit sub-assembly as a mounting for an electronic component such as Josephson device, i.e., a superconducting element, comprises a ceramic insulating substrate, an oxygen-shielding barrier layer formed on the insulating substrate, and a circuit film of niobium, as a superconducting material formed on the barrier layer according to a desired pattern. The barrier layer prevents oxidation of the circuit layer by shielding it from oxygen present in the insulating substrate. Due to the barrier layer, the circuit film is scarcely subject to superconductivity-impairing oxidation. The circuit film is thus capable of high-speed electronic signal conduction.Type: GrantFiled: June 9, 1994Date of Patent: December 12, 1995Assignee: Kyocera CorporationInventors: Shigeo Tanahashi, Takanori Kubo, Kazuhiro Kawabata
-
Patent number: 5472774Abstract: A photolithography test structure is provided for measuring the amount of notching associated with photolithography processing. The test structure includes a curved insulating structure placed in close spaced proximity with a conductive, interconnect structure. A pair of conductive pads are deposited at opposite ends of the interconnect structure for measuring the resistance through the interconnect. Depending upon the amount of notching associated with the interconnect, resistance readings will vary. Test areas containing notched interconnect can be compared with controlled areas specifically designed not to have notching in order to determine relative changes in resistance, and to correlate that resistance with notching magnitude. The insulating structure, interconnect structure and conductive pads are processed upon the same substrate material containing the resulting product requiring testing.Type: GrantFiled: August 19, 1994Date of Patent: December 5, 1995Assignee: Advanced Micro DevicesInventors: Howard S. Goad, Derick J. Wristers, James H. Hussey, Jr., Michael A. Hillis, William C. Chapman
-
Patent number: 5468562Abstract: Surface metallized polymeric implants, such as cannula, needles, catheters, connectors and the like, a dry coating method therefor and apparatus to accomplish the same are disclosed. The metallization of the implants is intended to improve their biocompatibility and to reduce infusion-associated phlebitis and infection. The method essentially includes the dry coating of the outside surfaces of the polymeric implants with a metallic thin film. The apparatus to effect the dry coating method essentially includes a vacuum chamber, an evaporator and an ion source mounted in operative association within the chamber, and means for rotatably mounting a plurality of polymeric implants for exposure to the evaporator and the ion source.Type: GrantFiled: February 10, 1994Date of Patent: November 21, 1995Assignee: Spire CorporationInventors: Mohammad Farivar, Piran Sioshansi
-
Patent number: 5447908Abstract: An outer surface of a superconducting thin film of compound oxide such as YBa.sub.2 Cu.sub.3 O.sub.7-.delta. deposited on a substrate such as MgO and SrTiO.sub.3 is protected with a protective layer which is composed of amorphous inorganic material such as inorganic glass, amorphous oxide.Type: GrantFiled: August 15, 1994Date of Patent: September 5, 1995Assignee: Sumitomo Electric Industries, Ltd.Inventors: Hideo Itozaki, Saburo Tanaka, Nobuhiko Fujita, Shuji Yazu, Tetsuji Jodai
-
Patent number: 5441797Abstract: A process is disclosed for making circuit elements by photolithography comprising depositing an antireflective polyimide or polyimide precursor layer on a substrate and heating the substrate at 200.degree. C. to 500.degree. C. to provide a functional integrated circuit element that includes an antireflective polyimide layer. The antireflective polyimide layer contains a sufficient concentration of at least one chromophore to give rise to an absorbance sufficient to attenuate actinic radiation at 405 or 436 nm. Preferred chromophores include those arising from perylenes, naphthalenes and anthraquinones. The chromophore may reside in a dye which is a component of the polyimide coating mixture or it may reside in a residue which is incorporated into the polyimide itself.Type: GrantFiled: September 30, 1994Date of Patent: August 15, 1995Assignee: International Business Machines CorporationInventors: Dennis P. Hogan, Harold G. Linde, Ronald A. Warren
-
Patent number: 5437915Abstract: A method of producing a leadframe for use in semiconductor devices, comprises the steps of forming a space between leads 1a and 1b which are to be overlapped and welded each other, and welding the leads at a region including the space and melting and cutting off one of the leads. In one of the leads which is melted, cohesion and separation of molten metal occur in the region around the space. As a result, unnecessary portions such as an outer frame used for positioning can be cut off at the same time when the leads are connected by welding. Thus, high precision positioning of a plurality of element leadframes as well as high assembling productivity are achieved.Type: GrantFiled: June 16, 1994Date of Patent: August 1, 1995Assignee: Hitachi, Ltd.Inventors: Asao Nishimura, Akihiro Yaguchi, Mitsuaki Haneda, Ichiro Anjoh, Junichi Arita, Akihiko Iwaya, Masahiro Ichitani
-
Patent number: 5429861Abstract: An improved method of manufacturing fully-additive or partly-additive printed wiring boards by electrolessly depositing copper on an insulating substratum and the walls of plated-through holes, wherein the copper deposit has increased resistance to failure due to thermal stress or thermal cycling. The electroless copper plating bath contains a copper compound, ethylenediaminetetraacetic acid as a complexing agent for copper, a reducing agent capable of reducing the copper compound to metallic copper and addition agents selected from inorganic germanium and silicate compounds and combined with a polyethylene glycol. The pH of the electroless copper bath is monitored and maintained between 11.2 and 12.0 to reduce the trace iron codeposited with the copper and improve the resistance to plated-through hole failure in thermal cycling. The addition of vanadium to the electroless copper bath increases the smoothness of the deposited copper and further increases the number of thermal cycles before failure.Type: GrantFiled: October 28, 1993Date of Patent: July 4, 1995Assignee: AMP-AKZO CorporationInventor: Richard A. Mayernik
-
Patent number: 5427858Abstract: Disclosed is a novel organic electroluminescent device which can be used as a pixel for graphic display, a pixel for a television image display device or a surface light source, and this novel organic electroluminescent device overcomes the conventional problem of an organic electroluminescent device having a laminated structure in which at least a light-emitting layer formed of a luminescent organic solid is placed between two mutually opposing electrodes, i.e., a short life, by having a film of an electrically insulating polymer compound as a protection layer provided on the outer surface of the above laminated structure.Type: GrantFiled: June 29, 1992Date of Patent: June 27, 1995Assignee: Idemitsu Kosan Company LimitedInventors: Hiroaki Nakamura, Masahide Matsuura, Tadashi Kusumoto
-
Patent number: 5428005Abstract: A superconducting thin film of compound oxide material deposited on a substrate, comprising a plurality of a-axis or b-axis oriented unit layers (2) and a plurality of c-axis oriented unit layers (1), each unit layer (1, 2) being made of the compound oxide material and being laminated alternately one over another on the substrate (3).Type: GrantFiled: June 14, 1994Date of Patent: June 27, 1995Assignee: Sumitomo Electric Industries, Ltd.Inventors: Takashi Matsuura, Keizo Harada, Hidenori Nakanishi, Hideo Itozaki
-
Patent number: 5420103Abstract: A LnBaCuO-series superconducting thin film is provided over a surface of a substrate of Y.sub.2 O.sub.3 single crystal to form a composite superconductor. Ln stands for Y or a lanthanoid element. The composite superconductor has an improved interfacial diffusion.Type: GrantFiled: August 19, 1993Date of Patent: May 30, 1995Assignee: International Superconductivity Technology CenterInventors: Akira Oishi, Tadataka Morishita
-
Patent number: 5419974Abstract: A component 10 for making Al5 Nb.sub.3 Sn superconducting wire is of plane-filling cross-section after removing temporary additions 6, 7. It consists of a central pillar 1 of aluminium (later replaced by tin) surrounded by a two-deep array of polygonal copper columns 2/2a containing niobium rods. Many (e.g. 61) components 10 are stacked together and extruded. The niobium rods adopt and retain a uniform distribution with minimum intervening material. On heat-treatment of the whole, the tin diffuses over a relatively short path and hence consistently into the rods, whereby there is formed a kilofilament Nb.sub.3 Sn wire.Type: GrantFiled: January 5, 1993Date of Patent: May 30, 1995Assignee: British Technology Group Ltd.Inventors: Colin R. Walters, Jan E. Evetts, Francis J. V. Farmer, Thomas J. Hawksley
-
Patent number: 5418215Abstract: c-axis oriented microwave quality HTSC films are deposited onto single crystals of gadolinium gallium garnet (GGG) using pulsed laser deposition (PLD) with conditions of 85 mTorr of oxygen partial pressure, a block temperature of 730.degree. C., a substrate surface temperature of 790.degree. C. and a laser fluence of 1 to 2 Joules/cm.sub.2 at the target, a laser repetition rate of 10 Hz and a target to substrate distance of 7 cm and in which the a and b lattice parameters of the GGG exhibit a mismatch of less than 2.5 percent with the a and b lattice parameters of the HTSC.Type: GrantFiled: April 12, 1994Date of Patent: May 23, 1995Assignee: The United States of America as represented by the Secretary of the ArmyInventors: Arthur Tauber, Steven C. Tidrow
-
Patent number: 5415920Abstract: A conductive pattern layer structure includes an insulating member containing polyimide, a patterned thin film formed on the insulating member, and a patterned conductive layer formed on the thin film. The patterned conductive layer contains copper. Further, the layer structure includes a patterned barrier layer covering an upper surface and side surfaces of the patterned conductive layer to prevent copper from being diffused into another insulating layer formed around the patterned barrier layer.Type: GrantFiled: December 17, 1993Date of Patent: May 16, 1995Assignee: Fujitsu LimitedInventors: Kazuaki Satoh, Kenji Iida
-
Patent number: 5416062Abstract: A thin film of oxide superconductor deposited on a single crystal substrate of silicon wafer. A buffer layer of (100) or (110) oriented Ln.sub.2 O.sub.3, in which Ln stands for Y or lanthanide elements is interposed between the thin film of oxide superconductor and the silicon wafer. A surface of silicon wafer is preferably cleaned satisfactorily by heat-treatment in vacuum before the buffer layer is deposited. An under-layer of metal oxide; ZrO.sub.2, YSZ or metal Y, Er is preferably interposed between the Ln.sub.2 O.sub.3 buffer layer and the silicon wafer.Type: GrantFiled: December 27, 1993Date of Patent: May 16, 1995Assignee: Sumitomo Electric Industries, Ltd.Inventors: Keizo Harada, Hidenori Nakanishi, Hideo Itozaki
-
Patent number: 5403651Abstract: An insulating substrate for mounting semiconductor devices that is composed of a thin flat plate of inexpensive alumina (Al.sub.2 O.sub.3) preferably in the range of 0.26 to 0.29 mm in thickness. Copper foil sheets are applied to both sides of the flat plate with edges spaced a distance back from the end surface of the plate to increase air path distance between the edges of the sheets of foil applied to opposite sides of the plate. The difference in distance between the end surface of the alumina plate and the edges of each copper foil is 0.5 mm or less to balance thermal stress upon heating and cooling of semiconductors soldered to the copper foil.Type: GrantFiled: December 17, 1993Date of Patent: April 4, 1995Assignee: Fuji Electric Co., Ltd.Inventor: Masahide Miyagi
-
Patent number: 5401568Abstract: A particulate composition to be used as a filling material in the heat-sensitive layer of a heat-sensitive recording material is described. The material is characterized by the fact that it occurs as fine-grained white pigments which are predominantly bound to amorphous precipitated silicic acid, whereby the amorphous precipitated silicic acid either (a) is wrapped in layers around the fine-grained white pigment or (b) occurs as fine particles that are bound to the fine-grained white pigment in a punctiform manner and whereby the water content of the material (b) is 1 to 10 percent by weight, preferably 2 to 8 percent by weight.Type: GrantFiled: October 6, 1992Date of Patent: March 28, 1995Assignee: Sud-Chemie AktiengesellschaftInventors: Reinhard Hahn, Friedrich Ruf