Abstract: In one embodiment of the invention, conductive support structures (112) are formed within an interlevel dielectric layer. The conductive support structures (112) lie within the bond pad region (111) of the integrated circuit and provide support to portions of the interlevel dielectric layer that have a low Young's modulus. The conductive support structures (112) are formed using the same processes that are used to form metal interconnects in the device region (109) of the integrated circuit, but they are not electrically coupled to semiconductor devices that lie within the device region (109). Conductive support structures (114) are also formed within the scribe line region (104) to provide support to the interlevel dielectric layer in this region of the integrated circuit.