Patents Examined by Pharshotam S. Lall
  • Patent number: 5119314
    Abstract: A semiconductor integrated circuit device which can operate at high speed and involves a low power consumption and a high integration density, wherein a Bi-CMOS basic cell and a Bi-CMOS macro cell are employed to define a critical path and a CMOS basic cell and a CMOS macro cell are employed for a portion of the device other than the critical path.
    Type: Grant
    Filed: November 28, 1989
    Date of Patent: June 2, 1992
    Assignee: Hitachi, Ltd.
    Inventors: Takashi Hotta, Masahiro Iwamura