Abstract: Described is a multi-chip module that may include a Redistribution Layer (RDL) substrate having Integrated Circuit (IC) dies mounted to a first surface of the RDL substrate. A second plurality of IC dies may be mounted to an opposite second surface. A plurality of sockets can be mounted upon the second plurality of IC dies and a cold plate then mounted to the first plurality of IC dies. The mounting structure may include socket frames coupled to the plurality of sockets.

Abstract: A method for forming a package structure is provided. The method includes etching a top surface of a substrate to form a cavity. The substrate includes thermal vias directly under a bottom surface of the cavity. The method also includes forming at least one first electronic device in the cavity of the substrate. The first electronic device is thermally coupled to the thermal vias. The method further includes forming an encapsulating material in the cavity, so that the encapsulating material extends along sidewalls of the first electronic device and covers a surface of the first electronic device opposite the bottom surface of the cavity. In Addition, the method includes forming an insulating layer having an RDL structure over the encapsulating material. The RDL structure is electrically connected to the first electronic device.

Abstract: The disclosure provides a display substrate, a manufacturing method thereof and a display device. The display substrate has a plurality of subpixel regions. The display substrate includes a base substrate and a pixel definition layer on the base substrate. The pixel definition layer defines a plurality of subpixel openings and each of the subpixel openings occupies one subpixel region. The display substrate further includes a functional medium layer on a side of the pixel definition layer away from the base substrate. The functional medium layer includes a first portion covering side surfaces of the subpixel opening and a second portion covering a top surface of the pixel definition layer. In the same subpixel region, surface energy of the first portion is greater than surface energy of the second portion.

Abstract: An organic light-emitting diode device, a manufacturing method thereof, and a display device are provided. The organic light-emitting diode device includes a light-emitting layer, a functional layer, and a cathode layer, wherein a material of the functional layer includes a metal sol containing metal nanoparticles, and the metal sol forms an uneven nanostructure on a surface of the functional layer, which has a scattering effect on light of the light-emitting layer, thereby reducing a binding force between the light and surface electrons of the cathode layer, so surface plasmon polariton waves can be prevented and light extraction efficiency can be improved.

Abstract: Encapsulation warpage reduction for semiconductor die assemblies, and associated methods and systems are disclosed. In one embodiment, a semiconductor die assembly includes an interface die, a stack of semiconductor dies attached to a surface of the interface die, where the stack of semiconductor dies has a first height from the surface. The semiconductor die assembly also includes an encapsulant over the surface and surrounding the stack of semiconductor dies, where the encapsulant includes a sidewall with a first portion extending from the surface to a second height less than the first height and a second portion extending from the second height to the first height. Further, the first portion has a first texture and the second portion has a second texture different from the first texture.

Abstract: An integrated circuit includes a plurality of transistors and an interlevel dielectric layer formed over the transistors. The interlevel dielectric layer includes a first region and a second region with a higher dielectric constant than the first region. The difference in dielectric constant is produced by curing the first region shielding the second region from the curing. Metal signal lines are formed in the first region. Metal-on-metal capacitors are formed in the second region.

Abstract: A display device includes: a substrate including a pad area; a plurality of first conductive pads disposed in a matrix form in the pad area in a first direction and in a second direction intersecting the first direction; protrusions disposed on the plurality of first conductive pads; and a plurality of second conductive pads disposed on the plurality of first conductive pads and the protrusions. The plurality of second conductive pads include: contact portions in contact with the first conductive pads; and raised portions configured to extend from the contact portions, to cover the protrusions, and to have heights greater than that of the contact portions. The plurality of second conductive pads include an ultrasonic bondable material.

Abstract: Embodiments described herein provide a semiconductor package comprising multiple dies encapsulated in multiple molding compounds. In one example, a semiconductor package comprises: a first die or die stack on a substrate; a first molding compound encapsulating the first die or die stack on the substrate; a second die or die stack on the first molding compound; and a second molding compound encapsulating the second die or die stack and at least one portion of the first molding compound. In this example, the first die or die stack is electrically coupled to the substrate using a first wire bond and the second die or die stack is electrically coupled to the substrate using a second wire bond. Additionally, the first molding compound encapsulates the first wire bond and the second molding compound encapsulates the second wire bond. Furthermore, a footprint of the second die overlaps a footprint of the first die.

Abstract: An LED bulb with a screw base; a cover forming an accommodation space with the screw base; an LED filament located in the accommodation space including a substrate comprising a top surface, a side surface, and an extension direction; a plurality of LED chips disposed on the first top surface; a first electrode arranged on the top surface, electrically connected to the plurality of LED chips; and a first clamp including first and second projecting prongs. The first electrode is clamped by the first and second projecting prongs within the accommodation space. The LED bulb has an imaginary rotational axis not parallel to the extension direction.

Abstract: A display panel includes a display layer, a photosensitive layer and an infrared mask. The display layer is configured to display an image, the display layer has light-transmitting portions, and the light-transmitting portions are configured to transmit infrared light. The photosensitive layer is disposed on a side of the display layer. The infrared mask is disposed on a side of the photosensitive layer proximate to the display layer, the infrared mask has hollowed-out regions, the hollowed-out regions are configured to make the infrared mask have a preset pattern, and a region in the infrared mask except the hollowed-out regions is configured to prevent transmission of the infrared light. The photosensitive layer is configured to receive infrared light passing though the hollowed-out regions and the light-transmitting portions, and convert the infrared light into an image signal.

Abstract: A method for manufacturing a semiconductor device and a semiconductor device produced thereby. For example and without limitation, various aspects of this disclosure provide a method for manufacturing a semiconductor device, and a semiconductor device produced thereby, that that comprises a transparent, translucent, non-opaque, or otherwise optically-transmissive, external surface.

Abstract: Provided is a method of manufacturing a light-emitting element, the method including positioning a substrate, forming a first separation layer, which includes a first sacrificial layer, an etching control layer on the first sacrificial layer, and a second sacrificial layer on the etching control layer, on the substrate, forming at least one first light-emitting element on the first separation layer, and separating the first light-emitting element from the substrate.

Abstract: An integrated circuit includes multiple backside conductive layers disposed over a backside of a substrate. The multiple backside conductive layers each includes conductive segments. The conductive segments in at least one of the backside conductive layers are configured to transmit one or more power signals. The conductive segments of the multiple backside conductive layers cover select areas of the backside of the substrate, thereby leaving other areas of the backside of the substrate exposed.

Abstract: An organic light emitting diode (OLED) display panel and a display device are provided. The OLED display panel includes a light emitting functional layer and a display area disposed on a transistor array substrate. The reinforcement layer is formed on a surface of a bending area of the transistor array substrate. A blocking member is formed on a surface of the transistor array substrate and located between the reinforcement layer and the light emitting functional layer. By providing the blocking member, the control accuracy of the amount of glue overflow in the bending area is improved.

Abstract: A semiconductor apparatus with a heat dissipation conduit in a sidewall interconnection structure, a method of manufacturing the semiconductor apparatus, and an electronic device including the semiconductor apparatus. According to the embodiments, the semiconductor apparatus includes: a carrier substrate having a first region and a second region adjacent to each other; a semiconductor device on the first region; and an interconnection structure on the second region, wherein the interconnection structure includes: an electrical isolation layer; a conductive structure in the electrical isolation layer, wherein at least a part of components require to be electrically connected in the semiconductor device is in contact with and therefore electrically connected to the conductive structure in a lateral direction, wherein the conductive structure is located at a corresponding height in the interconnection structure; and a heat dissipation conduit in the electrical isolation layer.

Abstract: A semiconductor package includes a substrate, a package structure, and a lid structure. The package structure is disposed on the substrate. The lid structure is disposed over substrate, wherein the lid structure includes a main body covering and surrounding the package structure and a plurality of rib portions protruded from the main body and extended toward the package structure.

Abstract: In a described example, an apparatus includes: a package substrate having a planar die mount surface; recesses extending into the planar die mount surface; and a semiconductor device die flip chip mounted to the package substrate on the planar die mount surface, the semiconductor device die having post connects having proximate ends on bond pads on an active surface of the semiconductor device die, and extending to distal ends away from the semiconductor device die having solder bumps, wherein the solder bumps form solder joints to the package substrate within the recesses.

Abstract: Methods for selectively forming a target film on a substrate comprising a first dielectric surface and a second metallic surface are disclosed. The methods may include: contacting the substrate with a plasma generated from a hydrogen containing gas, selectively forming a passivation film from vapor phase reactants on the first dielectric surface while leaving the second metallic surface free from the passivation film, and selectively depositing the target film from vapor phase reactants on the second metallic surface relative to the passivation film.

Abstract: An integrated circuit structure that includes a first integrated circuit package and a second integrated circuit package is described. The two packages can be stacked above, for example, a printed circuit board. The top package is inverted, such that a first die of that top package is facing a second die of the bottom package. A cooling arrangement is in a gap between the first and second integrated circuit packages, and is thermally coupled to the first and second die. The cooling arrangement is to transfer heat generated by a first die of the first integrated circuit package and a second die of the second integrated circuit package. In some cases, structures comprising electrically conductive material (e.g., metal) are encapsulated by a molding compound or insulator, and extend between a first substrate of the first integrated circuit package and a second substrate of the second integrated circuit package.

Abstract: A semiconductor device package and a method of forming the same are provided. The semiconductor device package includes a substrate, a semiconductor device, a ring structure, a lid structure, and an adhesive member. The semiconductor device is disposed over the substrate. The ring structure is disposed over the substrate and surrounds the semiconductor device. The lid structure is disposed over the ring structure and extends across the semiconductor device. The adhesive member is disposed in a gap between the ring structure and the semiconductor device and attached to the lid structure and the substrate.