Abstract: Selecting between basic and global persistent flush modes is described. In accordance with the described techniques, a system includes a data fabric in electronic communication with at least one cache and a controller configured to select between operating in a global persistent flush mode and a basic persistent flush mode based on an available flushing latency of the system, control the at least one cache to flush dirty data to the data fabric in response to a flush event trigger while operating in the global persistent flush mode, and transmit a signal to switch control to an application to flush the dirty data from the at least one cache to the data fabric while operating in the basic persistent flush mode.

Abstract: Methods, systems, and devices for operating a memory array with variable page sizes are described. The page size may be dynamically changed, and multiple rows of the memory array may be accessed in parallel to create the desired page size. A memory bank of the array may contain multiple memory sections, and each memory section may have its own set of sense components (e.g., sense amplifiers) to read or program the memory cells. Multiple memory sections may thus be accessed in parallel to create a memory page from multiple rows of memory cells. The addressing scheme may be modified based on the page size. The logic row address may identify the memory sections to be accessed in parallel. The memory sections may also be linked and accessing a row in one section may automatically access a row in a second memory section.

Abstract: A converter module is described which handles memory requests issued by a cache (e.g. an on-chip cache), where these memory requests include memory addresses defined within a virtual memory space. The converter module receives these requests, issues each request with a transaction identifier and uses that identifier to track the status of the memory request. The converter module sends requests for address translation to a memory management unit and where there the translation is not available in the memory management unit receives further memory requests from the memory management unit. The memory requests are issued to a memory via a bus and the transaction identifier for a request is freed once the response has been received from the memory. When issuing memory requests onto the bus, memory requests received from the memory management unit may be prioritized over those received from the cache.

Abstract: Embodiments are generally directed to graphics processor data access and sharing. An embodiment of an apparatus includes a circuit element to produce a result in processing of an application; a load-store unit to receive the result and generate pre-fetch information for a cache utilizing the result; and a prefetch generator to produce prefetch addresses based at least in part on the pre-fetch information; wherein the load-store unit is to receive software assistance for prefetching, and wherein generation of the pre-fetch information is based at least in part on the software assistance.

Abstract: A computer storage device having a host interface, a controller, non-volatile storage media, and firmware. The firmware instructs the controller to: store a namespace map mapping blocks of logical block addresses in a namespace to blocks from a logical address capacity of the non-volatile storage media; adjust the namespace map to change the size of the namespace; and translate logical addresses in the namespace to physical addresses for the non-volatile storage media using the namespace map.

Abstract: Systems and methods for managing a storage system are disclosed. The storage system includes a first storage device and a second storage device different from the first storage device. A first storage operation is received for a first portion of a file, and a data structure associated with the file is identified. Based on the data structure, the first storage device is identified for the first portion of the file. The first storage operation is transmitted to the first storage device. In response to the first storage operation, the first storage device updates or accesses the first portion of the file.

Abstract: The occurrence of an asynchronous power loss (APL) event is detected in a memory sub-system. In response, an APL handling operation is performed. The APL handing operation includes identifying a last written page at a first page location in a block of the memory device, wherein the last written page is associated with a memory cell of the memory device, copying data from the last written page and from a related page associated with the memory cell to a temporary storage area in the memory device, copying the data from the temporary storage area to a second page location in the block of the memory device, and providing a notification that the memory device has recovered from the APL event.

Abstract: Techniques for provisioning storage may include: initially provisioning storage for a storage group of logical devices; tagging the storage group to enable autonomous storage provisioning; receiving a plurality of parameters used in connection with performing autonomous storage provisioning for the storage group, wherein the plurality of parameters includes a first parameter denoting a threshold amount of consumed storage of the storage group, a second parameter denoting a storage capacity expansion amount by which to expand the storage capacity of the storage group, and a third parameter denoting a system-wide threshold of consumed backend non-volatile storage; determining, in accordance with the plurality of parameters, whether to expand a current storage capacity of the storage group; and responsive to determining to expand the current storage capacity of the storage group, performing first processing to automatically expand the current storage capacity of the storage group in accordance with the second pa

Abstract: The present disclosure provides a method and system for storage management, a storage medium and a device. The method includes: making hard disks in a storage pool network with several controllers via network hard disk enclosures, respectively sending hard disk information to proxy drivers which are pre-configured in the controllers, and selecting one of the controllers as a main controller; respectively sending, the hard disk information to cluster drivers which are pre-configured in respective controllers; acquiring the hard disk information from each cluster driver via the main controller, and sending the total hard disk information sent to each cluster driver; acquiring information of a logical unit space corresponding to the request, and allocating an idle hard disk in the storage pool for the logical unit space according to the total hard disk information; processing, the read/write request in parallel in the idle hard disk.

Abstract: A method for performing communications specification version control of a memory device in predetermined communications architecture with aid of compatibility management, associated apparatus and computer-readable medium are provided.

Abstract: An example memory sub-system comprises: a memory device; and a processing device, operatively coupled with the memory device. The processing device is configured to: receive a first host data item; store the first host data item in a first page of a first logical unit of a memory device, wherein the first page is associated with a fault tolerant stripe; receive a second host data item; store the second host data item in a second page of the first logical unit of the memory device, wherein the second page is associated with the fault tolerant stripe, and wherein the second page is separated from the first page by one or more wordlines including a dummy wordline storing no host data; and store, in a third page of a second logical unit of the memory device, redundancy metadata associated with the fault tolerant stripe.

Abstract: Methods, systems, and devices for performance control for a memory sub-system are described. A memory sub-system can monitor a backend for writing data to a memory device. The memory sub-system can determine that the bandwidth of the backend satisfies one or more performance criteria that are based on performance between the memory sub-system and a host system. In some embodiments, the memory sub-system can allocate a quantity of slots of a buffer to a frontend of the memory sub-system based on determining that the bandwidth of the backend satisfies the one or more performance criteria. Slots of the buffer can be configured to receive data from the frontend for writing to the memory device by the backend.

Abstract: A method comprising: stopping to use one or more first approximate membership filters for servicing of read requests that are incoming to a storage system; increasing a size of a set of first data structures that are available in the storage system, each of the first data structures being used by the storage system for write request amortization; replacing the one or more first approximate membership filters with one or more second approximate membership filters, and building each of the one or more second approximate membership filters by: freezing all non-empty first data structures in the set, and copying respective contents of each of the frozen non-empty first data structures into any of the one or more second approximate membership filters; and starting to use the one or more second approximate membership filters for servicing of read requests that are incoming to the storage system.

Abstract: A method, performed by an electronic device, includes: based on a target event associated with an application being initiated, transmitting initiation of the target event to a runtime environment of the application, and after transmitting the initiation of the target event to the runtime environment, based on a memory value allocated to the application exceeding a threshold value for determining whether to initiate a garbage collection, skipping performing the garbage collection and updating a bound memory value, defined in the garbage collection, and the threshold value.

Abstract: Methods, systems, and devices for performing an access operation on a memory cell, incrementing a value of a first counter based on performing the access operation on the memory cell, determining that the incremented value of the first counter satisfies a threshold, incrementing a value of a second counter based on determining that the incremented value of the first counter satisfies the threshold, and performing a maintenance operation on the memory cell based on determining that the incremented value of the first counter satisfies the threshold are described.

Abstract: According to one embodiment, a memory system includes a nonvolatile memory and a controller. The controller receives a first write request associated with first data from a host. In response to a lapse of first time since the reception of the first write request, the controller starts a write process of second data to the nonvolatile memory. The second data includes at least the first data. The controller transmits a first response to the first write request to the host in response to completion of the write process. The first time is time obtained by subtracting second time from third time designated by the host as a time limit of the transmission of the first response since the reception of the first write request.

Abstract: A storage system includes a management node and multiple storage nodes. Each storage node includes a first storage device of a first type (e.g., DRAM) and a second storage device of a second type (e.g., SCM), and a performance level of the first storage device is higher than the second storage device. The management node creates a globe cache including a first tier comprising the first storage device in each storage node, and a second tier comprising the second storage device in each storage node. The first tier is for storing data with a high access frequency, and the second tier is for storing data with a low access frequency. The management node monitors an access frequency of target data stored in the first tier. When the access frequency of the target data is lower than a threshold, the management node instructs the first storage node to migrate the target data from the first tier to the second tier of the globe cache.

Abstract: A computer system stores management information that manages a workflow and a deletion flag that indicates deletion of data in the workflow hidden from a user. The computer system executes a workflow that includes one or more processes that convert input data into output data. The computer system includes a lineage of the executed workflow including information of the input data and the output data in the management information. The computer system deletes data selected from data in the executed workflow, and sets the deletion flag of the selected data in the management information. The computer system, in response to an access to first data to which the deletion flag is set, regenerate the first data based on the management information and removes the deletion flag of the first data in the management information.

Abstract: A storage device comprises a nonvolatile memory configured to store data that is written in size units of a mapping size, and a storage controller configured to transmit a command to the nonvolatile memory. The storage controller includes a host interface configured to receive a write command from a host device, the write command including a command to write first data to a first address, the first data having a first size smaller than the mapping size. The storage controller includes processing circuitry configured to transmit a read command to the nonvolatile memory, to cause the nonvolatile memory to read second data stored in the nonvolatile memory addressed based on the first address, in response to a determination that the first size is smaller than the mapping size and before the first data is received at the storage controller through the host interface.

Abstract: In one example, a system includes a flash memory, a Random-Access Memory (RAM), and a controller. The flash memory stores first and second initial overlays, where the first initial overlay includes a first overlay function and the second initial overlay includes a second overlay function. The controller copies the first initial overlay into the RAM based on the first overlay function being called, swaps the first initial overlay with the second initial overlay based on the second overlay function being called, and monitors functions calls between the first and second overlay functions over a monitoring period. The controller determines whether a number of the function calls is greater than a threshold value, and based at least in part on the number of function calls being greater than the threshold value, re-groups the first and second overlay functions into a new overlay, and stores the new overlay in the flash memory.