Patents Examined by Ryan J. Johnson
  • Patent number: 7482880
    Abstract: A frequency modulated output of a Digital Locked Loop (DLL) is implemented with a Johnson Counter outputting a sample clock and a synchronized digital code at a multiple of the sample clock. The digital code drives a digital-to-analog converter to generate a frequency modulated control signal. The control signal is summed with the center frequency control from the digital locked loop digital filter to provide a frequency modulated center frequency control signal to the DLL oscillator.
    Type: Grant
    Filed: November 8, 2006
    Date of Patent: January 27, 2009
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Scott W. Herrin, Chris C. Dao, Patrick M. Falvey, Thomas J. Rodriguez, Jules D. Campbell, Jr.
  • Patent number: 7482889
    Abstract: An oscillator having improved frequency stability which includes an oscillator circuit and an SC-cut resonator connected with the oscillator circuit. The SC-cut resonator has a first turning point. A temperature compensation circuit is connected with the oscillator circuit. The temperature compensation circuit is adapted to adjust a reference frequency generated by the oscillator circuit according to a frequency response associated with a second turning point of an AT-cut resonator.
    Type: Grant
    Filed: June 28, 2006
    Date of Patent: January 27, 2009
    Assignee: CTS Corporation
    Inventor: James L. Stolpman
  • Patent number: 7479836
    Abstract: An oscillation circuit used in a semiconductor device such as a cell-based IC, and comprises: an inverting amplifier, which is constructed so that it is possible connect a crystal oscillator XL between its input and output terminals, and so that it is possible to adjust its gain by a control signal CNT; and a wave-shaping circuit such as a Schmitt circuit that shapes the waveform of the oscillation signal output from the inverting amplifier. The wave-shaping circuit is constructed so that it is possible to adjust the gain when shaping a waveform according to a control signal CNT to correspond with the gain adjustment of the inverting amplifier.
    Type: Grant
    Filed: May 1, 2006
    Date of Patent: January 20, 2009
    Assignee: NEC Electronics Corporation
    Inventor: Hidekazu Kawashima
  • Patent number: 7479835
    Abstract: A constant temperature oscillator includes a crystal oscillator that is provided upright on a circuit board, an oscillation element arranged on the circuit board and configuring an oscillation circuit in conjunction with the crystal oscillator, and a temperature control element including a heating chip resistance and a thermistor, arranged on the circuit board, and configuring a temperature control circuit that keeps an operating temperature of the crystal oscillator constant, and which is provided with a heat transfer plate between the heating chip resistance and the bottom face of the oscillator container, wherein, the heat transfer plate has a notch into which the heating chip resistance is fitted, and a heat sink lies between the heat transfer plate and the heating chip resistance and closely contacts with them.
    Type: Grant
    Filed: September 11, 2006
    Date of Patent: January 20, 2009
    Assignee: Nihon Dempa Kogyo Co., Ltd.
    Inventors: Hiroyuki Mitome, Manabu Ito, Takeshi Uchida
  • Patent number: 7479834
    Abstract: A phase lock loop (PLL) frequency synthesizer includes a reconfigurable voltage controlled oscillator (VCO) with three modes of operation: a Linear-High-gain, Zero-gain, and Low-gain mode. During the linear high gain mode, the VCO enables an analogue self-calibration of the PLL over a wide frequency tuning range. Control voltage at the input of the VCO is varied by the PLL to provide an output frequency. When the PLL is locked, the VCO is switched to the Zero-gain mode while maintaining the output.
    Type: Grant
    Filed: February 4, 2005
    Date of Patent: January 20, 2009
    Assignee: Marvell International Ltd.
    Inventors: Adil Koukab, Michel Declercq
  • Patent number: 7477110
    Abstract: According to an example embodiment, there is a testing device for testing a phase locked loop having a power supply input. The testing device comprises a power supply unit for providing a power supply signal VDD having a variation profile to the power supply input of the phase locked loop, wherein a width and height of said variation profile are formed in such a way, that the voltage controlled oscillator is prevented from outputting an oscillating output signal. There is a means for disabling a feedback signal to a phase comparator of the phase locked loop such that said phase locked loop is operated in an open loop mode, and a meter for measuring a measurement signal of the phase locked loop, while said power supply signal is provided to the power supply input.
    Type: Grant
    Filed: January 27, 2005
    Date of Patent: January 13, 2009
    Assignee: NXP B.V.
    Inventors: Jose De Jesus Pineda De Gyvez, Alexander Guido Gronthoud, Cristiano Cenci
  • Patent number: 7477111
    Abstract: A plurality of variable load capacitance circuits is connected to each node between adjacent delay circuits of a ring oscillator, and changes load capacitance according to an external control signal. The control circuit adjusts timing the control signal is inputted to these variable load capacitance circuits, using a clock signal of one or more nodes of the ring oscillator.
    Type: Grant
    Filed: February 23, 2006
    Date of Patent: January 13, 2009
    Assignee: Fujitsu Limited
    Inventor: Hiroto Matsuta
  • Patent number: 7474164
    Abstract: A radar oscillator has an oscillation unit and first and second switch circuits. The first switch circuit turns off an electric power supply to an amplifier in a non-input period of a pulse signal to set the oscillation unit in a non-oscillation state and turns on the electric power supply to the amplifier in an input period of the pulse signal to set the oscillation unit in an oscillation state. The second switch circuit turns on an electric power supply to an LC resonator in a period immediately before the pulse signal is input in a period in which the pulse signal is not input to supply a current to the LC resonator and turns off the electric power supply to the LC resonator at a timing at which the pulse signal is input, so that activation of an oscillation operation of the oscillation unit is accelerated.
    Type: Grant
    Filed: January 27, 2006
    Date of Patent: January 6, 2009
    Assignees: Anritas Corporation, Matsushita Electric Industrial Co. Ltd.
    Inventors: Sumio Saito, Masanori Ejima, Yutaka Arayashiki
  • Patent number: 7471164
    Abstract: An oscillator is provided having an oscillator circuit including at least one oscillator circuit inductor and a first oscillator circuit capacitor, whereby the value of the first oscillator circuit capacitor is reversible by means of the first control voltages between different stages. The oscillator is characterized by a first control voltage source, which applies first control voltages with at least three stepwise different values to the first oscillator circuit capacitor. Preferably, the control voltages are generated over a network of current sources and resistors, whereby the network compensates for the thermal response of the oscillator. Further, a method for operating this type of oscillator is presented.
    Type: Grant
    Filed: April 21, 2005
    Date of Patent: December 30, 2008
    Assignee: Atmel Germany GmbH
    Inventor: Reinhard Reimann
  • Patent number: 7466208
    Abstract: A VCO circuit includes: a control portion to which a first voltage is inputted and from which a second voltage corresponding to the first voltage is outputted; a current source portion to which the second voltage is inputted and from which a current corresponding to the second voltage is outputted; and an oscillator circuit to which the current is inputted and from which a signal with a frequency in accordance with the current is outputted. The control portion includes an adjusting circuit which changes the second voltage in conjunction with fluctuation of a power supply voltage. Accordingly, fluctuation of the frequency Fo of an output signal of the VCO circuit can be suppressed even when the power supply voltage of the VCO circuit fluctuates.
    Type: Grant
    Filed: August 4, 2006
    Date of Patent: December 16, 2008
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Takeshi Osada
  • Patent number: 7463107
    Abstract: The invention is directed to a resonant circuit having a frequency-determining element which has at least one switchable frequency-changing element connected in parallel therewith. The frequency-changing element has two series-connected transistors whose control connections are connected to a node that receives a fixed potential. First connections of the two series-connected transistors are connected to one another and also to a control input for a control signal for switching the frequency-changing element of the resonant circuit. The invention keeps the control voltage for the two transistors at a higher potential than the threshold voltage for the transistors. This reduces a parasitic capacitance in the two transistors during operation.
    Type: Grant
    Filed: September 6, 2006
    Date of Patent: December 9, 2008
    Assignee: Infineon Technologies AG
    Inventor: Tindaro Pittorino
  • Patent number: 7463098
    Abstract: A feedback system such as a phase locked loop (PLL) includes a second feedback loop which responds when a VCO control voltage is near either end of its range, by slowly adjusting additional tuning elements which control the VCO frequency. The second feedback loop is arranged to cause a slow enough change in the VCO frequency that the first traditional feedback loop adjusts the control voltage quickly enough in a direction toward its mid-range value to keep the VCO frequency substantially unchanged. The second feedback loop advantageously incorporates one or more digital control signals which preferably change no more than one bit at a time and with a controlled slow ramp rate. As a result, the PLL maintains phase accuracy so that the operation of the PLL, including subtle specifications such as input data jitter tolerance or output jitter generation when used for clock and data recovery applications, is not negatively impacted.
    Type: Grant
    Filed: November 6, 2006
    Date of Patent: December 9, 2008
    Assignee: Silicon Laboratories Inc.
    Inventors: Rex T. Baird, Yunteng Huang, Michael H. Perrott
  • Patent number: 7463106
    Abstract: Disclosed is a push-push voltage controlled oscillator which obtains output signals having a frequency two times the fundamental resonance frequency of an LC resonator with differential signals having the same amplitude and opposite phases, creating the advantage of high frequency differential outputs which are obtained using such a voltage controlled oscillator, and thus reducing current consumption.
    Type: Grant
    Filed: April 14, 2006
    Date of Patent: December 9, 2008
    Assignee: Industry-Academic Cooperation Foundation - Yonsei University
    Inventors: Hyun-Chol Shin, Hyun Kim
  • Patent number: 7459984
    Abstract: The invention provides a method and apparatus to optimally estimate and adaptively compensate the temperature-induced frequency drift of a crystal oscillator in a navigational signal receiver. A Read-Write memory encodes two tables, one for looking up frequency drift values versus temperature readings and another one for valid data confirmation on the first table. The initially empty look-up table is gradually populated with frequency drift values while the receiver computes the frequency drift along with its position. During initial start of the receiver or re-acquisition of satellite signals, the stored frequency drift value corresponding to the current temperature is used. If no valid frequency drift value is available, the frequency drift value is computed based on the existing frequency drift values in the table. This invention reduces the Time-To-First-Fix (TTFF) of the receiver and enables the receiver to self-calibrate, thus no additional factory calibration would be necessary.
    Type: Grant
    Filed: May 26, 2005
    Date of Patent: December 2, 2008
    Assignee: Sirf Technology Holdings, Inc.
    Inventors: Chi-Shin Wang, Kudrethaya A. Shridhara, Jun Mo, Shaowei Han, Hansheng Wang
  • Patent number: 7449970
    Abstract: A frequency fine tuning circuit for use in a voltage-controlled oscillator is provided. The frequency tuning circuit includes a first varactor, a second varactor and a center bias unit. The second varactor is coupled to the first varactor at a first node. The center bias unit maintains a node voltage of the first node at a constant bias voltage level.
    Type: Grant
    Filed: May 2, 2006
    Date of Patent: November 11, 2008
    Assignee: Samsung Electronics, Co., Ltd.
    Inventors: Jin-Hyuck Yu, Je-Kwang Cho
  • Patent number: 7443255
    Abstract: An oscillator comprises a data storage unit, an oscillation unit, and a control unit. The data storage unit is adapted to store a plurality of reference condition codes and a plurality of reference control codes. The oscillation unit is adapted to output an oscillation signal having an oscillation frequency that varies according to a control code. The control unit is adapted to generate the control code with a target value based on the reference condition codes and the reference control codes and a current condition code input to the control unit. Where control code has the target value, the oscillation unit outputs the oscillation signal with the oscillation frequency substantially equal to a target oscillation frequency.
    Type: Grant
    Filed: June 22, 2006
    Date of Patent: October 28, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kang-Jin Lee, Ji-Hyun Kim
  • Patent number: 7443253
    Abstract: A detection device for detecting an oscillator is provided. The detection device includes an oscillator control circuit, a frequency-decreasing circuit and a display circuit. The oscillator control circuit is used for outputting the oscillator signal of the oscillator. The frequency-decreasing circuit is connected to the output of the oscillator control circuit and has a capacitor suitable for charging and discharging and a resistor, which can adjust the time constant of the oscillator signal. The display circuit is connected to the frequency-decreasing circuit for showing the output signal of the frequency-decreasing circuit. The detection device can decide whether the oscillator is normal or broken by observing a component of the display circuit, for example, the twinkling of a light emitting diode of the display circuit.
    Type: Grant
    Filed: August 30, 2006
    Date of Patent: October 28, 2008
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventor: Ming-Kun Chen
  • Patent number: 7443252
    Abstract: A calibration circuit for voltage-controlled oscillator (VCO) includes a calibration bias generator, a VCO, a detection unit, a micro control unit, an adjuster unit, a phase-locked loop (PLL) unit, a control voltage detection unit, and a control switch set. The calibration bias generator outputs a first control voltage. The VCO outputs an oscillation frequency according to the first control voltage. The detection unit detects the oscillation frequency and outputs the detection result signal to the micro control unit. The micro control unit outputs an adjust signal according to the detection result signal. The adjuster unit receives the adjust signal voltage and adjusts the oscillation frequency output from the VCO according to the adjust signal voltage. The PLL unit outputs a second control voltage to the VCO. The control voltage detection unit outputs voltage-detection signal to the micro control unit, which outputs the adjust signal according to the voltage-detection signal.
    Type: Grant
    Filed: June 26, 2006
    Date of Patent: October 28, 2008
    Assignee: Novatek Microelectronics Corp.
    Inventors: Yih-Min Tu, Yuan-Tung Peng, Ping-Hsun Hsieh, Min-Chieh Hsu
  • Patent number: 7443260
    Abstract: A circuit can include an oscillator core that outputs, in response to a bias signal, a periodic signal having an oscillation frequency; a bias circuit that, when powered, provides the bias signal (e.g., a voltage) to the oscillator core; and a switching circuit that periodically powers the bias circuit at a second frequency and provides the bias signal to the oscillator core when the bias circuit is not powered. The switching circuit can include a storage element that stores energy when the bias circuit is powered and uses stored energy to provide the bias signal when the bias circuit is not powered. The switching circuit can include a divider circuit that divides the oscillation frequency of the periodic signal to generate a control signal having the second frequency, and the bias circuit can be periodically powered at the second frequency in response to the control signal.
    Type: Grant
    Filed: September 19, 2006
    Date of Patent: October 28, 2008
    Assignee: ATMEL Corporation
    Inventor: Terje Saether
  • Patent number: 7443261
    Abstract: A multimode-based phase modulating apparatus capable of reducing the degradation of modulation precision and suppressing the unnecessary power consumption. This apparatus has a switch for switching the modulation modes of a PLL circuit between a single-point modulation and a double-point modulation. In a case of a narrow modulation bandwidth, the switch is turned off to cease a second digital baseband signal, thereby causing the PLL circuit to perform the single-point modulation in which only a first digital baseband signal from a frequency division rate generating part is used for the modulation. Contrarily, in a case of a wide modulation bandwidth, the switch is turned on, thereby performing the double-point modulation using both the first digital baseband signal and the second digital baseband signal.
    Type: Grant
    Filed: December 22, 2005
    Date of Patent: October 28, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hiroyuki Yoshikawa, Shunsuke Hirano