Abstract: In an information processing system having a bus bridge connected between a plurality of buses for data transfer therebetween, the bus bridge is provided with a RAS data acquisition bus operating independently from the plurality of buses and a RAS data acquisition circuit for acquiring RAS data, the RAS data acquisition circuit acquires RAS data in the bus bridge or RAS data of a processor or an I/O device on a bus connected to the bus bridge, in response to a command supplied from an external circuit via the RAS data acquisition bus. The RAS data acquisition circuit sends the acquired RAS data to the external circuit via the RAS data acquisition bus.

Abstract: Provided is a method and system for managing audio portions of test cases with the respective test case so that the tester (client) has access to the audio portion of test cases. Providing this functionality is particularly novel in that audio is captured within a heterogeneous client/server test environment wherein a single tester from a single client interface can test on any of a variety of test platforms. This invention allows managing audio test portions of test cases with the respective test case so that the tester (client) has access to the audio portion of test cases interactively, or at some future time. The management of the test cases is appropriately performed in the heterogeneous client/server environment. In one embodiment, the test unit(s) connected to the custom server provide an interface to perform recording of the voice path of the test case telephone call.

Abstract: An integrated circuit device sending trace data generated by a central processing unit (CPU) to a debug device without loss and a method of controlling the operation of the integrated circuit device. The integrated circuit device has the CPU executing various types of data processing. A trace buffer is connected via a parallel bus to a predetermined output terminal of the CPU. A buffer monitoring circuit is connected to an input terminal of the trace buffer and to a predetermined control terminal of the CPU. The CPU executes various types of data processing requested by a program and outputs trace data indicating an execution history. The trace buffer temporarily stores the trace data that is output in parallel by the CPU. When a usage amount of the trace buffer exceeds a preset threshold, the buffer monitoring circuit sends an interrupt signal BRKINT to the CPU to suspend the data processing of the CPU and, when a preset period of time elapses, releases the suspension of data processing of the CPU.

Abstract: A method and an apparatus for selecting test sequences that comprises preparing tree-structured state transition data associated with state transition weights from state transition data, extracting test sequences from the tree-structured state transition data, and repeating processes of determining averaged weight for each of the test sequences, selecting a test sequence by which the average is maximum, and decrementing the weights contained in the selected test sequence by one unit to prioritize the test sequences.