Abstract: A method for fabricating a semiconductor device includes forming a first high-k (HK) dielectric layer over a substrate, performing a wet treatment process to the first HK dielectric layer. The wet treatment includes a dopant. The method also includes performing an annealing process to the first HK dielectric layer such that the dopant diffuses into the first HK dielectric layer to form a modified HK dielectric layer. Therefore the modified HK dielectric layer has a second dielectric constant which is different than the first dielectric constant.

Abstract: A method of generating white light pulses (2) with a white light generation device (100) includes the steps of coupling pump laser pulses (1) into a white light generation crystal (10), generating the white light pulses (2) by an optically non-linear conversion of the pump laser pulses (1) in the white light generation crystal (10) and detecting at least one pulse characteristic of at least one of the pump laser pulses (1) and the white light pulses (2), wherein the white light generation device (100) is controlled using a control loop device (30) and the white light generation device (100) is adjusted in dependency on the at least one detected pulse characteristic. Furthermore, a white light generation device (100) for generating white light pulses (2) is described.

Abstract: A hybrid external cavity laser and a method for configuring the laser having a stabilized wavelength is disclosed. The laser comprises a semiconductor gain section and a volume Bragg grating, wherein a laser emission from the semiconductor gain section is based on a combination of a reflectivity of a front facet of the semiconductor gain section and a reflectivity of the volume Bragg grating and the reflectivity of the semiconductor gain section and the volume Bragg grating are insufficient by themselves to support the laser emission. The hybrid cavity laser further comprises an etalon that provides further wavelength stability.

Abstract: Laser with extended mode-hop free spectral tuning ranges and methods for manufacturing such lasers are disclosed. In an embodiment the method includes providing a light emitting device, the light emitting device comprising a gain region and a first wavelength selection region and mounting the light emitting device on a thermally conductive carrier such that the gain region is mounted on a first carrier surface and the first wavelength selection region is arranged over and spaced apart from a second carrier surface.

Abstract: Packaged semiconductor devices and methods of packaging thereof are disclosed. In some embodiments, a packaged semiconductor device includes a first device and a second device coupled to the first device. The second device includes an integrated circuit die covered by a molding compound. An over-mold structure is disposed over the second device.

Abstract: Provided is a fabrication method of a non-volatile memory device having a zigzag body wiring. First word lines and second word lines are formed on a substrate, wherein the first word lines and the second word lines are arranged periodically and extend in a first direction. Bit lines are formed over the first and second word lines, wherein a first distance from the first word lines to the substrate is smaller than a second distance from the second word lines to the substrate.

Abstract: In an embodiment, a process of forming an electronic device can include providing a semiconductor substrate having a first major side and an electronic component at least partly within the semiconductor substrate along the first major side; The process can further include thinning the semiconductor substrate to define a second major surface along a second major side opposite the first major side; and selectively removing a portion of the semiconductor substrate along the second major side to define a trench having a distal surface. The process can further include forming a feature adjacent to or within the trench. The feature can include a doped region, a conductive structure, or the like. In another embodiment, an electronic device can include the semiconductor substrate and a conductive structure within a trench. The conductive layer can laterally surround a pillar within the trench.

Abstract: Methods and systems for optoelectronics transceivers integrated on a CMOS chip are disclosed and may include receiving optical signals from optical fibers via grating couplers on a top surface of a CMOS chip, which may include a guard ring. Photodetectors may be integrated in the CMOS chip. A CW optical signal may be received from a laser source via grating couplers, and may be modulated using optical modulators, which may be Mach-Zehnder and/or ring modulators. Circuitry in the CMOS chip may drive the optical modulators. The modulated optical signal may be communicated out of the top surface of the CMOS chip into optical fibers via grating couplers. The received optical signals may be communicated between devices via waveguides. The photodetectors may include germanium waveguide photodiodes, avalanche photodiodes, and/or heterojunction diodes. The CW optical signal may be generated using an edge-emitting and/or a vertical-cavity surface emitting semiconductor laser.

Abstract: A vertical-cavity surface-emitting laser diode includes: a first resonator that has a plurality of semiconductor layers comprising a first current narrowing structure having a first conductive region and a first non-conductor region; a first electrode that supplies electric power to drive the first resonator; a second resonator that has a plurality of semiconductor layers comprising a second current narrowing structure having a second conductive region and a second non-conductive region and that is formed side by side with the first resonator, the second current narrowing structure being formed in same current narrowing layer as the layer where the first current narrowing structure is formed; and a coupling portion as defined herein; and an equivalent refractive index of the coupling portion is smaller than an equivalent refractive index of each of the first resonator and the second resonator.

Abstract: A laser pumping method pumps a primary amount of energy into a laser medium to populate an intermediate level near an upper laser level. A lesser amount of energy is pumped into the laser medium to populate an excited level that lies above the upper laser level and transfers atomic or molecular population to the upper laser level by a nonradiative process. A laser device includes a laser medium supporting four levels, including a lower laser level, an upper laser level, an excited level above the laser level from which population transfers to the upper laser level via nonradiative transition, and an intermediate level within a few kT of the upper laser level.

Abstract: A damping circuit having an input terminal and an output terminal is described. The damping circuit comprises a driver having an input and an output; an RC circuit coupled between the input terminal and the output; and a resistor coupled between the output and the output terminal, wherein the RC circuit delays passing a signal from the output terminal to the input terminal and a low impedance associated with the driver generally reduces ringing.

Abstract: A semiconductor laser device comprises a base, a first conductive layer, a second conductive layer, a third conductive layer, and a semiconductor laser chip in this order, each of which has a respective emitting-side end portion. The emitting-side end portion of the first conductive layer is in a common plane with the emitting-side end portion of the base. A thickness of the second conductive layer is greater than a thickness of the first conductive layer. The emitting-side end portion of the second conductive layer is disposed inward of the emitting-end portion of the first conductive layer. The emitting-side end portion of the third conductive layer is in a common plane with the emitting-side end portion of the second conductive layer. The emitting-side end portion of the semiconductor laser chip is disposed outward of the emitting-side end portion of the third conductive layer.

Abstract: This disclosure provides systems, methods, and apparatus related to nanometer scale lasers. In one aspect, a device includes a substrate, a line of metal disposed on the substrate, an insulating material disposed on the line of metal, and a line of semiconductor material disposed on the substrate and the insulating material. The line of semiconductor material overlaying the line of metal, disposed on the insulating material, forms a plasmonic cavity.

Abstract: A chip package may include: a first die; at least one second die disposed over the first die; and a lid disposed over lateral portions of the first die and at least partially surrounding the at least one second die, the lid having inclined sidewalls spaced apart from and facing the at least one second die.

Abstract: An optical semiconductor device includes: an active region which includes an active layer which produces light when current is injected therein, a first diffraction grating layer having a first diffraction grating with a prescribed grating period, and a phase shift portion formed within the first diffraction grating layer, wherein the phase shift portion provides a phase shift not smaller than 1.5? but not larger than 1.83?; and a distributed reflection mirror region which is optically coupled to a first end of the active region as viewed along a direction of an optical axis, and which includes a second diffraction grating which reflects the light produced by the active region back into the active region.

Abstract: An LED module includes a submount having a face in a thickness direction thereof, an LED chip bonded to the face of the submount with a first bond, and a patterned wiring circuit electrically connected to the LED chip. The first bond transmits light emitted from the LED chip. The submount is a light-transmissive member having light diffusing properties, and a planar size larger than a planar size of the LED chip. The patterned wiring circuit is provided on the face of the submount so as not to overlap the LED chip. The submount is constituted by a plurality of light-transmissive layers which are stacked in the thickness direction and have different optical properties so that a light-transmissive layer of the plurality of light-transmissive layers which is farther from the LED chip is higher in reflectance in a wavelength range of the light emitted from the LED chip.

Abstract: A package includes a device die, a molding material molding the device die therein, a through-via penetrating through the molding material, and an alignment mark penetrating through the molding material. A redistribution line is on a side of the molding material. The redistribution line is electrically coupled to the through-via.

Abstract: Laser with extended mode-hop free spectral tuning ranges and methods of manufacture such lasers are disclosed. In one embodiment an electrical device includes a carrier and a light emitting device including an active region and a first passive region disposed on a first side of the active region, wherein the active region of the light emitting device is disposed on the carrier while the first passive region is thermally floating.

Abstract: Method in which, in order to actuate a wavelength-tunable laser diode in a spectrometer, a power-time function is predetermined instead of a current-time function, wherein the laser diode is tuned periodically over a wavelength range in accordance with the power-time function. For this purpose, a current profile (i) with which the laser diode is actuated is determined from the power-time function and measured values of the voltage (u) present at the laser diode.

Abstract: An assembly of metallic MEMS structures directly fabricated on planarized CMOS substrates, containing the application-specific integrated circuit (ASIC), by direct deposition and subsequent microfabrication steps on the ASIC interconnect layers, with integrated capping for packaging, is provided. The MEMS structures comprise at least one MEMS device element, with or without moveable parts anchored on the CMOS ASIC wafer with electrical contact provided via the metallic interconnects of the ASIC. The MEMS structures can also be made of metallic alloys, conductive oxides and amorphous semiconductors. The integrated capping, which provides a sealed cavity, is accomplished through bonding pads defined in the post-processing of the CMOS substrate.