Patents Examined by Sheng-Jen Tsai
  • Patent number: 11782611
    Abstract: Data encrypted using a first device-specific key of a first host device is written to a first logical storage device of a storage system. The storage system generates a copy of the first logical storage device, and associates the copy of the first logical storage device with a second logical storage device of the storage system. Data encrypted using a second device-specific key of a second host device is written to the second logical storage device of the storage system. Responsive to a request from the second host device for particular data of the second logical storage device, the storage system determines if the particular data was encrypted using the first key or the second key, and provides the second host device with the particular data and an indication of a result of the determination.
    Type: Grant
    Filed: April 13, 2021
    Date of Patent: October 10, 2023
    Assignee: EMC IP Holding Company LLC
    Inventors: Tomer Shachar, Arieh Don, Yevgeni Gehtman, Maxim Balin
  • Patent number: 11782601
    Abstract: Embodiments of the present invention are directed to an instruction set of an object memory fabric. This object memory fabric instruction set can be used to define arbitrary, parallel functionality such as: direct object address manipulation and generation without the overhead of complex address translation and software layers to manage differing address space; direct object authentication with no runtime overhead that can be set based on secure 3rd party authentication software; object related memory computing in which, as objects move between nodes, the computing can move with them; and parallelism that is dynamically and transparent based on scale and activity. These instructions are divided into three conceptual classes: memory reference including load, store, and special memory fabric instructions; control flow including fork, join, and branches; and execute including arithmetic and comparison instructions.
    Type: Grant
    Filed: January 20, 2016
    Date of Patent: October 10, 2023
    Assignee: Ultrata, LLC
    Inventors: Steven J. Frank, Larry Reback
  • Patent number: 11782615
    Abstract: An information processing system includes a data processing apparatus and multiple storage apparatuses. The data processing apparatus stores, into a memory, write data to be written to a first storage apparatus, and sends, to the first storage apparatus, a first transfer request containing information of a storing location of the write data in the memory. The first storage apparatus executes a transfer process to read the write data from the storing location, and writes the write data to a first storage area in the first storage apparatus; sends, to a second storage apparatus, a second transfer request instructing a transfer of the write data from the memory to the second storage apparatus; and sends, to a third storage apparatus, a third transfer request instructing a transfer of the write data from the first storage area to the third storage apparatus.
    Type: Grant
    Filed: October 2, 2020
    Date of Patent: October 10, 2023
    Assignee: FUJITSU LIMITED
    Inventor: Osamu Shiraki
  • Patent number: 11755201
    Abstract: Embodiments of the invention provide systems and methods to implement an object memory fabric including hardware-based processing nodes having memory modules storing and managing memory objects created natively within the memory modules and managed by the memory modules at a memory layer, where physical address of memory and storage is managed with the memory objects based on an object address space that is allocated on a per-object basis with an object addressing scheme. Each node may utilize the object addressing scheme to couple to additional nodes to operate as a set of nodes so that all memory objects of the set are accessible based on the object addressing scheme, which defines invariant object addresses for the memory objects that are invariant with respect to physical memory storage locations and storage location changes of the memory objects within the memory module and across all modules interfacing the object memory fabric.
    Type: Grant
    Filed: January 20, 2016
    Date of Patent: September 12, 2023
    Assignee: Ultrata, LLC
    Inventors: Steven J. Frank, Larry Reback
  • Patent number: 11755224
    Abstract: A technique manages data in slices of difference sizes within different storage tiers. The technique involves, based on access activity for first data currently residing within a first slice having a first size, selecting a target set of storage devices within which to store the first data from among multiple sets of storage devices. The technique further involves moving the first data from the first slice having the first size to a second slice having a second size that is different from the first size. The technique further involves, after the first data is moved from the first slice to the second slice, storing the second slice in the target set of storage devices.
    Type: Grant
    Filed: July 27, 2017
    Date of Patent: September 12, 2023
    Assignee: EMC IP Holding Company LLC
    Inventor: Nickolay Alexandrovich Dalmatov
  • Patent number: 11755202
    Abstract: Embodiments of the invention provide systems and methods to implement a hardware-based multi-node processing system of an object memory fabric. Hardware-based processing nodes operatively coupled may each include object memory modules storing and managing memory objects, each memory object being created natively within the memory module and managed by the memory module at a memory layer, and each memory object including memory object data and memory object metadata. The memory object metadata may include triggers that specify additional operations to be executed by any object memory module of the hardware-based processing nodes when the respective memory object is located at the respective object memory module and accessed as part of the respective object memory module processing requests.
    Type: Grant
    Filed: January 20, 2016
    Date of Patent: September 12, 2023
    Assignee: Ultrata, LLC
    Inventors: Steven J. Frank, Larry Reback
  • Patent number: 11740824
    Abstract: An apparatus comprises at least one processing device comprising a processor coupled to a memory. The at least one processing device is configured to obtain usage information for each of two or more storage systems of a storage cluster, and to determine a wear level of each of the storage systems of the storage cluster based at least in part on the obtained usage information. The at least one processing device is also configured to identify a wear level imbalance of the storage cluster based at least in part on the determined wear levels of each of the storage systems of the storage cluster. The at least one processing device is further configured, responsive to the identified wear level imbalance of the storage cluster being greater than an imbalance threshold, to move storage objects between the storage systems of the storage cluster.
    Type: Grant
    Filed: February 23, 2021
    Date of Patent: August 29, 2023
    Assignee: Dell Products L.P.
    Inventors: Chi Chen, Hailan Dong
  • Patent number: 11740833
    Abstract: A memory system having memory components and a processing device to: receive, from a host system, write commands to store data in the memory components; store the write commands in a buffer; execute at least a portion of the write commands; determine an amount of available capacity of the buffer that becomes available after execution of at least the portion of the write commands; receive, from the host system, a request for information about available capacity of the buffer; and determine whether to transmit a response signal corresponding to the request based at least in part on the amount of available capacity.
    Type: Grant
    Filed: March 11, 2021
    Date of Patent: August 29, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Dhawal Bavishi, Trevor Conrad Meyerowitz
  • Patent number: 11726692
    Abstract: A method, a computer system, and a computer program product for tiering migration for storage system optimization is provided. Embodiments of the present invention may include determining to move data based on access counters to balance a workload between storage drives and storage tiers. Embodiments of the present invention may include establishing a connection with an interconnect application program interface. Embodiments of the present invention may include collecting and converting physical access counters. Embodiments of the present invention may include collecting heat map data. Embodiments of the present invention may include calculating a tiering migration plan for an internal map change event.
    Type: Grant
    Filed: December 2, 2020
    Date of Patent: August 15, 2023
    Assignee: International Business Machines Corporation
    Inventors: Grzegorz Piotr Szczepanik, Kushal S. Patel, Sarvesh S. Patel, Lukasz Jakub Palus
  • Patent number: 11681438
    Abstract: A system can determine to produce a storage device for a user identity indicative of a user. The system can determine a number of extra disks to include with the storage device as part of the production, the extra disks enabling further storage capacity for the storage device beyond a specified storage capacity, the determining of the number of extra disks being based on data from a group of data, the group of data comprising first cost data representative of a first cost associated with including the second number of extra disks, probability data representative of a probability that the further storage capacity beyond the specified storage capacity will be requested during a defined time period after the production, and second cost data representative of a second cost associated with installing the second number of extra disks after the storage device has been delivered to the user site.
    Type: Grant
    Filed: May 28, 2021
    Date of Patent: June 20, 2023
    Assignee: DELL PRODUCTS L.P.
    Inventors: Nadav Azaria, Avitan Gefen
  • Patent number: 11669570
    Abstract: An aspect of implementing amortized execution of updates for a hash table includes aggregating, within a data structure, updates to be executed for the hash table. The aggregated updates are distributed across a plurality of chunks in the data structure. An aspect also includes sorting, within each of the chunks, the updates according to respective bucket index values associated with the updates, and iteratively executing the sorted updates across each of the chunks in the data structure.
    Type: Grant
    Filed: October 31, 2019
    Date of Patent: June 6, 2023
    Inventors: Bar Harel, Uri Shabi, Maor Rahamim
  • Patent number: 11656773
    Abstract: An apparatus comprises at least one processing device comprising a processor coupled to a memory. The at least one processing device is configured to obtain input data representing information characterizing a storage capacity associated with a file system of a given storage system. The at least one processing device is also configured to predict a change to the storage capacity of the file system of the given storage system based on at least a portion of the obtained input data. The at least one processing device is further configured to cause the storage capacity of the file system of the given storage system to change based on a result of the prediction.
    Type: Grant
    Filed: April 28, 2020
    Date of Patent: May 23, 2023
    Assignee: EMC IP Holding Company LLC
    Inventors: Davidson Devasigamony, Deepak Kamath Neerebailur
  • Patent number: 11635903
    Abstract: A data storage change is received for a piece of data, wherein the data storage change is from a first location to a second location. Two or more possible paths to perform the data storage change are determined. A plurality of weights for each path of the two or more paths is determined. A weighted transfer time for each path of the two or more paths is determined.
    Type: Grant
    Filed: June 15, 2021
    Date of Patent: April 25, 2023
    Assignee: International Business Machines Corporation
    Inventors: Koichi Masuda, Shinsuke Mitsuma, Eiji Tosaka, Naoki Imai, Yuki Asakura
  • Patent number: 11635904
    Abstract: The present disclosure relates to technical field of data access, and discloses a matrix storage method, a matrix access method, an apparatus and an electronic device in the technical field of data access. The matrix storage method includes: dividing a matrix into a plurality of data blocks with a preset segmentation granularity of N rows×M columns; the plurality of data blocks includes at least one first data block of N rows×M columns; if the column number of the matrix is not an integer multiple of M, the plurality of data blocks further includes at least one second data block of N rows×P columns, the second data block is aligned with an adjacent row of first data block; and storing the data in each of the first data blocks and the second data blocks continuously in an off-chip storage.
    Type: Grant
    Filed: June 22, 2020
    Date of Patent: April 25, 2023
    Assignee: KUNLUNXIN TECHNOLOGY (BEIJING) COMPANY LIMITED
    Inventors: Yuan Ruan, Haoyang Li
  • Patent number: 11630580
    Abstract: A method of a flash controller to be coupled between a flash memory device and a host device is provided. The flash memory device has a plurality of blocks each having a plurality of pages, and the method comprises: receiving a trim/erase/unmap command from the host device; obtaining a storage space, which is to be erased, from the trim/erase/unmap command; comparing a space size of the storage space with a threshold to determine whether the space size is larger than the threshold; and resetting valid page counts of the plurality of blocks of the flash memory device when the space size is larger than the threshold.
    Type: Grant
    Filed: January 20, 2021
    Date of Patent: April 18, 2023
    Assignee: Silicon Motion, Inc.
    Inventor: Hsu-Ping Ou
  • Patent number: 11609845
    Abstract: The present memory restoration system enables a collection of computing systems to prepare inactive rewritable memory for reserve and future replacement of other memory while the other memory is active and available for access by a user of the computing system. The preparation of the reserved memory part is performed off-line in a manner that is isolated from the current user of the active memory part. Preparation of memory includes erasure of data, reconfiguration, etc. The memory restoration system allows for simple exchange of the reserved memory part, once the active memory part is returned. The previously active memory may be concurrently recycled for future reuse in this same manner to become a reserved memory. This enables the computing collection infrastructure to “swap” to what was previously the inactive memory part when a user vacates a server, speeding up the server wipe process.
    Type: Grant
    Filed: May 26, 2020
    Date of Patent: March 21, 2023
    Assignee: Oracle International Corporation
    Inventors: Tyler Vrooman, Graham Schwinn, Greg Edvenson
  • Patent number: 11609697
    Abstract: A system that implements a scaleable data storage service may maintain tables in a data store on behalf of storage service clients. The service may maintain data in partitions stored on respective computing nodes in the system. The service may support multiple throughput models, including a committed throughput model and a best effort throughput model. A service request to create a table may specify that requests directed to the table should be serviced under a committed throughput model and may specify the committed throughput level in terms of logical service request units. The service may reserve low-latency storage and other resources sufficient to meet the specified committed throughput level. A client/user may request a modification to the committed throughput level in anticipation of workload changes, such as an increase or decrease in traffic or data volume. In response, the system may increase or decrease the resources reserved for the table.
    Type: Grant
    Filed: December 23, 2020
    Date of Patent: March 21, 2023
    Assignee: Amazon Technologies, Inc.
    Inventors: Swaminathan Sivasubramanian, Stefano Stefani, Wei Xiao, Timothy Andrew Rath, Rande A. Blackman, Grant Alexander MacDonald McAlister, Raymond S. Bradford
  • Patent number: 11586367
    Abstract: Methods, systems, and devices for operating a memory array are described. A memory controller may be configured to provide enhanced bandwidth on a command/address (C/A) bus, which may have a relatively low pin count, through use of a next partition command that may repeat an array command from a current partition at a different partition indicated by the next partition command. Such a next partition command may use fewer clock cycles than a command that includes a complete instruction and memory location information.
    Type: Grant
    Filed: July 15, 2021
    Date of Patent: February 21, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Shekoufeh Qawami, Rajesh Sundaram
  • Patent number: 11579781
    Abstract: Distributed storage nodes having specialized hardware can be pooled for servicing data requests. For example, a distributed storage system can include a group of storage nodes. The distributed storage system can determine a subset of storage nodes that include the specialized hardware based on status information received from the group of storage nodes. The specialized hardware can be preconfigured with specialized functionality. The distributed storage system can then generate a node pool that includes the subset of storage nodes with the specialized hardware. The node pool can be configured to perform the specialized functionality in relation to a data request.
    Type: Grant
    Filed: October 23, 2020
    Date of Patent: February 14, 2023
    Assignee: RED HAT, INC.
    Inventors: Gabriel Zvi BenHanokh, Brett Niver
  • Patent number: 11579774
    Abstract: Embodiments of the invention provide systems and methods for managing processing, memory, storage, network, and cloud computing to significantly improve the efficiency and performance of processing nodes. More specifically, embodiments of the present invention are directed to an instruction set of an object memory fabric. This object memory fabric instruction set can include trigger instructions defined in metadata for a particular memory object. Each trigger instruction can comprise a single instruction and action based on reference to a specific object to initiate or perform defined actions such as pre-fetching other objects or executing a trigger program.
    Type: Grant
    Filed: January 20, 2016
    Date of Patent: February 14, 2023
    Assignee: Ultrata, LLC
    Inventors: Steven J. Frank, Larry Reback