Patents Examined by Steven H. Ver Steeg
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Patent number: 6159829Abstract: An enhancement of an electrically written memory element utilizing the motion of protons within a dielectric layer surrounded by layers on either side to confine the protons within the dielectric layer with electrode means attached to the surrounding layers to change the spatial position of the protons within the dielectric layer. The device is preferably constructed as a silicon-silicon dioxide-silicon layered structure with the protons being introduced to the structure during an anneal in an atmosphere containing hydrogen gas. Device operation is enhanced by concluding this anneal step with a sudden cooling. The device operates at low power, is preferably nonvolatile, is radiation tolerant, and is compatible with convention silicon MOS processing for integration with other microelectronics elements on the same silicon substrate.Type: GrantFiled: April 22, 1998Date of Patent: December 12, 2000Inventors: William L. Warren, Karel J. R. Vanheusden, Daniel M. Fleetwood, Roderick A. B. Devine, Leo B. Archer, George A. Brown, Robert M. Wallace
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Patent number: 6153062Abstract: PtMn films are used as antiferromagnetic layers of a dual spin-valve type magnetoresistive sensor. An exchange anisotropic magnetic field is achieved regardless of whether the PtMn film is formed over or under the pinned magnetic layer. Also, an effective exchange anisotropic magnetic field is produced even with heat treatment at a relatively low temperature. Alternatively, a PtMn film is used as an antiferromagnetic layer of a spin-valve film laminate. The use of a PtMn film enables a sufficient exchange anisotropic magnetic field to be produced even with a relatively low heat treatment temperature and a relatively small film thickness. Therefore, the number of total layers of the spin-valve film laminate can be increased to increase a magnetoresistance ratio, and a total thickness of the spin-valve film laminate can be made relatively small.Type: GrantFiled: December 10, 1998Date of Patent: November 28, 2000Assignee: Alps Electric Co., Ltd.Inventors: Masamichi Saito, Toshinori Watanabe
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Patent number: 6149776Abstract: The present invention generally provides an apparatus and a method for physical vapor deposition of a metal onto a substrate comprising a physical vapor deposition chamber and a target disposed in an upper portion of the chamber. The target comprises a backing plate having a central portion and a flange portion attachable to the physical vapor deposition chamber, a sputterable portion extending from the central portion of the backing plate, and an annular ridge disposed on a surface of the flange portion. Preferably, the sputterable portion of the target includes a restriction side wall that restricts entry of plasma and back-scattered particles into the dark space gap between an upper shield and the target.Type: GrantFiled: November 12, 1998Date of Patent: November 21, 2000Assignee: Applied Materials, Inc.Inventors: Howard Tang, Imran Hashim, Richard Hong, Peijun Ding
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Patent number: 6146504Abstract: The present invention provides optimized designs that allow the coverage of the full surface of a receiving face in a substrate while at the same time reducing material deposition on the edge of the substrate, material deposition on and/or scratching of the backside of the substrate. While the methods and apparatus of the invention are described within the framework of aluminum deposition chambers, it is contemplated that the invention will be equally effective in all other semiconductor processing chambers where avoiding edge and/or backside deposition, scratching, and/or sticking may be desirable. The invention provides a support member having a deposit collection channel with slanted walls to trap deposit particles that do not depose of the substrate thus preventing deposition and sticking in the backside of a processed substrate.Type: GrantFiled: May 21, 1998Date of Patent: November 14, 2000Assignee: Applied Materials, Inc.Inventors: Nalin Patadia, Charles Carlson
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Patent number: 6137660Abstract: A magnetoresistive read/recording head for use in a fixed disk drive data storage device is formed by the steps of first, photolithographically depositing the head on one surface of a slider block, second, applying, a conductive film preferably of carbon or a silicon/carbon multi-layer film over the head and onto the block surface, and then milling the write tip portion of the head with a focused ion beam. The remaining conductive film is then removed in an oxygen plasma which chemically removes the remaining conductive film. The conductive layer is transparent to the focused ion beam and conducts electrostatic charge away from the head during the milling operation thus preventing electrostatic discharges from occurring which otherwise would damage the head.Type: GrantFiled: December 29, 1997Date of Patent: October 24, 2000Assignee: Matsushita-Kotobuki ElectronicsInventors: Charles Partee, James R. Carter
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Patent number: 6132585Abstract: The present invention aims to provide a highly reliable semiconductor element with high performance, and a fabrication method for such highly reliable semiconductor with excellent mass producibility. The photovoltaic elements comprise an electric conductor, semiconductor regions and a transparent conductor layer, which are sequentially formed on a substrate. The shunt resistance in the semiconductor element is rendered in the range from 1.times.10.sup.3 .OMEGA.cm.sup.2 to 1.times.10.sup.6 .OMEGA.cm.sup.2 by performing a forming treatment and a short circuit passivation treatment after forming the transparent conductor layer, and then selectively covering with insulation the defective portions with a cationic or anionic electrodeposited resin, or performing a forming treatment, after forming the semiconductor layers, then selectively covering with insulation the defective portions with a cationic or anionic electrodeposited resin, and then forming the transparent conductor layer.Type: GrantFiled: November 15, 1996Date of Patent: October 17, 2000Assignee: Canon Kabushiki KaishaInventors: Takafumi Midorikawa, Tsutomu Murakami, Takahiro Mori, Hirofumi Ichinose
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Patent number: 6130010Abstract: In a method for producing a semiconductor dynamic sensor, an anisotropic etching mask is formed on a (100) crystal orientation silicon substrate with a main portion and form-compensation portions formed at the corners of the main portion. Each of the form-compensation portions has a rectangular shape with a long side and a short side. Further, one of the long and short sides of the etching mask stretches in the [011] direction of the silicon substrate, and the other side stretches in the [011] direction of the silicon substrate. As a result, the silicon substrate can be etched into a predetermined shape without making large corner-undercut portions on a non-etched portion corresponding to the main portion of the mask.Type: GrantFiled: December 23, 1996Date of Patent: October 10, 2000Assignee: Denso CorporationInventors: Seiichiro Ishio, Kenichi Ao
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Patent number: 6086725Abstract: Improved targets for use in DC magnetron sputtering of nickel or like ferromagnetic face-centered cubic (FCC) metals are disclosed for forming metallization films having effective edge-to-edge deposition uniformity of 5%(3.sigma.) or better. Such targets may be characterized as having: (a) a homogeneous texture mix that is at least 20% of a <200> texture content and less than 50% of a <111> texture content, (b) an initial pass-through flux factor (% PTF) of about 30% or greater; and (c) a homogeneous grain size of about 200 .mu.m or less.Type: GrantFiled: April 2, 1998Date of Patent: July 11, 2000Assignee: Applied Materials, Inc.Inventors: Murali Abburi, Seshadri Ramaswami
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Patent number: 6087580Abstract: A high quality non-single-crystal silicon alloy material including regions of intermediate range order (IRO) silicon alloy material up to but not including the volume percentage required to form a percolation path within the material. The remainder of the material being either amorphous or a mixture of amorphous and microcrystalline materials. The materials were prepared by CVD using differing amounts of hydrogen dilution to produce materials containing differing amounts of IRO material. Preferably the material includes at least 8 volume percent of IRO material.Type: GrantFiled: December 12, 1996Date of Patent: July 11, 2000Assignee: Energy Conversion Devices, Inc.Inventors: Stanford R. Ovshinsky, Subhendu Guha, Chi-Chung Yang, Xunming Deng, Scott Jones
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Patent number: 6083566Abstract: The present invention relates in a system and method for handling and processing substrates for magnetic and optical media and other types of substrates, such as wafers and lenses, requiring thin-film coatings. The system includes input and output locks which act as buffers between atmosphere and the high vacuum within the system and a transfer/main chamber which is comprised of a variable number of chamber modules. The system also includes various mechanisms for moving the substrates and the substrate carriers within the system, and components for dealing with the process and environmental requirements.Type: GrantFiled: May 26, 1998Date of Patent: July 4, 2000Inventor: Andrew B. Whitesell
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Patent number: 6077404Abstract: A method and apparatus for reflowing a material layer is provided. The inventive method introduces into a reflow chamber a material which is at least as reactive or more reactive than a material to be reflowed (i.e., a gettering material). Preferably the gettering material is sputter deposited within the reflow chamber while a shield prevents the gettering material from reaching the material layer to be reflowed. The shield may be coupled to, or integral with a clamp for clamping a wafer (containing the material layer to be reflowed) to a wafer support provided sufficient venting exists so that contaminants degassed from the wafer may flow to the region between the sputtering target and the shield where the contaminants can react with gettering material.Type: GrantFiled: February 17, 1998Date of Patent: June 20, 2000Assignee: Applied Material, Inc.Inventors: Hougong Wang, Steve Lai, Gongda Yao, Peijun Ding
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Patent number: 6077370Abstract: Monolithic metal oxide structures, and processes for making such structures, are disclosed. The structures are obtained by heating a metal-containing structure having a plurality of surfaces in close proximity to one another in an oxidative atmosphere at a temperature below the melting point of the metal while maintaining the close proximity of the metal surfaces. Exemplary structures of the invention include open-celled and closed-cell monolithic metal oxide structures comprising a plurality of adjacent bonded corrugated and/or flat layers, and metal oxide filters obtained from a plurality of metal filaments oxidized in close proximity to one another.Type: GrantFiled: May 15, 1998Date of Patent: June 20, 2000Assignee: American Scientific Materials Technologies, L.P.Inventors: Konstantin Solntsev, Eugene Shustorovich, Sergei Myasoedov, Vyacheslav Morgunov, Andrei Chernyavsky, Yuri Buslaev, Richard Montano, Alexander Shustorovich
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Patent number: 6057073Abstract: A toner for developing an electrostatic image has toner particles containing at least a binder resin and a colorant, and an inorganic fine powder. The inorganic fine powder has been treated with a silicone oil having, in its molecular weight distribution as measured by gel permeation chromatography, at least one peak value in the region of molecular weight of from 500 to 15,000 and having at least one peak value or shoulder in the region of molecular weight of from 3,000 to 100,000 at a value greater than the former peak value.Type: GrantFiled: June 25, 1996Date of Patent: May 2, 2000Assignee: Canon Kabushiki KaishaInventor: Kazuyoshi Hagiwara
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Phase shifted mask design system, phase shifted mask and VLSI circuit devices manufactured therewith
Patent number: 6057063Abstract: A process for creating and verifying a design of phase-shifted masks utilizing at least one phase shift region employing a computer-aided design system. A chip design is provided. A phase-shift mask design capable of producing the chip design is created. Features in a design of the phase-shifted mask that require phase shifting are located. Uncolored phase regions are created on opposite sides of the features. Proper phase termination of the phase regions is ensured based upon space constraints of a phase-shifted mask technique utilized. Phases are determined for the phase regions. Whether coloring errors and un-phase-shiftable design features exist is determined. Mask process specific overlaps and expansions are applied to the mask design to prepare designed data levels for mask manufacture. A residual phase edge image removal design is derived.Type: GrantFiled: April 14, 1997Date of Patent: May 2, 2000Assignee: International Business Machines CorporationInventors: Lars W. Liebmann, Ioana C. Graur, Young O. Kim, Mark A. Lavin, Alfred K. Wong -
Patent number: 6051115Abstract: An adhesive strength increasing method which does not need a bulky apparatus such as an ion implantation apparatus and prevent the characteristic of a material from being degraded by using a high level current ion of a low level energy, thus increasing an adhesive strength between a metal thin film and a glass substrate. In the present invention, a metal is deposited on a substrate an inert gas or a reactive gas having a predetermined energy is irradiatd to the deposited metal thin film, and then the metal thin film is sealed, thus increasing an adhesive strength between a metal thin film and a glass substrate.Type: GrantFiled: July 15, 1997Date of Patent: April 18, 2000Assignee: Korea Institute of Science and TechnologyInventors: Hong Kyu Jang, Seok Keun Koh, Hyung Jin Jung, Won Kook Choi
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Patent number: 6045976Abstract: An optical exposure method in photolithography applied for precise processing when semiconductor devices are produced. A pattern on a photomask is projected and exposed on a register on a base plate with an exposure device including a deformation illumination system, a photomask and a projection lens. The deformation illumination system is composed of a light source, a diaphragm and a condenser lens, and the diaphragm is provided with a linear through-hole. The optical exposure method uses a ray of linear light for illumination or two rays of linear light for illumination that are parallel with the pattern. The two rays of linear light are symmetrical with respect to an optical axis. These rays are parallel with the pattern in a position separate from the optical axis of the exposure device when the photomask pattern is a line and space pattern.Type: GrantFiled: October 25, 1996Date of Patent: April 4, 2000Assignee: Fujitsu, LimitedInventors: Tamae Haruki, Kenji Nakagawa, Masao Taguchi, Hiroyuki Tanaka, Satoru Asai, Isamu Hanyu
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Patent number: 6043105Abstract: A method of manufacturing a semiconductor device having a non-single crystalline semiconductor layer including an intrinsic or substantially instrinsic silicon which contains hydrogen or halogen and is formed on a substrate in a reaction chamber which may have a substrate holder. Sodium is removed from the inside of the reaction chamber and/or the surface of the substrate holder to remove sodium therefrom so that the concentration of sodium in the semiconductor layer is preferably 5.times.10.sup.18 atoms/cm.sup.3 or less.Type: GrantFiled: September 12, 1997Date of Patent: March 28, 2000Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventor: Shunpei Yamazaki
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Patent number: 6033995Abstract: The invention relates to a method for integrating semiconductor device epilayers with arbitrary host substrates, where an indium gallium arsenide etch-stop layer (34) is deposited on an indium phosphide growth substrate (32) and device epilayers (36, 38) are grown on the etch-stop layer in inverse order from their final orientation. The device epilayers are then joined to an aluminum nitride host substrate (42) by inverting the growth substrate and device epilayers. The epilayers are bonded to the host substrate using mono-molecular layer forming bonding material and the growth substrate is selectively etched away from the device epilayers. As a result of the inverse epilayer growth, the epilayers are not removed from the growth substrate prior to bonding to the host substrate, thus protecting the device epilayers and reducing processing steps. Additionally, by mono-molecular bonding, sturdy semiconductor devices are formed with low thermal impedance.Type: GrantFiled: September 16, 1997Date of Patent: March 7, 2000Assignee: TRW Inc.Inventor: Heinrich G. Muller
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Patent number: 6030511Abstract: A collimated sputtering method that enables to improve the deposition rate per applied unit power and the bottom coverage is provided. This method contains a step of controlling a condition of a glow discharge in a chamber to increase a rate of a sputtered species that is contained in a specified angle range and that passes through a collimator. The rate of the sputtered species that can pas through the collimator is increased. Also, the rate of the passed species travelling parallel to the normal direction is increased. The sputtering surface of the target contains a crystal plane that is approximately perpendicular to a crystal axis having a shortest interatomic distance.Type: GrantFiled: February 2, 1996Date of Patent: February 29, 2000Assignee: NEC CorporationInventor: Toshiki Shinmura
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Patent number: 6030666Abstract: A method of microwave heating of a substrate in a plasma processing chamber wherein a heatup gas is supplied into the processing chamber, the heatup process gas is energized with microwave power to heat an exposed surface of the substrate, a reactant gas is supplied into the processing chamber and the reactant gas is energized into a plasma gas state to process the substrate.Type: GrantFiled: March 31, 1997Date of Patent: February 29, 2000Assignee: Lam Research CorporationInventors: James Lam, David Hodul