Abstract: A light emitting display device including a first pixel including a first driving transistor, a first input transistor, a first initialization transistor, a first storage capacitor, and a first light emitting diode (LED); and a second pixel including a second driving transistor, a second input transistor, a second initialization transistor, a second storage capacitor, and a second light emitting diode (LED. The first pixel further includes a first gate electrode connecting member connecting a first gate electrode of the first driving transistor and the first input transistor; the second pixel further includes a second gate electrode connecting member connecting a second gate electrode of the second driving transistor and the second input transistor; the first light emitting diode (LED) includes a first anode; the second light emitting diode (LED) includes a second anode; and the first gate electrode connecting member does not overlap the second anode in a plan view.

Abstract: A display panel is disclosed that includes a substrate, a first initialization voltage line, and a second initialization voltage line. The substrate includes a display area and a peripheral area. The first initialization voltage line is arranged in the display area and includes a first vertical voltage line and a first horizontal voltage line. The second initialization voltage line includes a second vertical voltage line and a second horizontal voltage line overlapping the first horizontal voltage line in a plan view. Each of the plurality of pixels includes a first sub-pixel configured to emit light of a first color, and a second sub-pixel configured to emit light of a second color. The first initialization voltage line is configured to transmit a first initialization voltage to one electrode of a light-emitting diode of the first sub-pixel. The second initialization voltage line is configured to transmit a second initialization voltage to one electrode of a light-emitting diode of the second sub-pixel.

Abstract: A device comprising a scalpet assembly including a first investing plate and a scalpet array. The scalpet array includes scalpets rotatably coupled to the first investing plate. Each scalpet includes a first thread on a portion of an outside surface, and a distal end configured as a cylindrical scalpel. The device includes a second investing plate comprising apertures corresponding to the scalpet array. Each aperture includes a second thread configured to receive the first thread. The corresponding scalpet is configured to rotate relative to the second thread and move along an axis of the scalpet relative to the second investing plate.

Abstract: Technologies relating to RRAM crossbar array circuits with specialized interface layers for the low current operations are disclosed. An example apparatus includes: a substrate; a bottom electrode formed on the substrate; a first layer formed on the bottom electrode; an RRAM oxide layer formed on the first layer and the bottom electrode; and a top electrode formed on the RRAM oxide layer. The first layer may be a continuous layer or a discontinuous layer. The apparatus may further comprise a second layer formed between the RRAM oxide layer and the top electrode. The second layer may be a continuous layer or a discontinuous layer.

Abstract: An inorganic coating may be applied to bond optically scattering particles or components. Optically scattering particles bonded via the inorganic coating may form a three dimensional film which can receive a light emission, convert, and emit the light emission with one or more changed properties. The inorganic coating may be deposited using a low-pressure deposition technique such as an atomic layer deposition (ALD) technique. Two or more components, such as an LED and a ceramic phosphor layer may be bonded together by depositing an inorganic coating using the ALD technique.

Abstract: The invention relates in some aspects to a device for use in the transcatheter treatment of mitral valve regurgitation, including steerable guidewires, implantable coaptation assistance devices, anchoring systems for attaching a ventricular projection of an implantable coaptation device, a kit, and methods of using an implantable coaptation assistance device among other methods.

Abstract: Techniques are disclosed herein for creating metal bitlines (BLs) in stacked wafer memory. Using techniques described herein, metal BLs are created on a bottom surface of a wafer. The metal BLs can be created using different processes. In some configurations, a salicide process is utilized. In other configurations, a damascene process is utilized. Using metal reduces the resistance of the BLs as compared to using non-metal diffused BLs. In some configurations, wafers are stacked and bonded together to form three-dimensional memory structures.

Abstract: Various embodiments of the present disclosure are directed towards a method for forming a varactor comprising a reduced surface field (RESURF) region. The method includes forming a drift region having a first doping type within a substrate. A RESURF region having a second doping type is formed within the substrate such that the RESURF region is below the drift region. A gate structure is formed on the substrate. A pair of contact regions is formed within the substrate on opposing sides of the gate structure. The contact regions respectively abut the drift region and have the first doping type, and wherein the first doping type is opposite the second doping type.

Abstract: Devices and methods for treating obesity are provided. More particularly, intragastric devices and methods of fabricating, deploying, inflating, monitoring, and retrieving the same are provided.

Abstract: A display device includes a first lower electrode disposed on a base substrate, a first upper electrode disposed on the first lower electrode, overlapping the first lower electrode in a plan view, including a silicon semiconductor, and constituting a first capacitor together with the first lower electrode, a second lower electrode disposed on the first upper electrode, and a second upper electrode disposed on the second lower electrode, overlapping the second lower electrode in a plan view, including an oxide semiconductor, and constituting a second capacitor together with the second lower electrode.

Abstract: Various embodiments of the present application are directed towards an integrated chip comprising memory cells separated by a void-free dielectric structure. In some embodiments, a pair of memory cell structures is formed on a via dielectric layer, where the memory cell structures are separated by an inter-cell area. An inter-cell filler layer is formed covering the memory cell structures and the via dielectric layer, and further filling the inter-cell area. The inter-cell filler layer is recessed until a top surface of the inter-cell filler layer is below a top surface of the pair of memory cell structures and the inter-cell area is partially cleared. An interconnect dielectric layer is formed covering the memory cell structures and the inter-cell filler layer, and further filling a cleared portion of the inter-cell area.

Abstract: A method of forming interconnects is provided. The method includes forming a plurality of mandrels on an interlayer dielectric (ILD) layer. The method further includes forming sidewall spacers on opposite sides of the each mandrel, wherein a portion of the ILD layer is exposed between adjacent sidewall spacers on adjacent mandrels, and removing the exposed portions of the ILD layer to form a first set of trenches between adjacent sidewall spacers. The method further includes forming a first set of interconnects in the first set of trenches, and removing the mandrels to expose portions of the ILD layer between the sidewall spacers. The method further includes removing the exposed portions of the ILD layer to form a second set of trenches between the sidewall spacers, and forming a second set of interconnects in the second set of trenches.

Abstract: Various embodiments of the systems, methods and devices are provided for breaking up calcified lesions in an anatomical conduit. More specifically, an electrical arc is generated between two spaced-apart electrodes disposed within a fluid-filled balloon, creating a subsonic pressure wave. In some embodiments, the electrodes comprise a plurality of points or extensions that allow the electrical arc to form at any one of the plurality of points to, among other things, extend the electrode life.

Abstract: A display device including: a panel including pixels, a pixel including; an LED; a capacitor between a first voltage line and a node; a first transistor between the first voltage line and a first electrode of the LED; a second transistor between a data line and a source of the first transistor; a third transistor between the node and a drain of the first transistor; a fourth transistor between the node and a second voltage line; a fifth transistor between the first voltage line and the source of the first transistor; a sixth transistor between the first electrode and the drain of the first transistor; and a seventh transistor between the second voltage line and the first electrode, the third and fourth transistor including: an active area including metal oxide; first and second gates above the active area; and a pattern below the active area.

Abstract: A neuromodulation therapy is delivered via at least one electrode implanted subcutaneously and superficially to a fascia layer superficial to a nerve of a patient. In one example, an implantable medical device is deployed along a superficial surface of a deep fascia tissue layer superficial to a nerve of a patient. Electrical stimulation energy is delivered to the nerve through the deep fascia tissue layer via implantable medical device electrodes.

Abstract: A neuromodulation therapy is delivered via at least one electrode implanted subcutaneously and superficially to a fascia layer superficial to a nerve of a patient. In one example, an implantable medical device is deployed along a superficial surface of a deep fascia tissue layer superficial to a nerve of a patient. Electrical stimulation energy is delivered to the nerve through the deep fascia tissue layer via implantable medical device electrodes.

Abstract: A display device includes a substrate including a pixel region and a peripheral region. A plurality of pixels is disposed in the pixel region of the substrate. Each of the plurality of pixels includes a light emitting element. Data lines and scan lines are connected to each of the plurality of pixels. A power line is configured to supply power to the plurality of pixels. The power line includes a plurality of first conductive lines and a plurality of second conductive lines intersecting the plurality of first conductive lines. The plurality of second conductive lines is arranged in a region between adjacent light emitting elements of the plurality of pixels. At least some of the plurality of second conductive lines extend in a direction oblique to a direction of extension of the data lines or the scan lines.

Abstract: The motorized ear-cleaning device is a tool. The motorized ear-cleaning device is a therapeutic device. The motorized ear-cleaning device is adapted for use with the ear of a patient. The motorized ear-cleaning device cleans the ear. The motorized ear-cleaning device comprises a working element, a handle structure, and drive circuit. The working element attaches to the handle structure. The drive circuit mounts in the drive structure. The drive circuit rotates the working element. The rotation of the working element rubs against the ear. The working element generates a friction used to clean the ear.

Abstract: A packaged radio-frequency device is disclosed, including a packaging substrate configured to receive one or more components, the packaging substrate including a first side and a second side. A shielded package may be implemented on the first side of the packaging substrate, the shielded package including a first circuit and a first overmold structure, the shielded package configured to provide radio-frequency shielding for at least a portion of the first circuit. A set of through-mold connections may be implemented on the second side of the packaging substrate, the set of through-mold connections defining a mounting volume on the second side of the packaging substrate. The device may include a component implemented within the mounting volume and a second overmold structure substantially encapsulating one or more of the component or the set of through-mold connections.

Abstract: A display apparatus includes: a plurality of pixel circuits at a display area, the display area having a non-quadrangular shape; a first signal line extending on the display area in a first direction, and electrically connected to a first pixel circuit from among the plurality of pixel circuits; a first voltage line extending on the display area in the first direction; a first load compensation capacitor adjacent to an end portion of the first signal line and an end portion of the first voltage line; a test circuit outside the display area; an output line electrically connected to the test circuit; and a connection portion configured to electrically connect the output line, the first signal line, and an electrode of the first load compensation capacitor to each other.