Patents Examined by Tammy E Lee
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Patent number: 11983558Abstract: Applications can be migrated between containers during Modern Standby on a computing device. This migration may be performed to prolong the battery life of the computing device or to otherwise enhance performance. When a change in sensor state information is detected, a migration policy can be applied to application information to generate migration instructions. The migration instructions can then be used to migrate applications between containers.Type: GrantFiled: August 2, 2021Date of Patent: May 14, 2024Assignee: Dell Products L.P.Inventors: Gokul Thiruchengode Vajravel, Vivek Viswanathan Iyer
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Patent number: 11966795Abstract: Embodiments of the present disclosure provide a method for loading a minus-one screen, comprising: loading a code of the minus-one screen and a resource of the minus-one screen to a virtual machine respectively, the code of the minus-one screen being independent from a code of a desktop container; creating a context of the minus-one screen and replacing a context of the desktop container, the context of the minus-one screen including a resource acquisition path of the resource of the minus-one screen; and loading the minus-one screen according to the context of the minus-one screen.Type: GrantFiled: July 31, 2019Date of Patent: April 23, 2024Assignee: ZTE CORPORATIONInventor: Nan Zhang
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Patent number: 11941433Abstract: A computing apparatus includes at least one general purpose processor, at least one coprocessor, and at least one application specific processor. The at least one general purpose processor is arranged to run an application, wherein data processing of at least a portion of a data processing task is offloaded from the application running on the at least one general purpose processor. The at least one coprocessor is arranged to deal with a control flow of the data processing without intervention of the application running on the at least one general purpose processor. The at least one application specific processor is arranged to deal with a data flow of the data processing without intervention of the application running on the at least one general purpose processor.Type: GrantFiled: February 22, 2021Date of Patent: March 26, 2024Assignee: VIA Technologies Inc.Inventor: Jiin Lai
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Patent number: 11934884Abstract: Coordinated application processing includes obtaining a plurality of images and distributing them to processing engines to perform image processing. The plurality of images cover an image area, with different sub-areas, in which a biological sample to be sequenced is present. The image processing proceeds across multiple cycles to process a respective set of images, of the plurality of images, of each sub-area of the different sub-areas, and therefore of the respective area, of the flow cell, to which that sub-area correlates. The distributing the plurality of images includes, for each sub-area of the different sub-areas, distributing, across the multiple cycles of the image processing, the images of the respective set of images of that sub-area to a respective processing engine, of a plurality of processing engines, associated with, and selected for, processing images of that sub-area.Type: GrantFiled: January 30, 2023Date of Patent: March 19, 2024Assignee: Illumina, Inc.Inventors: David Kimmel, Eunho Noh, Paul Smith
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Patent number: 11934867Abstract: Warp sharding techniques to switch execution between divergent shards on instructions that trigger a long stall, thereby interleaving execution between diverged threads within a warp instead of across warps. The technique may be applied to mitigate pipeline stalls in applications with low warp occupancy and high divergence. Warp data cache locality may also be improved by concentrating memory accesses within a warp rather than spreading them across warps.Type: GrantFiled: February 24, 2021Date of Patent: March 19, 2024Assignee: NVIDIA CORP.Inventors: Sana Damani, Mark Stephenson, Ram Rangan, Daniel Robert Johnson, Rishkul Kulkarni
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Patent number: 11893413Abstract: An embodiment of an apparatus includes a processing circuit and a system memory. The processing circuit may store a pending request in a buffer, the pending request corresponding to a transaction that includes a write request to the system memory. The processing circuit may also allocate an entry in a write table corresponding the transaction. After sending the transaction to the system memory to be processed, the pending request in the buffer may be removed in response to the allocation of the write entry.Type: GrantFiled: January 6, 2021Date of Patent: February 6, 2024Assignee: Apple Inc.Inventors: Michael D. Snyder, Ronald P. Hall, Deepak Limaye, Brett S. Feero, Rohit K. Gupta
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Patent number: 11893415Abstract: Embodiments as disclosed herein provide computing systems and methods that effectively serve to isolate processes in a computing environment. The isolation of such processes may serve additionally to substantially increase the observability of such processes, allowing a granular insight into data associated with those processes and the performing of individual tasks.Type: GrantFiled: May 17, 2021Date of Patent: February 6, 2024Assignee: Q2 Software, Inc.Inventors: Adam David Blue, Theodor Getu Berhane, Thomas Coyne
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Patent number: 11893419Abstract: Methods and systems include processors and hardware accelerators. The processor initiates a first process in a first hardware accelerator configured to aid the processor in performing the first process. The processor initiates the first process using one or more interface registers. The processor performs additional processing while the first hardware accelerator performs the first process after initiation of the first process. The processor also initiates a second process in a second hardware accelerator configured to aid the processor in performing a second process. Moreover, the processor initiates the second process using the one or more interface registers.Type: GrantFiled: January 14, 2021Date of Patent: February 6, 2024Assignee: Apple Inc.Inventor: Mahesh B. Chappalli
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Patent number: 11868801Abstract: A system, computer readable medium and a method that may include performing multiple iterations of: determining, by each active initiator of the multiple initiators, a number of pending access requests generated by the active initiator, wherein each access request is a request to access a shared resource out of the shared resources; determining, by each active initiator, a priority level to be assigned to all pending access requests generated by the active initiator, wherein the determining is based on the number of pending access requests generated by the active initiator, a number of active initiators out of the multiple initiators, and a number of access requests serviceable by the shared resource; for each active initiator, informing an arbitration hardware of a network on chip about the priority level to be assigned to all pending access requests generated by the active initiator; and managing access to the shared resources, by the arbitration hardware, based on the priority level to be assigned to all pType: GrantFiled: February 25, 2022Date of Patent: January 9, 2024Assignee: Mobileye Vision Technologies Ltd.Inventors: Boris Shulman, Itamar Richter, Galit Keret
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Patent number: 11861499Abstract: This application provides a method, a terminal-side device, and a cloud-side device for data processing and a terminal-cloud collaboration system. The method includes: sending, by the terminal-side device, a request message to the cloud-side device; receiving, by the terminal-side device, a second neural network model that is obtained by compressing a first neural network model and that is sent by the cloud-side device, where the first neural network model is a neural network model on the cloud-side device that is used to process the cognitive computing task, and a hardware resource required when the second neural network model runs on the terminal-side device is within an available hardware resource capability range of the terminal-side device; and processing, by the terminal-side device, the cognitive computing task based on the second neural network model.Type: GrantFiled: June 25, 2019Date of Patent: January 2, 2024Assignee: HUAWEI TECHNOLOGIES CO., LTD.Inventors: Fenglong Song, Wulong Liu, Xijun Xue, Huimin Zhang
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Patent number: 11847501Abstract: Systems and methods are disclosed for data protection in a cluster of data processing accelerators (DPAs) using a policy that determines a static partition of resources in each DPA in the cluster communicatively coupled to a host device. Each DPA has sensitive (secure) and non-sensitive (non-secure) resources. The host device and a DPA can access all resources of the DPA. Other DPAs can only access non-sensitive resources of a DPA. The partition of resources within a DPA is static and may be implemented in hardware or firmware. Resources include memory, one or more processing modules such as key generators and cryptographic modules, caches, registers, and storage.Type: GrantFiled: June 12, 2020Date of Patent: December 19, 2023Assignees: BAIDU USA LLC, KUNLUNXIN TECHNOLOGY (BEIJING) COMPANY LIMITEDInventors: Yueqiang Cheng, Hefei Zhu
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Patent number: 11829807Abstract: A method for preventing a task-signal deadlock arising due to contention for a mutex in a real-time operating system (RTOS) includes detecting, by a processing unit, a signal notification sent to a task for execution of a signal handler; identifying, by the processing unit, a mutex to be acquired by the signal handler, when the signal notification is detected; determining whether the identified mutex has been acquired by the task; and utilizing, by the processing unit, an alternative stack for execution of the signal handler, in response to determining that the mutex has been acquired by the task, for preventing a task-signal deadlock during the execution.Type: GrantFiled: September 30, 2020Date of Patent: November 28, 2023Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Raju Udava Siddappa, Chandan Kumar, Sudharshan Rao B, Tushar Vrind, Venkata Raju Indukuri
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Patent number: 11822973Abstract: A method including an executing entity, including fencing dependency circuitry, communicating with physical memory including a work queue (WQ) including a first controlling work request (WR), and a first dependent WR, the first dependent WR including a fencing indication indicating that the first dependent WR should not be executed until the first controlling WR has completed, the fencing dependency circuitry determining that the first dependent WR is ready for execution and checking, based on the fencing indication in the first dependent WR, whether the first controlling WR has completed, and the executing entity executing the first dependent WR only when the first controlling WR has completed. Related apparatus and methods are also provided.Type: GrantFiled: September 16, 2019Date of Patent: November 21, 2023Assignee: MELLANOX TECHNOLOGIES, LTD.Inventors: Ariel Shahar, Ahmad Omary
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Patent number: 11816508Abstract: Systems and methods are provided for consolidation of IHS (Information Handling System) resources utilized by workspaces operating on the IHS, where the workspaces operate in isolation from the operating system of the IHS. A remote workspace orchestration service manages deployment of workspaces on the IHS. The workspaces are instantiated and operate according to a workspace definition provided by the workspace orchestration service. An embedded controller of the IHS registers a resource consolidation function of the IHS with the workspace orchestration service, which notifies the workspaces of the resource consolidation function. Based on the workspace definitions, redundant IHS resources utilized by the workspaces are identified. The resource consolidation function is notified of the redundant IHS resources.Type: GrantFiled: March 22, 2021Date of Patent: November 14, 2023Assignee: Dell Products, L.P.Inventors: Vivek Viswanathan Iyer, Gokul Thiruchengode Vajravel, Michael S. Gatson
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Patent number: 11809917Abstract: Transactional Lock Elision allows hardware transactions to execute unmodified critical sections protected by the same lock concurrently, by subscribing to the lock and verifying that it is available before committing the transaction. A “lazy subscription” optimization, which delays lock subscription, can potentially cause behavior that cannot occur when the critical sections are executed under the lock. Hardware extensions may provide mechanisms to ensure that lazy subscriptions are safe (e.g., that they result in correct behavior). Prior to executing a critical section transactionally, its lock and subscription code may be identified (e.g., by writing their locations to special registers). Prior to committing the transaction, the thread executing the critical section may verify that the correct lock was correctly subscribed to. If not, or if locations identified by the special registers have been modified, the transaction may be aborted.Type: GrantFiled: December 20, 2019Date of Patent: November 7, 2023Assignee: Oracle International CorporationInventors: David Dice, Timothy L. Harris, Alex Kogan, Yosef Lev, Mark S. Moir
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Patent number: 11809898Abstract: A method implemented in an integrated-circuit module including a processor accessing a non-volatile memory wherein execution-context-defining software applications to be executed by the processor for communication with a device are stored, and to access a volatile memory storing execution data of a software application currently being executed.Type: GrantFiled: March 2, 2021Date of Patent: November 7, 2023Assignee: IDEMIA FRANCEInventor: Elder Dos Santos
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Patent number: 11768911Abstract: The present disclosure relates to methods and apparatuses for execution of a neural network. An exemplary method can be implemented by a processing unit. The processing unit can include a command parser configured to dispatch commands and computing tasks and at least one core communicatively coupled with the command parser and configured to process the dispatched computing task. Each core can include a convolution unit, a pooling unit, at least one operation unit and a sequencer communicatively coupled with the convolution unit, the pooling unit, and the at least one operation unit and configured to distribute instructions of the dispatched computing task to the convolution unit, the pooling unit, and the at least one operation unit for execution.Type: GrantFiled: August 26, 2020Date of Patent: September 26, 2023Assignee: Alibaba Group Holding LimitedInventors: Yang Jiao, Yijung Su
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Patent number: 11726818Abstract: Systems, methods, and computer program products for executing a sequence of tasks are provided. An analytics engine receives a request to execute a group of tasks, where tasks execute in different programming languages. A sequence for executing the tasks in the group of tasks is determined using the input and output parameters of the tasks. The tasks are executed according to a determined sequence. To execute each task, the analytics engine instantiates a process that corresponds to programming language associated with the tasks. The process executes the task. Once all tasks complete execution, an output of the last task is a result of the group of tasks.Type: GrantFiled: October 21, 2020Date of Patent: August 15, 2023Assignee: BlackRock, Inc.Inventors: Nick Sutton, Jenö Kovács, Sylvain Olivier Eric Cheroutre, Philippe Benjamin de Koning
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Patent number: 11709718Abstract: A barrier synchronization circuit that performs barrier synchronization of a plurality of processes executed in parallel by a plurality of processing circuits, the barrier synchronization circuit includes a first determination circuit configured to determine whether the number of first processing circuits among the plurality of the processing circuits is equal to or greater than a first threshold value, the first processing circuits having completed the process, and an instruction circuit configured to instruct a second processing circuit among the plurality of the processing circuits to forcibly stop the process when it is determined that the number is equal to or greater than the first threshold value by the first determination circuit, the second processing circuit having not completed the process.Type: GrantFiled: September 8, 2020Date of Patent: July 25, 2023Assignee: FUJITSU LIMITEDInventors: Kanae Nakagawa, Masaki Arai, Yasumoto Tomita
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Patent number: 11693701Abstract: Embodiments of this application relate to the field of communications technologies, and provide a system service timeout processing method and an apparatus. The method includes: when a target system service thread in at least one system service thread times out, determining, by a terminal, a first application process communicating with the target system service thread, where the timeout of the target system service thread includes at least one of the following: a locked object occupied by the target system service thread is not released within a preset time, and the target system service thread is blocked; and ending, by the terminal, the first application process.Type: GrantFiled: September 30, 2017Date of Patent: July 4, 2023Assignee: HUAWEI TECHNOLOGIES CO., LTD.Inventors: Junmin Zhao, Yu Li, Sen Wang, Shun Xu, Zhenchao Lin