Abstract: A redundancy memory register for storing defective addresses of defective memory elements in a memory device includes a plurality of memory units each one storing a respective defective address bit and comparing the defective address bit stored therein with a respective current address bit of a current address supplied to the memory device. The register includes a first group of memory units and a second group of memory units storing a first defective address, and a third group of memory units storing, together with the first group, a second defective address which has an address part in common with the first defective address. The first and second group of memory units supply first redundancy selection means for selecting a first redundancy memory element when the current address coincides with the first defective address.